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commit 57b09f77fe87df24f50c30e81d198c4bef6e3b52 Author: Jerzy Kasenberg <[email protected]> AuthorDate: Wed Oct 14 14:05:58 2026 +0200 cmsis-core: Handle empty table and data cache in arm_mpu_init arm_mpu_init() enabled MPU even when no region was declared. Leave MPU untouched in that case. Data cache can be already enabled when MPU is configured (i.e. left enabled by boot loader) and hold lines of memory that MPU region makes non-cacheable. Such lines could be written back later over data written by DMA. Clean and invalidate data cache after MPU is loaded. Assisted-by: Claude:claude-opus-5-5 Signed-off-by: Jerzy Kasenberg <[email protected]> --- hw/cmsis-core/src/arm_mpu.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/hw/cmsis-core/src/arm_mpu.c b/hw/cmsis-core/src/arm_mpu.c index 8a064f22c..bdfaf7212 100644 --- a/hw/cmsis-core/src/arm_mpu.c +++ b/hw/cmsis-core/src/arm_mpu.c @@ -34,6 +34,10 @@ arm_mpu_init(void) ARM_MPU_Region_t regions[8] = { 0 }; size_t size = min(ARRAY_SIZE(regions), mpu_regions_size()); + if (size == 0) { + return; + } + ARM_MPU_Disable(); for (size_t i = 0; i < size; ++i) { @@ -44,6 +48,16 @@ arm_mpu_init(void) ARM_MPU_Load(regions, size); ARM_MPU_Enable(MPU_CTRL_PRIVDEFENA_Msk); + +#if defined(__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U) + /* + * Data cache could be already enabled (i.e. by boot loader) and hold + * lines of memory that is now non-cacheable. + */ + if (SCB->CCR & SCB_CCR_DC_Msk) { + SCB_CleanInvalidateDCache(); + } +#endif } #elif (__CORTEX_M == 23) || (__CORTEX_M == 33) || (__CORTEX_M == 34) || \ (__CORTEX_M == 35)
