This is an automated email from the ASF dual-hosted git repository.

sjanc pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/mynewt-core.git

commit 3c96500d93533d4218ca3fb747eb1531f406a0c3
Author: Wiktor Kwiatkowski <[email protected]>
AuthorDate: Mon Jul 6 16:42:54 2026 +0200

    mtest/nvreg: fix test state retention across system resets
    
    Fix .noinit test variables losing updates due to write buffering
    before a reset. Added a dummy read back after modifying the variables
    to force the CPU to flush data to physical RAM.
    This extra read is harmless across all boards and explicitly
    required by the STM32H723ZG reference manual to ensure data effectively
    reaches the DTCM memory.
---
 test/mtest/mtest_nvreg/src/main.c               | 6 ++++--
 test/mtest/mtest_nvreg/src/nvreg_test_helpers.c | 4 +++-
 2 files changed, 7 insertions(+), 3 deletions(-)

diff --git a/test/mtest/mtest_nvreg/src/main.c 
b/test/mtest/mtest_nvreg/src/main.c
index e53ca816a..0bf3aa5e4 100644
--- a/test/mtest/mtest_nvreg/src/main.c
+++ b/test/mtest/mtest_nvreg/src/main.c
@@ -23,14 +23,16 @@
 #include "mtest_nvreg/mtest_nvreg.h"
 
 #define FIRST_BOOT_DONE 0xC001B007
-int reset_count __attribute__((section(".noinit")));
-int boot_status __attribute__((section(".noinit")));
+volatile int reset_count __attribute__((section(".noinit")));
+volatile int boot_status __attribute__((section(".noinit")));
 
 MTEST_INIT(nvreg_test)
 {
     if (boot_status != FIRST_BOOT_DONE) {
         reset_count = 0;
         boot_status = FIRST_BOOT_DONE;
+        /* Readback required by STM32H723ZG to ensure data reaches DTCM */
+        (void)boot_status;
     }
 }
 
diff --git a/test/mtest/mtest_nvreg/src/nvreg_test_helpers.c 
b/test/mtest/mtest_nvreg/src/nvreg_test_helpers.c
index 19f678d44..bc0a37302 100644
--- a/test/mtest/mtest_nvreg/src/nvreg_test_helpers.c
+++ b/test/mtest/mtest_nvreg/src/nvreg_test_helpers.c
@@ -20,12 +20,14 @@
 #include "hal/hal_nvreg.h"
 #include "mtest_nvreg/mtest_nvreg.h"
 
-extern int reset_count;
+volatile extern int reset_count;
 
 void
 nvregs_reset(void)
 {
     reset_count++;
+    /* Readback required by STM32H723ZG to ensure data reaches DTCM */
+    (void)reset_count;
     /* Ensure logs are flushed before reset */
     os_time_delay(OS_TICKS_PER_SEC / 30);
     hal_system_reset();

Reply via email to