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The following commit(s) were added to refs/heads/master by this push:
new 8f63c0aed hw/mcu/atmel: use HAL_DEBUG_BREAK() for reset
8f63c0aed is described below
commit 8f63c0aede844984c40dac0df85495f9a48711d8
Author: Wiktor Kwiatkowski <[email protected]>
AuthorDate: Mon Mar 30 16:11:10 2026 +0200
hw/mcu/atmel: use HAL_DEBUG_BREAK() for reset
Allow using HAL_ENABLE_SOFTWARE_BREAKPOINTS via syscfg.vals
---
hw/mcu/atmel/samd21xx/src/hal_system.c | 18 ++++++------------
1 file changed, 6 insertions(+), 12 deletions(-)
diff --git a/hw/mcu/atmel/samd21xx/src/hal_system.c
b/hw/mcu/atmel/samd21xx/src/hal_system.c
index c8b52c11d..136fca73a 100644
--- a/hw/mcu/atmel/samd21xx/src/hal_system.c
+++ b/hw/mcu/atmel/samd21xx/src/hal_system.c
@@ -16,23 +16,14 @@
#include <mcu/cortex_m0.h>
#include "hal/hal_system.h"
+#include "hal/hal_debug.h"
#include <stdlib.h>
void
hal_system_reset(void)
{
while (1) {
- if (hal_debugger_connected()) {
- /*
- * If debugger is attached, breakpoint here.
- */
- __asm__("bkpt");
- }
-
- /* Cortex-M0+ Core Debug Registers (DCB registers, SHCSR, and DFSR)
- are only accessible over DAP and not via processor. Therefore
- they are not covered by the Cortex-M0 header file. */
-
+ HAL_DEBUG_BREAK();
NVIC_SystemReset();
}
}
@@ -40,6 +31,9 @@ hal_system_reset(void)
int
hal_debugger_connected(void)
{
+ /* Cortex-M0+ Core Debug Registers (DCB registers, SHCSR, and DFSR)
+ are only accessible over DAP and not via processor. Therefore
+ they are not covered by the Cortex-M0 header file. */
return DSU->STATUSB.reg & DSU_STATUSB_DBGPRES;
}
@@ -50,7 +44,7 @@ HAL_GetTick(void)
}
int
-HAL_InitTick (uint32_t TickPriority)
+HAL_InitTick(uint32_t TickPriority)
{
return 0;
}