This is an automated email from the ASF dual-hosted git repository. vipulrahane pushed a commit to branch ksc/update in repository https://gitbox.apache.org/repos/asf/mynewt-core.git
commit 1f82d99f1931c5041964aaaf10583fb5cd20aeac Author: Jerzy Kasenberg <[email protected]> AuthorDate: Mon May 19 14:21:48 2025 +0200 kernel/os/arch: Fix Cortex-M irq priority setting For Cortex-M0: os_arch_os_init() initialized interrupt priority level for all interrupts using incorrect array limit taken from sizeof instead of ARRAY_SIZE. For Cortex-M0 field IP is array of uint32_t unlike all other version where this array consist of uint8_t. Now array is iterated using ARRAY_SIZE(NVIC->IP) to limit instead of sizeof(NVIC->IP) and for Cortex-M33 ARRAY_SIZE(NVIC->IPR). Signed-off-by: Jerzy Kasenberg <[email protected]> --- .../cmac/src/arch/cortex_m0_cmac}/os_arch_arm.c | 139 ++++----------------- kernel/os/src/arch/cortex_m0/os_arch_arm.c | 2 +- kernel/os/src/arch/cortex_m3/os_arch_arm.c | 2 +- kernel/os/src/arch/cortex_m33/os_arch_arm.c | 2 +- kernel/os/src/arch/cortex_m4/os_arch_arm.c | 2 +- kernel/os/src/arch/cortex_m7/os_arch_arm.c | 2 +- 6 files changed, 32 insertions(+), 117 deletions(-) diff --git a/kernel/os/src/arch/cortex_m0/os_arch_arm.c b/hw/mcu/dialog/cmac/src/arch/cortex_m0_cmac/os_arch_arm.c similarity index 63% copy from kernel/os/src/arch/cortex_m0/os_arch_arm.c copy to hw/mcu/dialog/cmac/src/arch/cortex_m0_cmac/os_arch_arm.c index 3fd909125..5cbc39d4b 100644 --- a/kernel/os/src/arch/cortex_m0/os_arch_arm.c +++ b/hw/mcu/dialog/cmac/src/arch/cortex_m0_cmac/os_arch_arm.c @@ -17,36 +17,14 @@ * under the License. */ -#include "os/mynewt.h" -#include <hal/hal_bsp.h> -#include <hal/hal_os_tick.h> -#include <mcu/cmsis_nvic.h> - #include "mcu/mcu.h" - -#include "os_priv.h" - -/* - * From HAL_CM0.s - */ -extern void SVC_Handler(void); -extern void PendSV_Handler(void); -extern void SysTick_Handler(void); -/* XXX */ +#include "hal/hal_os_tick.h" +#include "os/os_arch_cmac.h" +#include "../../os/src/os_priv.h" /* Initial program status register */ #define INITIAL_xPSR 0x01000000 -/* - * Exception priorities. The higher the number, the lower the priority. A - * higher priority exception will interrupt a lower priority exception. - */ -#define PEND_SV_PRIO ((1 << __NVIC_PRIO_BITS) - 1) -#define OS_TICK_PRIO (PEND_SV_PRIO - 1) - -/* Make the SVC instruction highest priority */ -#define SVC_PRIO (1) - /* Stack frame structure */ struct stack_frame { uint32_t r4; @@ -76,7 +54,6 @@ struct stack_frame { SVC_ArgN(2) \ SVC_ArgN(3) -#if (defined (__MCU_CORTEX_M0_H__)) || defined (__CORTEX_M0PLUS) #define SVC_Call(f) \ __asm volatile \ ( \ @@ -87,61 +64,17 @@ struct stack_frame { : "r" (__r0), "r" (__r1), "r" (__r2), "r" (__r3) \ : "r7", "r12", "lr", "cc" \ ); -#else -#define SVC_Call(f) \ - __asm volatile \ - ( \ - "ldr r12,="#f"\n\t" \ - "svc 0" \ - : "=r" (__r0), "=r" (__r1), "=r" (__r2), "=r" (__r3) \ - : "r" (__r0), "r" (__r1), "r" (__r2), "r" (__r3) \ - : "r12", "lr", "cc" \ - ); -#endif /* XXX: determine how we will deal with running un-privileged */ uint32_t os_flags = OS_RUN_PRIV; -void -timer_handler(void) -{ - os_time_advance(1); -} - void os_arch_ctx_sw(struct os_task *t) { os_sched_ctx_sw_hook(t); /* Set PendSV interrupt pending bit to force context switch */ - SCB->ICSR = SCB_ICSR_PENDSVSET_Msk; -} - -os_sr_t -os_arch_save_sr(void) -{ - uint32_t isr_ctx; - - isr_ctx = __get_PRIMASK(); - __disable_irq(); - return (isr_ctx & 1); -} - -void -os_arch_restore_sr(os_sr_t isr_ctx) -{ - if (!isr_ctx) { - __enable_irq(); - } -} - -int -os_arch_in_critical(void) -{ - uint32_t isr_ctx; - - isr_ctx = __get_PRIMASK(); - return (isr_ctx & 1); + os_arch_cmac_pendsvset(); } os_stack_t * @@ -152,7 +85,7 @@ os_arch_task_stack_init(struct os_task *t, os_stack_t *stack_top, int size) struct stack_frame *sf; /* Get stack frame pointer */ - s = (os_stack_t *) ((uint8_t *) stack_top - sizeof(*sf)); + s = (os_stack_t *)((uint8_t *) stack_top - sizeof(*sf)); /* Zero out R1-R3, R12, LR */ for (i = 9; i < 14; ++i) { @@ -168,7 +101,7 @@ os_arch_task_stack_init(struct os_task *t, os_stack_t *stack_top, int size) sf->pc = (uint32_t)t->t_func; sf->r0 = (uint32_t)t->t_arg; - return (s); + return s; } void @@ -188,50 +121,28 @@ svc_os_arch_init(void) os_error_t os_arch_os_init(void) { - os_error_t err; int i; - /* Cannot be called within an ISR */ - err = OS_ERR_IN_ISR; - if (__get_IPSR() == 0) { - err = OS_OK; - - /* Drop priority for all interrupts */ - for (i = 0; i < sizeof(NVIC->IP); i++) { - NVIC->IP[i] = -1; - } - - /* - * Install default interrupt handler for all interrupts except Reset, - * which'll print out system state at the time of the interrupt, and - * few other regs which should help in trying to figure out what went - * wrong. - */ - for (i = -NVIC_USER_IRQ_OFFSET + 2; - i < NVIC_NUM_VECTORS - NVIC_USER_IRQ_OFFSET; i++) { - NVIC_SetVector(i, (uint32_t)os_default_irq_asm); - } - - /* Install our system interrupt handlers */ - NVIC_SetVector(SVC_IRQ_NUMBER, (uint32_t)SVC_Handler); - NVIC_SetVector(PendSV_IRQn, (uint32_t)PendSV_Handler); - NVIC_SetVector(SysTick_IRQn, (uint32_t)SysTick_Handler); + if (__get_IPSR() != 0) { + return OS_ERR_IN_ISR; + } - /* Set the PendSV interrupt exception priority to the lowest priority */ - NVIC_SetPriority(PendSV_IRQn, PEND_SV_PRIO); + /* Drop priority for all interrupts */ + for (i = 0; i < ARRAY_SIZE(NVIC->IP); i++) { + NVIC->IP[i] = -1; + } - /* Set the SVC interrupt to priority 0 (highest configurable) */ - NVIC_SetPriority(SVC_IRQ_NUMBER, SVC_PRIO); + NVIC_SetPriority(PendSV_IRQn, -1); + NVIC_SetPriority(SVC_IRQ_NUMBER, 0); - /* Check if privileged or not */ - if ((__get_CONTROL() & 1) == 0) { - os_arch_init(); - } else { - svc_os_arch_init(); - } + /* Check if privileged or not */ + if ((__get_CONTROL() & 1) == 0) { + os_arch_init(); + } else { + svc_os_arch_init(); } - return err; + return OS_OK; } uint32_t @@ -246,8 +157,12 @@ os_arch_start(void) /* Adjust PSP so it looks like this task just took an exception */ __set_PSP((uint32_t)t->t_stackptr + offsetof(struct stack_frame, r0)); - /* Intitialize and start system clock timer */ - os_tick_init(OS_TICKS_PER_SEC, OS_TICK_PRIO); + /* + * Initialize and start system clock timer. The interrupt priority does not + * matter here since it always runs on ll_timer which has predefined + * priority in cmac_timer. + */ + os_tick_init(OS_TICKS_PER_SEC, 0); /* Mark the OS as started, right before we run our first task */ g_os_started = 1; diff --git a/kernel/os/src/arch/cortex_m0/os_arch_arm.c b/kernel/os/src/arch/cortex_m0/os_arch_arm.c index 3fd909125..9595b4ca3 100644 --- a/kernel/os/src/arch/cortex_m0/os_arch_arm.c +++ b/kernel/os/src/arch/cortex_m0/os_arch_arm.c @@ -197,7 +197,7 @@ os_arch_os_init(void) err = OS_OK; /* Drop priority for all interrupts */ - for (i = 0; i < sizeof(NVIC->IP); i++) { + for (i = 0; i < ARRAY_SIZE(NVIC->IP); i++) { NVIC->IP[i] = -1; } diff --git a/kernel/os/src/arch/cortex_m3/os_arch_arm.c b/kernel/os/src/arch/cortex_m3/os_arch_arm.c index 621933952..9194cfdea 100644 --- a/kernel/os/src/arch/cortex_m3/os_arch_arm.c +++ b/kernel/os/src/arch/cortex_m3/os_arch_arm.c @@ -206,7 +206,7 @@ os_arch_os_init(void) err = OS_OK; /* Drop priority for all interrupts */ - for (i = 0; i < sizeof(NVIC->IP); i++) { + for (i = 0; i < ARRAY_SIZE(NVIC->IP); i++) { NVIC->IP[i] = -1; } diff --git a/kernel/os/src/arch/cortex_m33/os_arch_arm.c b/kernel/os/src/arch/cortex_m33/os_arch_arm.c index 4b7939292..7159d224c 100644 --- a/kernel/os/src/arch/cortex_m33/os_arch_arm.c +++ b/kernel/os/src/arch/cortex_m33/os_arch_arm.c @@ -210,7 +210,7 @@ os_arch_os_init(void) err = OS_OK; /* Drop priority for all interrupts */ - for (i = 0; i < sizeof(NVIC->IPR); i++) { + for (i = 0; i < ARRAY_SIZE(NVIC->IPR); i++) { NVIC->IPR[i] = -1; } diff --git a/kernel/os/src/arch/cortex_m4/os_arch_arm.c b/kernel/os/src/arch/cortex_m4/os_arch_arm.c index 1826ed906..70d8a6fdd 100644 --- a/kernel/os/src/arch/cortex_m4/os_arch_arm.c +++ b/kernel/os/src/arch/cortex_m4/os_arch_arm.c @@ -210,7 +210,7 @@ os_arch_os_init(void) err = OS_OK; /* Drop priority for all interrupts */ - for (i = 0; i < sizeof(NVIC->IP); i++) { + for (i = 0; i < ARRAY_SIZE(NVIC->IP); i++) { NVIC->IP[i] = -1; } diff --git a/kernel/os/src/arch/cortex_m7/os_arch_arm.c b/kernel/os/src/arch/cortex_m7/os_arch_arm.c index 1826ed906..70d8a6fdd 100644 --- a/kernel/os/src/arch/cortex_m7/os_arch_arm.c +++ b/kernel/os/src/arch/cortex_m7/os_arch_arm.c @@ -210,7 +210,7 @@ os_arch_os_init(void) err = OS_OK; /* Drop priority for all interrupts */ - for (i = 0; i < sizeof(NVIC->IP); i++) { + for (i = 0; i < ARRAY_SIZE(NVIC->IP); i++) { NVIC->IP[i] = -1; }
