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The following commit(s) were added to refs/heads/master by this push:
new 79b107a43 mcu/stm32: Fix clock configuration for non STM32F4xx
79b107a43 is described below
commit 79b107a43d2fe9098a09e5bea7a5ea5b2313a944
Author: Jerzy Kasenberg <[email protected]>
AuthorDate: Wed Oct 2 15:07:28 2024 +0200
mcu/stm32: Fix clock configuration for non STM32F4xx
Only STM32F411 devices have PLLI2S PLLM parameter.
Also TIPPresSelection is not always present but since
it was initialized with 0 initializing line is omitted.
Signed-off-by: Jerzy Kasenberg <[email protected]>
---
hw/mcu/stm/stm32f4xx/src/clock_stm32f4xx.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/mcu/stm/stm32f4xx/src/clock_stm32f4xx.c
b/hw/mcu/stm/stm32f4xx/src/clock_stm32f4xx.c
index 6121997e4..07ae751f6 100644
--- a/hw/mcu/stm/stm32f4xx/src/clock_stm32f4xx.c
+++ b/hw/mcu/stm/stm32f4xx/src/clock_stm32f4xx.c
@@ -49,10 +49,11 @@ config_i2s_pll(void)
RCC_PeriphCLKInitTypeDef i2s_clock_init = {0};
i2s_clock_init.PeriphClockSelection = RCC_PERIPHCLK_PLLI2S;
+#if defined(STM32F411xE)
i2s_clock_init.PLLI2S.PLLI2SM = MYNEWT_VAL(STM32_CLOCK_PLLI2S_PLLM);
+#endif
i2s_clock_init.PLLI2S.PLLI2SN = MYNEWT_VAL(STM32_CLOCK_PLLI2S_PLLN);
i2s_clock_init.PLLI2S.PLLI2SR = MYNEWT_VAL(STM32_CLOCK_PLLI2S_PLLR);
- i2s_clock_init.TIMPresSelection = 0;
i2s_clock_init.RTCClockSelection = 0;
HAL_RCCEx_PeriphCLKConfig(&i2s_clock_init);