On 02/23/2012 06:20 AM, Michael Hertling wrote:
The point is that ${SCRIPT} is substituted in the Makefile by
(1) a macro specified on the command line
(2) a macro specified in the Makefile
(3) an environment variable
in that order, or with (2) and (3) reversed if Make is invoked with the
"-e" switch. When the Makefile's command lines are passed to the shell,
the substitution has already taken place, so it should also work with
the Windows command prompt. However, one needs a Make program, i.e. a
parameterization of this kind probably doesn't work with non-Makefile
generators. Even with Makefiles, there are subtle pitfalls: If a line
"SCRIPT = ..." happens to appear somewhere in the Makefiles, invoking
Make as "make SCRIPT=..." will overwrite it, most certainly resulting
in surprising and undesired behaviour. Personally, I'd advise against
using this method without explicit support by the Makefile generator.
Regards,
Michael
Yes well the problem is that it should work on Windows, and at least
with MinGW and with Gnu Makefiles.
I tried and I failed with this approach so I'll just drop the idea...
Also because typing
make do_this
./test.py
is not much different than "SCRIPT=test.py make do_this"
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