peter.smith created this revision.
peter.smith added reviewers: t.p.northover, manojgupta.
Herald added subscribers: kristof.beyls, eraman, rengolin.
Herald added a reviewer: javed.absar.

The existing test for the AArch64 constraint S uses the A and L modifiers. 
These modifiers were implemented in the original AArch64 backend but were not 
carried forward to the merged backend. The A is associated with ADRP and does 
nothing, the L is associated with :lo12: . Given that A and L are not supported 
by GCC and not supported by the new implementation of constraint S in LLVM (see 
https://reviews.llvm.org/D46745) I've altered the test to put :lo12: directly 
in the string so that A and L are not needed. A recent use of S in the linux 
kernel can be found at 
https://github.com/torvalds/linux/commit/44a497abd621a71c645f06d3d545ae2f46448830


https://reviews.llvm.org/D46932

Files:
  test/CodeGen/aarch64-inline-asm.c


Index: test/CodeGen/aarch64-inline-asm.c
===================================================================
--- test/CodeGen/aarch64-inline-asm.c
+++ test/CodeGen/aarch64-inline-asm.c
@@ -44,9 +44,9 @@
 
 void test_constraint_S(void) {
     int *addr;
-    asm("adrp %0, %A1\n\t"
-        "add %0, %0, %L1" : "=r"(addr) : "S"(&var));
-// CHECK: call i32* asm "adrp $0, ${1:A}\0A\09add $0, $0, ${1:L}", "=r,S"(i64* 
@var)
+    asm("adrp %0, %1\n\t"
+        "add %0, %0, :lo12:%1" : "=r"(addr) : "S"(&var));
+// CHECK: call i32* asm "adrp $0, $1\0A\09add $0, $0, :lo12:$1", "=r,S"(i64* 
@var)
 }
 
 void test_constraint_Q(void) {


Index: test/CodeGen/aarch64-inline-asm.c
===================================================================
--- test/CodeGen/aarch64-inline-asm.c
+++ test/CodeGen/aarch64-inline-asm.c
@@ -44,9 +44,9 @@
 
 void test_constraint_S(void) {
     int *addr;
-    asm("adrp %0, %A1\n\t"
-        "add %0, %0, %L1" : "=r"(addr) : "S"(&var));
-// CHECK: call i32* asm "adrp $0, ${1:A}\0A\09add $0, $0, ${1:L}", "=r,S"(i64* @var)
+    asm("adrp %0, %1\n\t"
+        "add %0, %0, :lo12:%1" : "=r"(addr) : "S"(&var));
+// CHECK: call i32* asm "adrp $0, $1\0A\09add $0, $0, :lo12:$1", "=r,S"(i64* @var)
 }
 
 void test_constraint_Q(void) {
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