Author: Alex MacLean Date: 2026-08-21T20:08:44-07:00 New Revision: 5ed5b7b91cb53f898615aa6cbbee6f22822bb8b6
URL: https://github.com/llvm/llvm-project/commit/5ed5b7b91cb53f898615aa6cbbee6f22822bb8b6 DIFF: https://github.com/llvm/llvm-project/commit/5ed5b7b91cb53f898615aa6cbbee6f22822bb8b6.diff LOG: [clang][NVPTX] exclude feature attributes from target-features (#215451) Added: Modified: clang/lib/Basic/Targets/NVPTX.cpp clang/lib/CodeGen/CodeGenModule.cpp clang/test/CodeGen/nvptx_attributes.c Removed: ################################################################################ diff --git a/clang/lib/Basic/Targets/NVPTX.cpp b/clang/lib/Basic/Targets/NVPTX.cpp index a3a7bd11029ce..de99a6718f26c 100644 --- a/clang/lib/Basic/Targets/NVPTX.cpp +++ b/clang/lib/Basic/Targets/NVPTX.cpp @@ -66,6 +66,12 @@ NVPTXTargetInfo::NVPTXTargetInfo(const llvm::Triple &Triple, NoAsmVariants = true; GPU = OffloadArch::getUnused(); + // Architectures are in the feature map only to gate builtins; the backend + // takes the architecture from `target-cpu`. +#define NVPTX_GPU(NAME, KIND, VIRTUAL, SM_ID, MIN_VER, MAX_VER, SUFFIX) \ + ReadOnlyFeatures.insert(NAME); +#include "llvm/TargetParser/NVPTXTargetParser.def" + // PTX supports f16 as a fundamental type. HasFastHalfType = true; HasFloat16 = true; diff --git a/clang/lib/CodeGen/CodeGenModule.cpp b/clang/lib/CodeGen/CodeGenModule.cpp index eb9c8f990d923..dfacc438fe433 100644 --- a/clang/lib/CodeGen/CodeGenModule.cpp +++ b/clang/lib/CodeGen/CodeGenModule.cpp @@ -3456,9 +3456,11 @@ bool CodeGenModule::GetCPUAndFeaturesAttributes(GlobalDecl GD, llvm::erase_if(Features, [&](const std::string& F) { return getTarget().isReadOnlyFeature(F.substr(1)); }); - llvm::sort(Features); - Attrs.addAttribute("target-features", llvm::join(Features, ",")); - AddedAttr = true; + if (!Features.empty()) { + llvm::sort(Features); + Attrs.addAttribute("target-features", llvm::join(Features, ",")); + AddedAttr = true; + } } // Add metadata for AArch64 Function Multi Versioning. if (getTarget().getTriple().isAArch64()) { diff --git a/clang/test/CodeGen/nvptx_attributes.c b/clang/test/CodeGen/nvptx_attributes.c index c49a68b89bc64..fbba84ff05d5a 100644 --- a/clang/test/CodeGen/nvptx_attributes.c +++ b/clang/test/CodeGen/nvptx_attributes.c @@ -16,7 +16,7 @@ __attribute__((nvptx_kernel)) void foo(int *ret) { } //. -// CHECK: attributes #[[ATTR0]] = { convergent noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="sm_61" "target-features"="+sm_61" } +// CHECK: attributes #[[ATTR0]] = { convergent noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="sm_61" } //. // CHECK: [[META0:![0-9]+]] = !{!"{{.*}}clang version {{.*}}"} //. _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
