https://github.com/yamash-fj updated https://github.com/llvm/llvm-project/pull/203458
>From 946051d666321cf95a8eb15735e845f22b66d0f3 Mon Sep 17 00:00:00 2001 From: yamash-fj <[email protected]> Date: Fri, 12 Jun 2026 13:52:40 +0900 Subject: [PATCH 1/4] [AArch64][Driver] Fix behavior of +nofeat modifier Fix #192186. An explicit ``+nofeat`` of ``-mcpu`` option is ignored when the feature is implied by the base-architecture. Two approaches were considerd: 1. include architechture-implied features in the ``CPUExtension`` set 2. preserve explicit user ``+nofeat`` even for architecture-implied features , and this patch implements the latter. When checking CPU extensions, simultaneously set ``Enabled`` flags for the base-architecture's default extensions. By setting ``Enabled``, an explicit +nofeat disables the feature and marks it as ``Touched``, and it prevents ``-feat`` from going away. Behaivior changes: For architecuture-default features: - preserve explicit ``+nofeat``(#192186). - remove redundant ``+feat``. --- clang/test/Driver/aarch64-no-feat.c | 31 +++++++++++++++++++ llvm/lib/TargetParser/AArch64TargetParser.cpp | 7 +++++ 2 files changed, 38 insertions(+) create mode 100644 clang/test/Driver/aarch64-no-feat.c diff --git a/clang/test/Driver/aarch64-no-feat.c b/clang/test/Driver/aarch64-no-feat.c new file mode 100644 index 0000000000000..ef3472b3a63e0 --- /dev/null +++ b/clang/test/Driver/aarch64-no-feat.c @@ -0,0 +1,31 @@ +// RUN: %clang --target=aarch64-linux-gnu -mcpu=neoverse-v2 %s -### 2>&1 | FileCheck %s --check-prefix=NEOVERSE-V2-DEFAULT +// NEOVERSE-V2-DEFAULT-NOT: "-target-feature" "+sb" +// NEOVERSE-V2-DEFAULT-NOT: "-target-feature" "-sb" +// NEOVERSE-V2-DEFAULT: "-target-feature" "+rand" +// NEOVERSE-V2-DEFAULT-SAME: "-target-feature" "+sve" +// NEOVERSE-V2-DEFAULT-NOT: "-target-feature" "+sha2" + +// RUN: %clang --target=aarch64-linux-gnu -mcpu=neoverse-v2+nosb %s -### 2>&1 | FileCheck %s --check-prefix=NEOVERSE-V2-NOSB +// NEOVERSE-V2-NOSB: "-target-feature" "-sb" + +// RUN: %clang --target=aarch64-linux-gnu -mcpu=neoverse-v2+sb %s -### 2>&1 | FileCheck %s --check-prefix=NEOVERSE-V2-SB +// NEOVERSE-V2-SB-NOT: "-target-feature" "+sb" + +// RUN: %clang --target=aarch64-linux-gnu -mcpu=neoverse-v2+nosve %s -### 2>&1 | FileCheck %s --check-prefix=NEOVERSE-V2-NOSVE +// NEOVERSE-V2-NOSVE: "-target-feature" "-sve" + +// RUN: %clang --target=aarch64-linux-gnu -mcpu=neoverse-v2+sve %s -### 2>&1 | FileCheck %s --check-prefix=NEOVERSE-V2-SVE +// NEOVERSE-V2-SVE: "-target-feature" "+sve" + +// RUN: %clang --target=aarch64-linux-gnu -mcpu=neoverse-v2+norng %s -### 2>&1 | FileCheck %s --check-prefix=NEOVERSE-V2-NORNG +// NEOVERSE-V2-NORNG: "-target-feature" "-rand" + +// RUN: %clang --target=aarch64-linux-gnu -mcpu=neoverse-v2+rng %s -### 2>&1 | FileCheck %s --check-prefix=NEOVERSE-V2-RNG +// NEOVERSE-V2-RNG: "-target-feature" "+rand" + +// RUN: %clang --target=aarch64-linux-gnu -mcpu=neoverse-v2+nosha2 %s -### 2>&1 | FileCheck %s --check-prefix=NEOVERSE-V2-NOSHA2 +// NEOVERSE-V2-NOSHA2-NOT: "-target-feature" "+sha2" +// NEOVERSE-V2-NOSHA2-NOT: "-target-feature" "-sha2" + +// RUN: %clang --target=aarch64-linux-gnu -mcpu=neoverse-v2+sha2 %s -### 2>&1 | FileCheck %s --check-prefix=NEOVERSE-V2-SHA2 +// NEOVERSE-V2-SHA2: "-target-feature" "+sha2" diff --git a/llvm/lib/TargetParser/AArch64TargetParser.cpp b/llvm/lib/TargetParser/AArch64TargetParser.cpp index 32becb23c681b..7e2c25f3c7b20 100644 --- a/llvm/lib/TargetParser/AArch64TargetParser.cpp +++ b/llvm/lib/TargetParser/AArch64TargetParser.cpp @@ -340,6 +340,11 @@ void AArch64::ExtensionSet::disable(ArchExtKind E) { disable(Dep.Later); } +static void setEnableIfMandatory(AArch64::ExtensionSet &Exts, AArch64::ExtensionInfo E) { + if (Exts.BaseArch->DefaultExts.test(E.ID)) + Exts.Enabled.set(E.ID); +} + void AArch64::ExtensionSet::addCPUDefaults(const CpuInfo &CPU) { LLVM_DEBUG(llvm::dbgs() << "addCPUDefaults(" << CPU.Name << ")\n"); BaseArch = &CPU.Arch; @@ -347,6 +352,8 @@ void AArch64::ExtensionSet::addCPUDefaults(const CpuInfo &CPU) { for (const auto &E : Extensions) if (CPU.DefaultExtensions.test(E.ID)) enable(E.ID); + setEnableIfMandatory(*this, E); + } } void AArch64::ExtensionSet::addArchDefaults(const ArchInfo &Arch) { >From 2dee5c0cb2671b8d2e59224ee66f156dcf50531a Mon Sep 17 00:00:00 2001 From: yamash-fj <[email protected]> Date: Thu, 18 Jun 2026 14:50:05 +0900 Subject: [PATCH 2/4] [AArch64][Driver] Fix clang-format --- llvm/lib/TargetParser/AArch64TargetParser.cpp | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/llvm/lib/TargetParser/AArch64TargetParser.cpp b/llvm/lib/TargetParser/AArch64TargetParser.cpp index 7e2c25f3c7b20..94d70a8057330 100644 --- a/llvm/lib/TargetParser/AArch64TargetParser.cpp +++ b/llvm/lib/TargetParser/AArch64TargetParser.cpp @@ -340,9 +340,10 @@ void AArch64::ExtensionSet::disable(ArchExtKind E) { disable(Dep.Later); } -static void setEnableIfMandatory(AArch64::ExtensionSet &Exts, AArch64::ExtensionInfo E) { - if (Exts.BaseArch->DefaultExts.test(E.ID)) - Exts.Enabled.set(E.ID); +static void setEnableIfMandatory(AArch64::ExtensionSet &Exts, + AArch64::ExtensionInfo E) { + if (Exts.BaseArch->DefaultExts.test(E.ID)) + Exts.Enabled.set(E.ID); } void AArch64::ExtensionSet::addCPUDefaults(const CpuInfo &CPU) { >From 88af7c3ddbcf9b648317041935394dbc0f81f32f Mon Sep 17 00:00:00 2001 From: yamash-fj <[email protected]> Date: Mon, 29 Jun 2026 15:50:41 +0900 Subject: [PATCH 3/4] review tests; delete or move some tests --- clang/test/Driver/aarch64-mcpu-no-feat.c | 17 +++++++++++++ clang/test/Driver/aarch64-no-feat.c | 31 ------------------------ clang/test/Driver/arm-sb.c | 4 +++ 3 files changed, 21 insertions(+), 31 deletions(-) create mode 100644 clang/test/Driver/aarch64-mcpu-no-feat.c delete mode 100644 clang/test/Driver/aarch64-no-feat.c diff --git a/clang/test/Driver/aarch64-mcpu-no-feat.c b/clang/test/Driver/aarch64-mcpu-no-feat.c new file mode 100644 index 0000000000000..b04e99f37b963 --- /dev/null +++ b/clang/test/Driver/aarch64-mcpu-no-feat.c @@ -0,0 +1,17 @@ +// Check that explicit -mcpu=<cpu>+no<feature> preserves -<feature> option and removes the feature when the feature is implied by the CPU or its base architecture. +// SVE and RandGen are default features of neoverse-v2 (defined in AArch64Processors.td). +// SVE and SB are default features of armv9 (defined in AArch64Features.td). +// SHA2 is not part of the default feature set for either Neoverse V2 or Armv9. + +// RUN: %clang --target=aarch64-linux-gnu -mcpu=neoverse-v2+nosve %s -### 2>&1 | FileCheck %s --check-prefix=NEOVERSE-V2-NOSVE +// NEOVERSE-V2-NOSVE: "-target-feature" "-sve" + +// RUN: %clang --target=aarch64-linux-gnu -mcpu=neoverse-v2+norng %s -### 2>&1 | FileCheck %s --check-prefix=NEOVERSE-V2-NORNG +// NEOVERSE-V2-NORNG: "-target-feature" "-rand" + +// RUN: %clang --target=aarch64-linux-gnu -mcpu=neoverse-v2+nosb %s -### 2>&1 | FileCheck %s --check-prefix=NEOVERSE-V2-NOSB +// NEOVERSE-V2-NOSB: "-target-feature" "-sb" + +// RUN: %clang --target=aarch64-linux-gnu -mcpu=neoverse-v2+nosha2 %s -### 2>&1 | FileCheck %s --check-prefix=NEOVERSE-V2-NOSHA2 +// NEOVERSE-V2-NOSHA2-NOT: "-target-feature" "+sha2" +// NEOVERSE-V2-NOSHA2-NOT: "-target-feature" "-sha2" diff --git a/clang/test/Driver/aarch64-no-feat.c b/clang/test/Driver/aarch64-no-feat.c deleted file mode 100644 index ef3472b3a63e0..0000000000000 --- a/clang/test/Driver/aarch64-no-feat.c +++ /dev/null @@ -1,31 +0,0 @@ -// RUN: %clang --target=aarch64-linux-gnu -mcpu=neoverse-v2 %s -### 2>&1 | FileCheck %s --check-prefix=NEOVERSE-V2-DEFAULT -// NEOVERSE-V2-DEFAULT-NOT: "-target-feature" "+sb" -// NEOVERSE-V2-DEFAULT-NOT: "-target-feature" "-sb" -// NEOVERSE-V2-DEFAULT: "-target-feature" "+rand" -// NEOVERSE-V2-DEFAULT-SAME: "-target-feature" "+sve" -// NEOVERSE-V2-DEFAULT-NOT: "-target-feature" "+sha2" - -// RUN: %clang --target=aarch64-linux-gnu -mcpu=neoverse-v2+nosb %s -### 2>&1 | FileCheck %s --check-prefix=NEOVERSE-V2-NOSB -// NEOVERSE-V2-NOSB: "-target-feature" "-sb" - -// RUN: %clang --target=aarch64-linux-gnu -mcpu=neoverse-v2+sb %s -### 2>&1 | FileCheck %s --check-prefix=NEOVERSE-V2-SB -// NEOVERSE-V2-SB-NOT: "-target-feature" "+sb" - -// RUN: %clang --target=aarch64-linux-gnu -mcpu=neoverse-v2+nosve %s -### 2>&1 | FileCheck %s --check-prefix=NEOVERSE-V2-NOSVE -// NEOVERSE-V2-NOSVE: "-target-feature" "-sve" - -// RUN: %clang --target=aarch64-linux-gnu -mcpu=neoverse-v2+sve %s -### 2>&1 | FileCheck %s --check-prefix=NEOVERSE-V2-SVE -// NEOVERSE-V2-SVE: "-target-feature" "+sve" - -// RUN: %clang --target=aarch64-linux-gnu -mcpu=neoverse-v2+norng %s -### 2>&1 | FileCheck %s --check-prefix=NEOVERSE-V2-NORNG -// NEOVERSE-V2-NORNG: "-target-feature" "-rand" - -// RUN: %clang --target=aarch64-linux-gnu -mcpu=neoverse-v2+rng %s -### 2>&1 | FileCheck %s --check-prefix=NEOVERSE-V2-RNG -// NEOVERSE-V2-RNG: "-target-feature" "+rand" - -// RUN: %clang --target=aarch64-linux-gnu -mcpu=neoverse-v2+nosha2 %s -### 2>&1 | FileCheck %s --check-prefix=NEOVERSE-V2-NOSHA2 -// NEOVERSE-V2-NOSHA2-NOT: "-target-feature" "+sha2" -// NEOVERSE-V2-NOSHA2-NOT: "-target-feature" "-sha2" - -// RUN: %clang --target=aarch64-linux-gnu -mcpu=neoverse-v2+sha2 %s -### 2>&1 | FileCheck %s --check-prefix=NEOVERSE-V2-SHA2 -// NEOVERSE-V2-SHA2: "-target-feature" "+sha2" diff --git a/clang/test/Driver/arm-sb.c b/clang/test/Driver/arm-sb.c index 9c0f381171cb6..a7987d582e2a6 100644 --- a/clang/test/Driver/arm-sb.c +++ b/clang/test/Driver/arm-sb.c @@ -14,3 +14,7 @@ // RUN: %clang -### -target aarch64-none-elf -march=armv8.5a+nosb %s 2>&1 | FileCheck %s --check-prefix=NOSB // ABSENT-NOT: "-target-feature" "+sb" // ABSENT-NOT: "-target-feature" "-sb" + +// RUN: %clang -### -target aarch64-none-elf -mcpu=neoverse-v2+sb %s 2>&1 | FileCheck %s --check-prefix=REDUNDANT +// REDUNDANT-NOT: "-target-feature" "+sb" +// REDUNDANT-NOT: "-target-feature" "-sb" >From 64acb9206e7be15e83076cf6e860e624787968fd Mon Sep 17 00:00:00 2001 From: yamash-fj <[email protected]> Date: Thu, 2 Jul 2026 17:28:23 +0900 Subject: [PATCH 4/4] [AArch64][Driver] Address review comments on AArch64 -mcpu no-feature handling Add a comment explaining why Enabled.set() is used instead of enable(). Remove setEnableIfMandatory(). Update the tests, aarch64-mcpu-no-feat.c and targetattr.c. Change the order of enabling CPU-default features and architecture-default features. As a result, a feature is omitted from the cc1-commandline if it is implied by both the CPU and the base architecture. Update the affected tests accordingly. --- clang/test/CodeGen/AArch64/targetattr.c | 36 ++++++++++++++++ clang/test/Driver/aarch64-dotprod.c | 2 +- .../Driver/aarch64-implied-sve-features.c | 2 +- clang/test/Driver/aarch64-mcpu-no-feat.c | 6 +++ clang/test/Driver/aarch64-predres.c | 2 +- clang/test/Driver/aarch64-ras.c | 4 +- clang/test/Driver/aarch64-rdm.c | 2 +- clang/test/Driver/arm-sb.c | 2 +- llvm/lib/TargetParser/AArch64TargetParser.cpp | 42 +++++++++---------- .../TargetParser/TargetParserTest.cpp | 26 ++++++------ 10 files changed, 82 insertions(+), 42 deletions(-) diff --git a/clang/test/CodeGen/AArch64/targetattr.c b/clang/test/CodeGen/AArch64/targetattr.c index fb4f72411ed0c..30e3824ce422f 100644 --- a/clang/test/CodeGen/AArch64/targetattr.c +++ b/clang/test/CodeGen/AArch64/targetattr.c @@ -215,6 +215,38 @@ __attribute__((target("+sme"))) // __arm_locally_streaming void plussmelocallystreaming(void) {} +__attribute__((target("cpu=neoverse-v2+nosve"))) +// CHECK-LABEL: define {{[^@]+}}@v2nosve +// CHECK-SAME: () #[[ATTR21:[0-9]+]] { +// CHECK-NEXT: entry: +// CHECK-NEXT: ret void +// +void v2nosve() {} + +__attribute__((target("cpu=neoverse-v2+norng"))) +// CHECK-LABEL: define {{[^@]+}}@v2norng +// CHECK-SAME: () #[[ATTR22:[0-9]+]] { +// CHECK-NEXT: entry: +// CHECK-NEXT: ret void +// +void v2norng() {} + +__attribute__((target("cpu=neoverse-v2+nosb"))) +// CHECK-LABEL: define {{[^@]+}}@v2nosb +// CHECK-SAME: () #[[ATTR23:[0-9]+]] { +// CHECK-NEXT: entry: +// CHECK-NEXT: ret void +// +void v2nosb() {} + +__attribute__((target("cpu=neoverse-v2+nosha2"))) +// CHECK-LABEL: define {{[^@]+}}@v2nosha2 +// CHECK-SAME: () #[[ATTR24:[0-9]+]] { +// CHECK-NEXT: entry: +// CHECK-NEXT: ret void +// +void v2nosha2() {} + //. // CHECK: attributes #[[ATTR0]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+crc,+fp-armv8,+lse,+neon,+ras,+rdm,+v8.1a,+v8.2a,+v8a" } // CHECK: attributes #[[ATTR1]] = { noinline nounwind optnone vscale_range(1,16) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+crc,+fp-armv8,+fullfp16,+lse,+neon,+ras,+rdm,+sve,+v8.1a,+v8.2a,+v8a" } @@ -237,6 +269,10 @@ __arm_locally_streaming void plussmelocallystreaming(void) {} // CHECK: attributes #[[ATTR18]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="apple-m4" "target-features"="+aes,+bf16,+bti,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fpac,+fullfp16,+i8mm,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+sme,+sme-f64f64,+sme-i16i64,+sme2,+spe-eef,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8.6a,+v8.7a,+v8a,+wfxt" } // CHECK: attributes #[[ATTR19]] = { noinline nounwind optnone vscale_range(1,16) "aarch64_pstate_sm_enabled" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+bf16,+fp-armv8,+fullfp16,+neon,+sme" } // CHECK: attributes #[[ATTR20]] = { noinline nounwind optnone vscale_range(1,16) "aarch64_pstate_sm_body" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+bf16,+fp-armv8,+fullfp16,+neon,+sme" } +// CHECK: attributes #[[ATTR21]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="neoverse-v2" "target-features"="+bf16,+bti,+ccidx,+complxnum,+crc,+dit,+dotprod,+ete,+flagm,+fp-armv8,+fp16fml,+fpac,+fullfp16,+i8mm,+jsconv,+lse,+mte,+neon,+pauth,+perfmon,+predres,+rand,+ras,+rcpc,+rdm,+sb,+spe,+ssbs,+trbe,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+v9a,-sve,-sve-bitperm,-sve2" } +// CHECK: attributes #[[ATTR22]] = { noinline nounwind optnone vscale_range(1,16) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="neoverse-v2" "target-features"="+bf16,+bti,+ccidx,+complxnum,+crc,+dit,+dotprod,+ete,+flagm,+fp-armv8,+fp16fml,+fpac,+fullfp16,+i8mm,+jsconv,+lse,+mte,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+spe,+ssbs,+sve,+sve-bitperm,+sve2,+trbe,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+v9a,-rand" } +// CHECK: attributes #[[ATTR23]] = { noinline nounwind optnone vscale_range(1,16) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="neoverse-v2" "target-features"="+bf16,+bti,+ccidx,+complxnum,+crc,+dit,+dotprod,+ete,+flagm,+fp-armv8,+fp16fml,+fpac,+fullfp16,+i8mm,+jsconv,+lse,+mte,+neon,+pauth,+perfmon,+predres,+rand,+ras,+rcpc,+rdm,+spe,+ssbs,+sve,+sve-bitperm,+sve2,+trbe,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+v9a,-sb" } +// CHECK: attributes #[[ATTR24]] = { noinline nounwind optnone vscale_range(1,16) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="neoverse-v2" "target-features"="+bf16,+bti,+ccidx,+complxnum,+crc,+dit,+dotprod,+ete,+flagm,+fp-armv8,+fp16fml,+fpac,+fullfp16,+i8mm,+jsconv,+lse,+mte,+neon,+pauth,+perfmon,+predres,+rand,+ras,+rcpc,+rdm,+sb,+spe,+ssbs,+sve,+sve-bitperm,+sve2,+trbe,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+v9a" } //. // CHECK: [[META0:![0-9]+]] = !{!"{{.*}}clang version {{.*}}"} //. diff --git a/clang/test/Driver/aarch64-dotprod.c b/clang/test/Driver/aarch64-dotprod.c index ecb0ea6d09520..5b043e7c0788a 100644 --- a/clang/test/Driver/aarch64-dotprod.c +++ b/clang/test/Driver/aarch64-dotprod.c @@ -9,5 +9,5 @@ // RUN: %clang -### --target=aarch64 -mcpu=cortex-a75 %s 2>&1 | FileCheck %s // RUN: %clang -### --target=aarch64 -mcpu=cortex-a76 %s 2>&1 | FileCheck %s // RUN: %clang -### --target=aarch64 -mcpu=cortex-a55 %s 2>&1 | FileCheck %s -// RUN: %clang -### --target=aarch64 -mcpu=cortex-r82 %s 2>&1 | FileCheck %s +// RUN: %clang -### --target=aarch64 -mcpu=cortex-r82 %s 2>&1 | FileCheck %s --check-prefix=CHECK-NONE // CHECK: "+dotprod" diff --git a/clang/test/Driver/aarch64-implied-sve-features.c b/clang/test/Driver/aarch64-implied-sve-features.c index 1bda2f529fc70..91c2310d75418 100644 --- a/clang/test/Driver/aarch64-implied-sve-features.c +++ b/clang/test/Driver/aarch64-implied-sve-features.c @@ -82,7 +82,7 @@ // SVE-MCPU-FEATURES-NOT: "-target-feature" "+sve-bitperm" // SVE-MCPU-FEATURES-NOT: "-target-feature" "+sve2-bitperm" // SVE-MCPU-FEATURES-NOT: "-target-feature" "+sve2" -// SVE-MCPU-FEATURES: "-target-feature" "+sve" +// SVE-MCPU-FEATURES-NOT: "-target-feature" "+sve" // RUN: %clang --target=aarch64-linux-gnu -mcpu=neoverse-n2+nosve+sve2 %s -### 2>&1 | FileCheck %s --check-prefix=SVE-MCPU-FEATURES-CONFLICT // SVE-MCPU-FEATURES-CONFLICT-NOT: "-target-feature" "+sve2-bitperm" diff --git a/clang/test/Driver/aarch64-mcpu-no-feat.c b/clang/test/Driver/aarch64-mcpu-no-feat.c index b04e99f37b963..8be04400e3b70 100644 --- a/clang/test/Driver/aarch64-mcpu-no-feat.c +++ b/clang/test/Driver/aarch64-mcpu-no-feat.c @@ -5,12 +5,18 @@ // RUN: %clang --target=aarch64-linux-gnu -mcpu=neoverse-v2+nosve %s -### 2>&1 | FileCheck %s --check-prefix=NEOVERSE-V2-NOSVE // NEOVERSE-V2-NOSVE: "-target-feature" "-sve" +// NEOVERSE-V2-NOSVE-NOT: "-target-feature" "+sve" +// NEOVERSE-V2-NOSVE: "-target-feature" "-sve2" +// NEOVERSE-V2-NOSVE-NOT: "-target-feature" "+sve" +// NEOVERSE-V2-NOSVE-NOT: "-target-feature" "+sve2" // RUN: %clang --target=aarch64-linux-gnu -mcpu=neoverse-v2+norng %s -### 2>&1 | FileCheck %s --check-prefix=NEOVERSE-V2-NORNG // NEOVERSE-V2-NORNG: "-target-feature" "-rand" +// NEOVERSE-V2-NORNG-NOT: "-target-feature" "+rand" // RUN: %clang --target=aarch64-linux-gnu -mcpu=neoverse-v2+nosb %s -### 2>&1 | FileCheck %s --check-prefix=NEOVERSE-V2-NOSB // NEOVERSE-V2-NOSB: "-target-feature" "-sb" +// NEOVERSE-V2-NOSB-NOT: "-target-feature" "+sb" // RUN: %clang --target=aarch64-linux-gnu -mcpu=neoverse-v2+nosha2 %s -### 2>&1 | FileCheck %s --check-prefix=NEOVERSE-V2-NOSHA2 // NEOVERSE-V2-NOSHA2-NOT: "-target-feature" "+sha2" diff --git a/clang/test/Driver/aarch64-predres.c b/clang/test/Driver/aarch64-predres.c index afa0830df7dd4..331f0c32be107 100644 --- a/clang/test/Driver/aarch64-predres.c +++ b/clang/test/Driver/aarch64-predres.c @@ -1,5 +1,5 @@ // RUN: %clang -### --target=aarch64-none-elf -march=armv8a+predres %s 2>&1 | FileCheck %s -// RUN: %clang -### --target=aarch64-none-elf -mcpu=cortex-a520 %s 2>&1 | FileCheck %s +// RUN: %clang -### --target=aarch64-none-elf -mcpu=cortex-a520 %s 2>&1 | FileCheck %s --check-prefix=ABSENT // CHECK: "-target-feature" "+predres" // CHECK-NOT: "-target-feature" "-predres" diff --git a/clang/test/Driver/aarch64-ras.c b/clang/test/Driver/aarch64-ras.c index c1e1f1b85a171..4cd438e9d7187 100644 --- a/clang/test/Driver/aarch64-ras.c +++ b/clang/test/Driver/aarch64-ras.c @@ -3,8 +3,8 @@ // RUN: %clang --target=aarch64-none-elf -march=armv8.2a+ras -### -c %s 2>&1 | FileCheck --check-prefix=CHECK-RAS %s // RUN: %clang --target=aarch64-none-elf -march=armv8-a+ras -### -c %s 2>&1 | FileCheck --check-prefix=CHECK-RAS %s // RUN: %clang --target=aarch64-none-elf -mcpu=generic+ras -### -c %s 2>&1 | FileCheck --check-prefix=CHECK-RAS %s -// RUN: %clang --target=aarch64-none-elf -mcpu=cortex-a75 -### -c %s 2>&1 | FileCheck --check-prefix=CHECK-RAS %s -// RUN: %clang --target=aarch64-none-elf -mcpu=cortex-a55 -### -c %s 2>&1 | FileCheck --check-prefix=CHECK-RAS %s +// RUN: %clang --target=aarch64-none-elf -mcpu=cortex-a75 -### -c %s 2>&1 | FileCheck --check-prefix=CHECK-ABSENT %s +// RUN: %clang --target=aarch64-none-elf -mcpu=cortex-a55 -### -c %s 2>&1 | FileCheck --check-prefix=CHECK-ABSENT %s // CHECK-RAS: "-target-feature" "+ras" // RUN: %clang --target=aarch64-none-elf -march=armv8a+noras -### -c %s 2>&1 | FileCheck --check-prefix=CHECK-ABSENT %s diff --git a/clang/test/Driver/aarch64-rdm.c b/clang/test/Driver/aarch64-rdm.c index 62e1a4def4ce1..07f00bef95cea 100644 --- a/clang/test/Driver/aarch64-rdm.c +++ b/clang/test/Driver/aarch64-rdm.c @@ -2,7 +2,7 @@ // RUN: %clang --target=aarch64-none-elf -march=armv8a+rdma -### -c %s 2>&1 | FileCheck --check-prefix=CHECK-RDM %s // RUN: %clang --target=aarch64-none-elf -mcpu=generic+rdm -### -c %s 2>&1 | FileCheck --check-prefix=CHECK-RDM %s // RUN: %clang --target=aarch64-none-elf -mcpu=falkor -### -c %s 2>&1 | FileCheck --check-prefix=CHECK-RDM %s -// RUN: %clang --target=aarch64-none-elf -mcpu=thunderx2t99 -### -c %s 2>&1 | FileCheck --check-prefix=CHECK-RDM %s +// RUN: %clang --target=aarch64-none-elf -mcpu=thunderx2t99 -### -c %s 2>&1 | FileCheck --check-prefix=CHECK-NORDM %s // CHECK-RDM: "-target-feature" "+rdm" // RUN: %clang --target=aarch64-none-elf -march=armv8a+nordm -### -c %s 2>&1 | FileCheck --check-prefix=CHECK-NORDM %s diff --git a/clang/test/Driver/arm-sb.c b/clang/test/Driver/arm-sb.c index a7987d582e2a6..03c24f795efa2 100644 --- a/clang/test/Driver/arm-sb.c +++ b/clang/test/Driver/arm-sb.c @@ -1,6 +1,6 @@ // RUN: %clang -### -target arm-none-none-eabi -march=armv8a+sb %s 2>&1 | FileCheck %s // RUN: %clang -### -target aarch64-none-elf -march=armv8a+sb %s 2>&1 | FileCheck %s -// RUN: %clang -### -target aarch64-none-elf -mcpu=cortex-a510 %s 2>&1 | FileCheck %s +// RUN: %clang -### -target aarch64-none-elf -mcpu=cortex-a510 %s 2>&1 | FileCheck %s --check-prefix=ABSENT // CHECK: "-target-feature" "+sb" // CHECK-NOT: "-target-feature" "-sb" diff --git a/llvm/lib/TargetParser/AArch64TargetParser.cpp b/llvm/lib/TargetParser/AArch64TargetParser.cpp index 94d70a8057330..f684d7b297e7f 100644 --- a/llvm/lib/TargetParser/AArch64TargetParser.cpp +++ b/llvm/lib/TargetParser/AArch64TargetParser.cpp @@ -41,7 +41,8 @@ const AArch64::ArchInfo *AArch64::getArchForCpu(StringRef CPU) { return &Cpu->Arch; } -std::optional<AArch64::ArchInfo> AArch64::ArchInfo::findBySubArch(StringRef SubArch) { +std::optional<AArch64::ArchInfo> +AArch64::ArchInfo::findBySubArch(StringRef SubArch) { for (const auto *A : AArch64::ArchInfos) if (A->getSubArch() == SubArch) return *A; @@ -103,9 +104,8 @@ APInt AArch64::getCpuSupportsMask(ArrayRef<StringRef> Features) { return FeaturesMask; } -bool AArch64::getExtensionFeatures( - const AArch64::ExtensionBitset &InputExts, - std::vector<StringRef> &Features) { +bool AArch64::getExtensionFeatures(const AArch64::ExtensionBitset &InputExts, + std::vector<StringRef> &Features) { for (const auto &E : Extensions) /* INVALID and NONE have no feature name. */ if (InputExts.test(E.ID) && !E.PosTargetFeature.empty()) @@ -138,7 +138,8 @@ void AArch64::fillValidCPUArchList(SmallVectorImpl<StringRef> &Values) { Values.push_back(C.Name); for (const auto &Alias : CpuAliases) - // The apple-latest alias is backend only, do not expose it to clang's -mcpu. + // The apple-latest alias is backend only, do not expose it to clang's + // -mcpu. if (Alias.AltName != "apple-latest") Values.push_back(Alias.AltName); @@ -211,8 +212,7 @@ std::optional<AArch64::CpuInfo> AArch64::parseCpu(StringRef Name) { void AArch64::PrintSupportedExtensions() { outs() << "All available -march extensions for AArch64\n\n" << " " << left_justify("Name", 20) - << left_justify("Architecture Feature(s)", 55) - << "Description\n"; + << left_justify("Architecture Feature(s)", 55) << "Description\n"; for (const auto &Ext : Extensions) { // Extensions without a feature cannot be used with -march. if (!Ext.UserVisibleName.empty() && !Ext.PosTargetFeature.empty()) { @@ -225,8 +225,8 @@ void AArch64::PrintSupportedExtensions() { } } -void -AArch64::printEnabledExtensions(const std::set<StringRef> &EnabledFeatureNames) { +void AArch64::printEnabledExtensions( + const std::set<StringRef> &EnabledFeatureNames) { outs() << "Extensions enabled for the given AArch64 target\n\n" << " " << left_justify("Architecture Feature(s)", 55) << "Description\n"; @@ -244,8 +244,7 @@ AArch64::printEnabledExtensions(const std::set<StringRef> &EnabledFeatureNames) for (const auto &Ext : EnabledExtensionsInfo) { outs() << " " - << format("%-55s%s\n", - Ext.ArchFeatureName.str().c_str(), + << format("%-55s%s\n", Ext.ArchFeatureName.str().c_str(), Ext.Description.str().c_str()); } } @@ -262,7 +261,8 @@ void AArch64::ExtensionSet::enable(ArchExtKind E) { if (Enabled.test(E)) return; - LLVM_DEBUG(llvm::dbgs() << "Enable " << lookupExtensionByID(E).UserVisibleName << "\n"); + LLVM_DEBUG(llvm::dbgs() << "Enable " << lookupExtensionByID(E).UserVisibleName + << "\n"); Touched.set(E); Enabled.set(E); @@ -321,7 +321,7 @@ void AArch64::ExtensionSet::disable(ArchExtKind E) { if (E == AEK_SVE2SHA3) disable(AEK_SVESHA3); - if (E == AEK_SVE2BITPERM){ + if (E == AEK_SVE2BITPERM) { disable(AEK_SVEBITPERM); disable(AEK_SVE2); } @@ -329,7 +329,8 @@ void AArch64::ExtensionSet::disable(ArchExtKind E) { if (!Enabled.test(E)) return; - LLVM_DEBUG(llvm::dbgs() << "Disable " << lookupExtensionByID(E).UserVisibleName << "\n"); + LLVM_DEBUG(llvm::dbgs() << "Disable " + << lookupExtensionByID(E).UserVisibleName << "\n"); Touched.set(E); Enabled.reset(E); @@ -340,20 +341,19 @@ void AArch64::ExtensionSet::disable(ArchExtKind E) { disable(Dep.Later); } -static void setEnableIfMandatory(AArch64::ExtensionSet &Exts, - AArch64::ExtensionInfo E) { - if (Exts.BaseArch->DefaultExts.test(E.ID)) - Exts.Enabled.set(E.ID); -} - void AArch64::ExtensionSet::addCPUDefaults(const CpuInfo &CPU) { LLVM_DEBUG(llvm::dbgs() << "addCPUDefaults(" << CPU.Name << ")\n"); BaseArch = &CPU.Arch; + // Enabling the default extensions for the base-architecture is used for the + // explicit +no<feature>. Does not call enable() because we do not want to set + // Touched to avoid marking redundant features in the cc1 command-line. for (const auto &E : Extensions) + if (BaseArch->DefaultExts.test(E.ID)) + Enabled.set(E.ID); + for (const auto &E : Extensions) { if (CPU.DefaultExtensions.test(E.ID)) enable(E.ID); - setEnableIfMandatory(*this, E); } } diff --git a/llvm/unittests/TargetParser/TargetParserTest.cpp b/llvm/unittests/TargetParser/TargetParserTest.cpp index 77dede040e440..325be31fdd001 100644 --- a/llvm/unittests/TargetParser/TargetParserTest.cpp +++ b/llvm/unittests/TargetParser/TargetParserTest.cpp @@ -103,6 +103,7 @@ template <ARM::ISAKind ISAKind> struct AssertSameExtensionFlags { FormatExtensionFlags(GotFlags), GotFlags, CPUName, FormatExtensionFlags(ExpectedFlags ^ GotFlags)); } + private: StringRef CPUName; }; @@ -2284,28 +2285,25 @@ INSTANTIATE_TEST_SUITE_P( AArch64ExtensionDependenciesBaseCPUTestParams AArch64ExtensionDependenciesCPUData[] = { // Base CPU features - {"cortex-a57", - {}, - {"v8a", "aes", "crc", "fp-armv8", "sha2", "neon"}, - {}}, + {"cortex-a57", {}, {"v8a", "aes", "crc", "sha2"}, {"fp-armv8", "neon"}}, {"cortex-r82", {}, - {"v8r", "crc", "dotprod", "fp-armv8", "fullfp16", "fp16fml", "lse", - "ras", "rcpc", "rdm", "sb", "neon", "ssbs"}, - {}}, + {"v8r"}, + {"crc", "dotprod", "fp-armv8", "fullfp16", "fp16fml", "lse", "ras", + "rcpc", "rdm", "sb", "neon", "ssbs"}}, {"cortex-a520", {}, - {"v9.2a", "bf16", "crc", "dotprod", "flagm", "fp-armv8", - "fullfp16", "fp16fml", "i8mm", "lse", "mte", "pauth", - "perfmon", "predres", "ras", "rcpc", "rdm", "sb", - "neon", "ssbs", "sve", "sve-bitperm", "sve2"}, - {}}, + {"v9.2a", "fp16fml", "mte", "perfmon", "sve-bitperm"}, + {"bf16", "crc", "dotprod", "flagm", "fp-armv8", "fullfp16", "i8mm", + "lse", "pauth", "predres", "ras", "rcpc", "rdm", "sb", "neon", "ssbs", + "sve", "sve2"}}, // Negative modifiers {"cortex-r82", {"nofp"}, - {"v8r", "crc", "lse", "ras", "rcpc", "sb", "ssbs"}, - {"fp-armv8", "neon", "fullfp16", "fp16fml", "dotprod", "rdm"}}, + {"v8r"}, + {"crc", "lse", "ras", "rcpc", "sb", "ssbs", "fp-armv8", "neon", + "fullfp16", "fp16fml", "dotprod", "rdm"}}, }; INSTANTIATE_TEST_SUITE_P( _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
