================
@@ -206,6 +206,8 @@ BitVector HexagonRegisterInfo::getReservedRegs(const
MachineFunction &MF)
Reserved.set(Reg);
static const MCPhysReg RRegs[] = {
+ Hexagon::R6, Hexagon::R7, Hexagon::R8, Hexagon::R9, Hexagon::R10,
----------------
quic-asaravan wrote:
What happens when a user reserves R6 in one translation unit and it's linked
against code compiled without --fifixed-r6? will the callee not clobber R6?
Should we provide a diagnostic or warning when the user reserves a caller-saved
register? RISC-V backend has `validateCCReservedRegs()` in
`RISCVISelLowering.cpp` that emits a diagnostic error when a user-reserved
register is used for argument passing
https://github.com/llvm/llvm-project/pull/205733
_______________________________________________
cfe-commits mailing list
[email protected]
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
