https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/204523
>From a7d852cadb8d8202ce1ff0c8f7362468346aa13b Mon Sep 17 00:00:00 2001 From: Matt Arsenault <[email protected]> Date: Wed, 17 Jun 2026 21:16:16 +0200 Subject: [PATCH] AMDGPU: Add subtarget feature for controllable xnack modes This replaces the previously removed xnack-any-only feature, with the inversion xnack-on-off-modes. All pre-gfx12.5 xnack targets support the controllable mode. Ignore explicitly set xnack settings the same way as is done for xnack requests on other unsupported targets. --- clang/lib/Basic/TargetID.cpp | 3 +- clang/lib/Driver/ToolChains/AMDGPU.cpp | 7 +-- clang/test/Driver/invalid-target-id.cl | 21 +++++++++ .../llvm/TargetParser/AMDGPUTargetParser.def | 44 +++++++++---------- .../llvm/TargetParser/AMDGPUTargetParser.h | 4 +- llvm/lib/Target/AMDGPU/AMDGPU.td | 20 ++++++--- .../AMDGPU/AMDGPUTargetTransformInfo.cpp | 1 + llvm/lib/Target/AMDGPU/GCNSubtarget.cpp | 4 +- .../MCTargetDesc/AMDGPUTargetStreamer.h | 10 +---- .../Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp | 24 +++++----- llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h | 3 +- .../AMDGPU/target-id-xnack-always-on.ll | 22 ++++++++++ 12 files changed, 105 insertions(+), 58 deletions(-) create mode 100644 llvm/test/CodeGen/AMDGPU/target-id-xnack-always-on.ll diff --git a/clang/lib/Basic/TargetID.cpp b/clang/lib/Basic/TargetID.cpp index 6d9ba55ccd9d7..67f429607ef27 100644 --- a/clang/lib/Basic/TargetID.cpp +++ b/clang/lib/Basic/TargetID.cpp @@ -32,7 +32,8 @@ getAllPossibleAMDGPUTargetIDFeatures(const llvm::Triple &T, : llvm::AMDGPU::getArchAttrR600(ProcKind); if (Features & llvm::AMDGPU::FEATURE_SRAMECC) Ret.push_back("sramecc"); - if (Features & llvm::AMDGPU::FEATURE_XNACK) + // Only allow xnack in target ID if the processor supports on/off modes. + if (Features & llvm::AMDGPU::FEATURE_XNACK_ON_OFF_MODES) Ret.push_back("xnack"); return Ret; } diff --git a/clang/lib/Driver/ToolChains/AMDGPU.cpp b/clang/lib/Driver/ToolChains/AMDGPU.cpp index ddc26604a8006..b57579f135b36 100644 --- a/clang/lib/Driver/ToolChains/AMDGPU.cpp +++ b/clang/lib/Driver/ToolChains/AMDGPU.cpp @@ -1130,9 +1130,10 @@ static bool isXnackAvailable(const llvm::Triple &TT, llvm::StringRef TargetID) { auto Features = TT.isAMDGCN() ? llvm::AMDGPU::getArchAttrAMDGCN(ProcKind) : llvm::AMDGPU::getArchAttrR600(ProcKind); - // If processor has xnack always on, Address sanitizer is supported - bool XnackAvailable = (Features & llvm::AMDGPU::FEATURE_XNACK_ALWAYS); - if (XnackAvailable) + // If processor has xnack but doesn't support on/off modes, xnack is always on + bool XnackAlwaysOn = (Features & llvm::AMDGPU::FEATURE_XNACK) && + !(Features & llvm::AMDGPU::FEATURE_XNACK_ON_OFF_MODES); + if (XnackAlwaysOn) return true; // Otherwise, check if xnack+ is explicitly enabled in the target ID diff --git a/clang/test/Driver/invalid-target-id.cl b/clang/test/Driver/invalid-target-id.cl index 4f6f140437885..f93e618e460be 100644 --- a/clang/test/Driver/invalid-target-id.cl +++ b/clang/test/Driver/invalid-target-id.cl @@ -39,3 +39,24 @@ // RUN: %s 2>&1 | FileCheck -check-prefix=NOCOLON %s // NOCOLON: error: invalid target ID 'gfx900+xnack' + +// gfx1250 and gfx12-5-generic do not support xnack on/off modes +// RUN: not %clang -target amdgcn-amd-amdhsa \ +// RUN: -mcpu=gfx1250:xnack+ -nostdlib \ +// RUN: %s 2>&1 | FileCheck -check-prefix=XNACK-MODE-GFX1250 %s + +// RUN: not %clang -target amdgcn-amd-amdhsa \ +// RUN: -mcpu=gfx1250:xnack- -nostdlib \ +// RUN: %s 2>&1 | FileCheck -check-prefix=XNACK-MODE-GFX1250 %s + +// XNACK-MODE-GFX1250: error: invalid target ID 'gfx1250:xnack{{[+-]}}' + +// RUN: not %clang -target amdgcn-amd-amdhsa \ +// RUN: -mcpu=gfx12-5-generic:xnack+ -nostdlib \ +// RUN: %s 2>&1 | FileCheck -check-prefix=XNACK-MODE-GFX125 %s + +// RUN: not %clang -target amdgcn-amd-amdhsa \ +// RUN: -mcpu=gfx12-5-generic:xnack- -nostdlib \ +// RUN: %s 2>&1 | FileCheck -check-prefix=XNACK-MODE-GFX125 %s + +// XNACK-MODE-GFX125: error: invalid target ID 'gfx12-5-generic:xnack{{[+-]}}' diff --git a/llvm/include/llvm/TargetParser/AMDGPUTargetParser.def b/llvm/include/llvm/TargetParser/AMDGPUTargetParser.def index d15fc01f30019..dcc0c28b1ee74 100644 --- a/llvm/include/llvm/TargetParser/AMDGPUTargetParser.def +++ b/llvm/include/llvm/TargetParser/AMDGPUTargetParser.def @@ -76,7 +76,7 @@ AMDGCN_GPU_ALIAS("mullins", GK_GFX703) AMDGCN_GPU ("gfx704", GK_GFX704, ( 7, 0, 4), FEATURE_NONE) AMDGCN_GPU_ALIAS("bonaire", GK_GFX704) AMDGCN_GPU ("gfx705", GK_GFX705, ( 7, 0, 5), FEATURE_NONE) -AMDGCN_GPU ("gfx801", GK_GFX801, ( 8, 0, 1), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK) +AMDGCN_GPU ("gfx801", GK_GFX801, ( 8, 0, 1), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK|FEATURE_XNACK_ON_OFF_MODES) AMDGCN_GPU_ALIAS("carrizo", GK_GFX801) AMDGCN_GPU ("gfx802", GK_GFX802, ( 8, 0, 2), FEATURE_FAST_DENORMAL_F32) AMDGCN_GPU_ALIAS("iceland", GK_GFX802) @@ -87,22 +87,22 @@ AMDGCN_GPU_ALIAS("polaris10", GK_GFX803) AMDGCN_GPU_ALIAS("polaris11", GK_GFX803) AMDGCN_GPU ("gfx805", GK_GFX805, ( 8, 0, 5), FEATURE_FAST_DENORMAL_F32) AMDGCN_GPU_ALIAS("tongapro", GK_GFX805) -AMDGCN_GPU ("gfx810", GK_GFX810, ( 8, 1, 0), FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK) +AMDGCN_GPU ("gfx810", GK_GFX810, ( 8, 1, 0), FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK|FEATURE_XNACK_ON_OFF_MODES) AMDGCN_GPU_ALIAS("stoney", GK_GFX810) -AMDGCN_GPU ("gfx900", GK_GFX900, ( 9, 0, 0), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK) -AMDGCN_GPU ("gfx902", GK_GFX902, ( 9, 0, 2), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK) -AMDGCN_GPU ("gfx904", GK_GFX904, ( 9, 0, 4), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK) -AMDGCN_GPU ("gfx906", GK_GFX906, ( 9, 0, 6), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK|FEATURE_SRAMECC) -AMDGCN_GPU ("gfx908", GK_GFX908, ( 9, 0, 8), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK|FEATURE_SRAMECC) -AMDGCN_GPU ("gfx909", GK_GFX909, ( 9, 0, 9), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK) -AMDGCN_GPU ("gfx90a", GK_GFX90A, ( 9, 0, 10), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK|FEATURE_SRAMECC) -AMDGCN_GPU ("gfx90c", GK_GFX90C, ( 9, 0, 12), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK) -AMDGCN_GPU ("gfx942", GK_GFX942, ( 9, 4, 2), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK|FEATURE_SRAMECC) -AMDGCN_GPU ("gfx950", GK_GFX950, ( 9, 5, 0), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK|FEATURE_SRAMECC) -AMDGCN_GPU ("gfx1010", GK_GFX1010, (10, 1, 0), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_XNACK|FEATURE_WGP) -AMDGCN_GPU ("gfx1011", GK_GFX1011, (10, 1, 1), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_XNACK|FEATURE_WGP) -AMDGCN_GPU ("gfx1012", GK_GFX1012, (10, 1, 2), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_XNACK|FEATURE_WGP) -AMDGCN_GPU ("gfx1013", GK_GFX1013, (10, 1, 3), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_XNACK|FEATURE_WGP) +AMDGCN_GPU ("gfx900", GK_GFX900, ( 9, 0, 0), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK|FEATURE_XNACK_ON_OFF_MODES) +AMDGCN_GPU ("gfx902", GK_GFX902, ( 9, 0, 2), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK|FEATURE_XNACK_ON_OFF_MODES) +AMDGCN_GPU ("gfx904", GK_GFX904, ( 9, 0, 4), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK|FEATURE_XNACK_ON_OFF_MODES) +AMDGCN_GPU ("gfx906", GK_GFX906, ( 9, 0, 6), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK|FEATURE_XNACK_ON_OFF_MODES|FEATURE_SRAMECC) +AMDGCN_GPU ("gfx908", GK_GFX908, ( 9, 0, 8), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK|FEATURE_XNACK_ON_OFF_MODES|FEATURE_SRAMECC) +AMDGCN_GPU ("gfx909", GK_GFX909, ( 9, 0, 9), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK|FEATURE_XNACK_ON_OFF_MODES) +AMDGCN_GPU ("gfx90a", GK_GFX90A, ( 9, 0, 10), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK|FEATURE_XNACK_ON_OFF_MODES|FEATURE_SRAMECC) +AMDGCN_GPU ("gfx90c", GK_GFX90C, ( 9, 0, 12), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK|FEATURE_XNACK_ON_OFF_MODES) +AMDGCN_GPU ("gfx942", GK_GFX942, ( 9, 4, 2), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK|FEATURE_XNACK_ON_OFF_MODES|FEATURE_SRAMECC) +AMDGCN_GPU ("gfx950", GK_GFX950, ( 9, 5, 0), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK|FEATURE_XNACK_ON_OFF_MODES|FEATURE_SRAMECC) +AMDGCN_GPU ("gfx1010", GK_GFX1010, (10, 1, 0), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_XNACK|FEATURE_XNACK_ON_OFF_MODES|FEATURE_WGP) +AMDGCN_GPU ("gfx1011", GK_GFX1011, (10, 1, 1), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_XNACK|FEATURE_XNACK_ON_OFF_MODES|FEATURE_WGP) +AMDGCN_GPU ("gfx1012", GK_GFX1012, (10, 1, 2), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_XNACK|FEATURE_XNACK_ON_OFF_MODES|FEATURE_WGP) +AMDGCN_GPU ("gfx1013", GK_GFX1013, (10, 1, 3), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_XNACK|FEATURE_XNACK_ON_OFF_MODES|FEATURE_WGP) AMDGCN_GPU ("gfx1030", GK_GFX1030, (10, 3, 0), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_WGP) AMDGCN_GPU ("gfx1031", GK_GFX1031, (10, 3, 1), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_WGP) AMDGCN_GPU ("gfx1032", GK_GFX1032, (10, 3, 2), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_WGP) @@ -123,8 +123,8 @@ AMDGCN_GPU ("gfx1171", GK_GFX1171, (11, 7, 1), FEATURE_FAST_FMA_F32|FEAT AMDGCN_GPU ("gfx1172", GK_GFX1172, (11, 7, 2), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_WGP) AMDGCN_GPU ("gfx1200", GK_GFX1200, (12, 0, 0), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_WGP) AMDGCN_GPU ("gfx1201", GK_GFX1201, (12, 0, 1), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_WGP) -AMDGCN_GPU ("gfx1250", GK_GFX1250, (12, 5, 0), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_XNACK_ALWAYS|FEATURE_SRAMECC) -AMDGCN_GPU ("gfx1251", GK_GFX1251, (12, 5, 1), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_XNACK_ALWAYS|FEATURE_SRAMECC) +AMDGCN_GPU ("gfx1250", GK_GFX1250, (12, 5, 0), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_XNACK|FEATURE_SRAMECC) +AMDGCN_GPU ("gfx1251", GK_GFX1251, (12, 5, 1), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_XNACK|FEATURE_SRAMECC) AMDGCN_GPU ("gfx1310", GK_GFX1310, (13, 1, 0), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_WGP) // Generic targets return the lowest common denominator @@ -140,13 +140,13 @@ AMDGCN_GPU ("gfx1310", GK_GFX1310, (13, 1, 0), FEATURE_FAST_FMA_F32|FEAT // // TODO: Split up this API depending on its caller so // generic target handling is more obvious and less risky. -AMDGCN_GPU ("gfx9-generic", GK_GFX9_GENERIC, ( 9, 0, 0), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK) -AMDGCN_GPU ("gfx10-1-generic", GK_GFX10_1_GENERIC, (10, 1, 0), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_XNACK|FEATURE_WGP) +AMDGCN_GPU ("gfx9-generic", GK_GFX9_GENERIC, ( 9, 0, 0), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK|FEATURE_XNACK_ON_OFF_MODES) +AMDGCN_GPU ("gfx10-1-generic", GK_GFX10_1_GENERIC, (10, 1, 0), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_XNACK|FEATURE_XNACK_ON_OFF_MODES|FEATURE_WGP) AMDGCN_GPU ("gfx10-3-generic", GK_GFX10_3_GENERIC, (10, 3, 0), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_WGP) AMDGCN_GPU ("gfx11-generic", GK_GFX11_GENERIC, (11, 0, 3), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_WGP) AMDGCN_GPU ("gfx12-generic", GK_GFX12_GENERIC, (12, 0, 0), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_WGP) -AMDGCN_GPU ("gfx9-4-generic", GK_GFX9_4_GENERIC, ( 9, 4, 0), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK|FEATURE_SRAMECC) -AMDGCN_GPU ("gfx12-5-generic", GK_GFX12_5_GENERIC, (12, 5, 0), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_XNACK_ALWAYS) +AMDGCN_GPU ("gfx9-4-generic", GK_GFX9_4_GENERIC, ( 9, 4, 0), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_XNACK|FEATURE_XNACK_ON_OFF_MODES|FEATURE_SRAMECC) +AMDGCN_GPU ("gfx12-5-generic", GK_GFX12_5_GENERIC, (12, 5, 0), FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32|FEATURE_XNACK) #undef AMDGCN_GPU #undef AMDGCN_GPU_ALIAS diff --git a/llvm/include/llvm/TargetParser/AMDGPUTargetParser.h b/llvm/include/llvm/TargetParser/AMDGPUTargetParser.h index 7c192b36b6ec8..1288f4cd69ff0 100644 --- a/llvm/include/llvm/TargetParser/AMDGPUTargetParser.h +++ b/llvm/include/llvm/TargetParser/AMDGPUTargetParser.h @@ -72,8 +72,8 @@ enum ArchFeatureKind : uint32_t { // WGP mode is supported. FEATURE_WGP = 1 << 9, - // Xnack is available by default - FEATURE_XNACK_ALWAYS = 1 << 10 + // Xnack on/off modes are supported. + FEATURE_XNACK_ON_OFF_MODES = 1 << 10 }; enum FeatureError : uint32_t { diff --git a/llvm/lib/Target/AMDGPU/AMDGPU.td b/llvm/lib/Target/AMDGPU/AMDGPU.td index 524d8e8e31b1b..90ab59f1ce9d3 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPU.td +++ b/llvm/lib/Target/AMDGPU/AMDGPU.td @@ -207,6 +207,13 @@ def FeatureSupportsXNACK : SubtargetFeature<"xnack-support", "Hardware supports XNACK" >; +defm XNACKOnOffModes : AMDGPUSubtargetFeature<"xnack-on-off-modes", + "Target supports XNACK on/off modes", + /*GenPredicate=*/1, + /*GenAssemblerPredicate=*/0, + [FeatureSupportsXNACK] +>; + // XNACK is disabled if SH_MEM_CONFIG.ADDRESS_MODE = GPUVM on chips that support // XNACK. The current default kernel driver setting is: // - graphics ring: XNACK disabled @@ -217,7 +224,8 @@ def FeatureSupportsXNACK : SubtargetFeature<"xnack-support", def FeatureXNACK : SubtargetFeature<"xnack", "EnableXNACK", "true", - "Enable XNACK support" + "Enable XNACK support", + [FeatureSupportsXNACK] >; def FeatureTgSplit : SubtargetFeature<"tgsplit", @@ -1498,7 +1506,7 @@ def FeatureGFX9 : GCNSubtargetFeatureGeneration<"GFX9", FeatureFlatInstOffsets, FeatureFlatGlobalInsts, FeatureFlatScratchInsts, FeatureAddNoCarryInsts, FeatureGFX8Insts, FeatureGFX7GFX8GFX9Insts, FeatureScalarFlatScratchInsts, FeatureScalarAtomics, FeatureR128A16, - FeatureA16, FeatureSMemTimeInst, FeatureFastDenormalF32, FeatureSupportsXNACK, + FeatureA16, FeatureSMemTimeInst, FeatureFastDenormalF32, FeatureXNACKOnOffModes, FeatureUnalignedBufferAccess, FeatureUnalignedScratchAccess, FeatureUnalignedDSAccess, FeatureNegativeScratchOffsetBug, FeatureGWS, FeatureDefaultComponentZero,FeatureVmemWriteVgprInOrder, FeatureVMemToLDSLoad, @@ -1678,7 +1686,7 @@ def FeatureISAVersion8_0_1 : FeatureSet< !listconcat(FeatureISAVersion8_0_Common.Features, [FeatureFastFMAF32, FeatureHalfRate64Ops, - FeatureSupportsXNACK])>; + FeatureXNACKOnOffModes])>; def FeatureISAVersion8_0_2 : FeatureSet< !listconcat(FeatureISAVersion8_0_Common.Features, @@ -1695,7 +1703,7 @@ def FeatureISAVersion8_0_5 : FeatureSet< def FeatureISAVersion8_1_0 : FeatureSet< [FeatureVolcanicIslands, FeatureLDSBankCount16, - FeatureSupportsXNACK, + FeatureXNACKOnOffModes, FeatureImageStoreD16Bug, FeatureImageGather4D16Bug]>; @@ -1890,7 +1898,7 @@ def FeatureISAVersion10_1_Common : FeatureSet< FeatureMadMacF32Insts, FeatureDsSrc2Insts, FeatureLDSMisalignedBug, - FeatureSupportsXNACK, + FeatureXNACKOnOffModes, // gfx101x bugs FeatureVcmpxPermlaneHazard, FeatureVMEMtoScalarWriteHazard, @@ -2196,7 +2204,6 @@ def FeatureISAVersion12_50_Common : FeatureSet< FeatureSetPrioIncWgInst, FeatureSWakeupBarrier, Feature45BitNumRecordsBufferResource, - FeatureSupportsXNACK, FeatureXNACK, FeatureClusters, FeatureD16Writes32BitVgpr, @@ -2261,6 +2268,7 @@ def FeatureISAVersion12_5_Generic: FeatureSet< [FeatureAddressableLocalMemorySize327680, FeatureSetregVGPRMSBFixup, FeatureRequiresCOV6, + FeatureSupportsXNACK, FeatureGFX125xLowestRateWMMA, FeatureTransCoexecutionHazard])>; diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp index ce7e22436f33f..03a046bcb9142 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp @@ -293,6 +293,7 @@ const FeatureBitset GCNTTIImpl::InlineFeatureIgnoreList = { // Property of the kernel/environment which can't actually differ. AMDGPU::FeatureSGPRInitBug, AMDGPU::FeatureXNACK, + AMDGPU::FeatureXNACKOnOffModes, AMDGPU::FeatureSupportsXNACK, AMDGPU::FeatureTrapHandler, // The default assumption needs to be ecc is enabled, but no directly diff --git a/llvm/lib/Target/AMDGPU/GCNSubtarget.cpp b/llvm/lib/Target/AMDGPU/GCNSubtarget.cpp index 14de6753d42e4..55edfc2ea52d2 100644 --- a/llvm/lib/Target/AMDGPU/GCNSubtarget.cpp +++ b/llvm/lib/Target/AMDGPU/GCNSubtarget.cpp @@ -157,8 +157,6 @@ GCNSubtarget &GCNSubtarget::initializeSubtargetDependencies(const Triple &TT, assert(llvm::isPowerOf2_32(InstCacheLineSize) && "InstCacheLineSize must be a power of 2"); - TargetID.setTargetIDFromFeaturesString(FS); - LLVM_DEBUG(dbgs() << "xnack setting for subtarget: " << TargetID.getXnackSetting() << '\n'); LLVM_DEBUG(dbgs() << "sramecc setting for subtarget: " @@ -182,7 +180,7 @@ GCNSubtarget::GCNSubtarget(const Triple &TT, StringRef GPU, StringRef FS, : // clang-format off AMDGPUGenSubtargetInfo(TT, GPU, /*TuneCPU*/ GPU, FS), AMDGPUSubtarget(TT), - TargetID(*this), + TargetID(*this, FS), InstrItins(getInstrItineraryForCPU(GPU)), BufferOOBRelaxed(BufferOOBRelaxed), TBufferOOBRelaxed(TBufferOOBRelaxed), diff --git a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.h b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.h index ca1fe3ccf3da1..dc9636c6c2105 100644 --- a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.h +++ b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.h @@ -139,15 +139,9 @@ class AMDGPUTargetStreamer : public MCTargetStreamer { std::optional<AMDGPU::IsaInfo::AMDGPUTargetID> &getTargetID() { return TargetID; } - void initializeTargetID(const MCSubtargetInfo &STI) { - assert(TargetID == std::nullopt && "TargetID can only be initialized once"); - TargetID.emplace(STI); - } void initializeTargetID(const MCSubtargetInfo &STI, StringRef FeatureString) { - initializeTargetID(STI); - - assert(getTargetID() != std::nullopt && "TargetID is None"); - getTargetID()->setTargetIDFromFeaturesString(FeatureString); + assert(TargetID == std::nullopt && "TargetID can only be initialized once"); + TargetID.emplace(STI, FeatureString); } }; diff --git a/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp b/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp index cfa9a59d3ded2..e1e83ece32ad0 100644 --- a/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp +++ b/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp @@ -1099,20 +1099,19 @@ VOPD::InstInfo getVOPDInstInfo(unsigned VOPDOpcode, namespace IsaInfo { -AMDGPUTargetID::AMDGPUTargetID(const MCSubtargetInfo &STI) - : STI(STI), XnackSetting(TargetIDSetting::Any), - SramEccSetting(TargetIDSetting::Any) { - if (!STI.getFeatureBits().test(FeatureSupportsXNACK)) - XnackSetting = TargetIDSetting::Unsupported; - if (!STI.getFeatureBits().test(FeatureSupportsSRAMECC)) - SramEccSetting = TargetIDSetting::Unsupported; -} +AMDGPUTargetID::AMDGPUTargetID(const MCSubtargetInfo &STI, + StringRef FeatureString) + : STI(STI), XnackSetting(STI.getFeatureBits().test(FeatureSupportsXNACK) + ? TargetIDSetting::Any + : TargetIDSetting::Unsupported), + SramEccSetting(STI.getFeatureBits().test(FeatureSupportsSRAMECC) + ? TargetIDSetting::Any + : TargetIDSetting::Unsupported) { -void AMDGPUTargetID::setTargetIDFromFeaturesString(StringRef FS) { // Check if xnack or sramecc is explicitly enabled or disabled. In the // absence of the target features we assume we must generate code that can run // in any environment. - SubtargetFeatures Features(FS); + SubtargetFeatures Features(FeatureString); std::optional<bool> XnackRequested; std::optional<bool> SramEccRequested; @@ -1127,7 +1126,10 @@ void AMDGPUTargetID::setTargetIDFromFeaturesString(StringRef FS) { SramEccRequested = false; } - bool XnackSupported = isXnackSupported(); + // Only allow changing xnack setting if the target supports on/off modes. + // Targets without on/off mode support keep their initial setting (Any). + + bool XnackSupported = STI.getFeatureBits().test(FeatureXNACKOnOffModes); bool SramEccSupported = isSramEccSupported(); if (XnackRequested) { diff --git a/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h b/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h index 11c393a623d20..6c771b3460662 100644 --- a/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h +++ b/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h @@ -160,7 +160,7 @@ class AMDGPUTargetID { TargetIDSetting SramEccSetting; public: - explicit AMDGPUTargetID(const MCSubtargetInfo &STI); + explicit AMDGPUTargetID(const MCSubtargetInfo &STI, StringRef FeatureString); ~AMDGPUTargetID() = default; /// \return True if the current xnack setting is not "Unsupported". @@ -217,7 +217,6 @@ class AMDGPUTargetID { SramEccSetting = NewSramEccSetting; } - void setTargetIDFromFeaturesString(StringRef FS); void setTargetIDFromTargetIDStream(StringRef TargetID); /// Write string representation to \p OS diff --git a/llvm/test/CodeGen/AMDGPU/target-id-xnack-always-on.ll b/llvm/test/CodeGen/AMDGPU/target-id-xnack-always-on.ll new file mode 100644 index 0000000000000..13d13c875b8aa --- /dev/null +++ b/llvm/test/CodeGen/AMDGPU/target-id-xnack-always-on.ll @@ -0,0 +1,22 @@ +; gfx1250, gfx1251, and gfx12-5-generic have xnack always on because they don't +; support on/off modes (no FeatureXNACKOnOffModes). The target ID should not +; include xnack modifiers regardless of -mattr settings. + +; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1250 < %s | FileCheck --check-prefix=CHECK %s +; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1251 < %s | FileCheck --check-prefix=CHECK %s +; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx12-5-generic < %s | FileCheck --check-prefix=CHECK %s + +; Even with -mattr=+xnack or -mattr=-xnack, the target ID doesn't change +; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1250 -mattr=+xnack < %s | FileCheck %s +; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1250 -mattr=-xnack < %s | FileCheck %s +; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1251 -mattr=+xnack < %s | FileCheck %s +; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1251 -mattr=-xnack < %s | FileCheck %s +; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx12-5-generic -mattr=+xnack < %s | FileCheck %s +; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx12-5-generic -mattr=-xnack < %s | FileCheck %s + +; CHECK: .amdgcn_target "amdgcn-amd-amdhsa--gfx{{1250|1251|12-5-generic}}" + +define void @func0() { +entry: + ret void +} _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
