================
@@ -3230,21 +3230,35 @@
TEST_CONSTEXPR(match_v64qi(_mm512_maskz_alignr_epi8((__mmask64)0x000000000000000
__m512i test_mm512_mm_dbsad_epu8(__m512i __A, __m512i __B) {
// CHECK-LABEL: test_mm512_mm_dbsad_epu8
// CHECK: @llvm.x86.avx512.dbpsadbw.512
- return _mm512_dbsad_epu8(__A, __B, 170);
-}
+ return _mm512_dbsad_epu8(__A, __B, 170);
+}
+// 512-bit: 4 lanes, imm8=0: all shuffle groups select block 0 per lane
+TEST_CONSTEXPR(match_v32hu(_mm512_dbsad_epu8(
+ ((__m512i)(__v64qu){0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
+ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
+ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
+ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}),
+ ((__m512i)(__v64qu){1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16,
+ 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16,
+ 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16,
+ 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}),
+ 0), 4, 8, 12, 12, 28, 28, 44, 44,
+ 4, 8, 12, 12, 28, 28, 44, 44,
+ 4, 8, 12, 12, 28, 28, 44, 44,
+ 4, 8, 12, 12, 28, 28, 44, 44));
__m512i test_mm512_mm_mask_dbsad_epu8(__m512i __W, __mmask32 __U, __m512i __A,
__m512i __B) {
// CHECK-LABEL: test_mm512_mm_mask_dbsad_epu8
// CHECK: @llvm.x86.avx512.dbpsadbw.512
//CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}}
- return _mm512_mask_dbsad_epu8(__W, __U, __A, __B, 170);
+ return _mm512_mask_dbsad_epu8(__W, __U, __A, __B, 170);
----------------
RKSimon wrote:
_mm512_mask_dbsad_epu8 test coverage
https://github.com/llvm/llvm-project/pull/188887
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