Author: rksimon
Date: Tue Sep 12 08:04:04 2017
New Revision: 313034
URL: http://llvm.org/viewvc/llvm-project?rev=313034&view=rev
Log:
Fix PR34021 test on non-x86 build targets
Modified:
cfe/trunk/test/CodeGen/pr34021.c
Modified: cfe/trunk/test/CodeGen/pr34021.c
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/pr34021.c?rev=313034&r1=313033&r2=313034&view=diff
==============================================================================
--- cfe/trunk/test/CodeGen/pr34021.c (original)
+++ cfe/trunk/test/CodeGen/pr34021.c Tue Sep 12 08:04:04 2017
@@ -5,20 +5,20 @@
typedef int v4si __attribute__ ((vector_size (16)));
v4si rep() {
// X86-LABEL: define <4 x i32> @rep
-// X86: %retval = alloca <4 x i32>, align 16
-// X86-NEXT: %res = alloca <4 x i32>, align 16
-// X86-NEXT: %0 = bitcast <4 x i32>* %retval to i128*
-// X86-NEXT: %1 = call i64 asm sideeffect inteldialect "",
"=A,~{dirflag},~{fpsr},~{flags}"()
-// X86-NEXT: %2 = zext i64 %1 to i128
-// X86-NEXT: store i128 %2, i128* %0, align 16
-// X86-NEXT: %3 = load <4 x i32>, <4 x i32>* %res, align 16
-// X86-NEXT: ret <4 x i32> %3
+// X86: %[[ALLOCA0:.*]] = alloca <4 x i32>, align 16
+// X86: %[[ALLOCA1:.*]] = alloca <4 x i32>, align 16
+// X86: %[[BITCAST:.*]] = bitcast <4 x i32>* %[[ALLOCA0]] to i128*
+// X86: %[[ASM:.*]] = call i64 asm sideeffect inteldialect "",
"=A,~{dirflag},~{fpsr},~{flags}"()
+// X86: %[[ZEXT:.*]] = zext i64 %[[ASM]] to i128
+// X86: store i128 %[[ZEXT]], i128* %[[BITCAST]], align 16
+// X86: %[[LOAD:.*]] = load <4 x i32>, <4 x i32>* %[[ALLOCA1]], align 16
+// X86: ret <4 x i32> %[[LOAD]]
//
// X64-LABEL: define <4 x i32> @rep
-// X64: %res = alloca <4 x i32>, align 16
-// X64-NEXT: call void asm sideeffect inteldialect "",
"~{dirflag},~{fpsr},~{flags}"()
-// X64-NEXT: %0 = load <4 x i32>, <4 x i32>* %res, align 16
-// X64-NEXT: ret <4 x i32> %0
+// X64: %[[ALLOCA:.*]] = alloca <4 x i32>, align 16
+// X64: call void asm sideeffect inteldialect "",
"~{dirflag},~{fpsr},~{flags}"()
+// X64: %[[LOAD:.*]] = load <4 x i32>, <4 x i32>* %[[ALLOCA]], align 16
+// X64: ret <4 x i32> %[[LOAD]]
v4si res;
__asm {}
return res;
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