================
@@ -2824,6 +2822,16 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned
builtinID, const CallExpr *expr,
return mlir::Value{};
}
+ switch (builtinID) {
+ default:
+ break;
+ case NEON::BI__builtin_neon_vduph_lane_bf16:
+ case NEON::BI__builtin_neon_vduph_laneq_bf16: {
+ uint64_t index = getZExtIntValueFromConstOp(ops[1]);
----------------
E00N777 wrote:
Thanks for the suggestions. I've updated the lowering to use the earlier switch
for the lane-extract family.
https://github.com/llvm/llvm-project/pull/185852
_______________________________________________
cfe-commits mailing list
[email protected]
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
