https://github.com/adit4443ya updated https://github.com/llvm/llvm-project/pull/180714
>From 02c668955e91ef184f524fa4410600e32b6ba79d Mon Sep 17 00:00:00 2001 From: Aditya Trivedi <[email protected]> Date: Tue, 10 Feb 2026 10:08:19 +0000 Subject: [PATCH] [Clang][CIR] Support X86 builtins: __rdtsc and __builtin_ia32_rdtscp Ported __rdtsc and __builtin_ia32_rdtscp from traditional CodeGen to CIR. These builtins are lowered to the x86.rdtsc and x86.rdtscp LLVM intrinsics. For __builtin_ia32_rdtscp, the processor ID is extracted from the intrinsic's returned struct and stored to the user-provided pointer. Test file rd-builtins.c verifies CIR generation and that both the CIR path and classic codegen produce identical LLVM IR output. --- clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp | 22 +++++++-- .../CIR/CodeGenBuiltins/X86/rd-builtins.c | 46 +++++++++++++++++++ 2 files changed, 64 insertions(+), 4 deletions(-) create mode 100644 clang/test/CIR/CodeGenBuiltins/X86/rd-builtins.c diff --git a/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp b/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp index cad80317cb870..4d1cf98791d3a 100644 --- a/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp +++ b/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp @@ -846,11 +846,25 @@ CIRGenFunction::emitX86BuiltinExpr(unsigned builtinID, const CallExpr *expr) { case X86::BI_m_prefetchw: return emitPrefetch(*this, builtinID, expr, ops); case X86::BI__rdtsc: + return builder.emitIntrinsicCallOp(getLoc(expr->getExprLoc()), "x86.rdtsc", + builder.getUInt64Ty()); case X86::BI__builtin_ia32_rdtscp: { - cgm.errorNYI(expr->getSourceRange(), - std::string("unimplemented X86 builtin call: ") + - getContext().BuiltinInfo.getName(builtinID)); - return mlir::Value{}; + mlir::Location loc = getLoc(expr->getExprLoc()); + mlir::Type i64Ty = builder.getUInt64Ty(); + mlir::Type i32Ty = builder.getUInt32Ty(); + mlir::Type structTy = builder.getAnonRecordTy({i64Ty, i32Ty}); + mlir::Value result = + builder.emitIntrinsicCallOp(loc, "x86.rdtscp", structTy); + + // Extract and store processor_id (element 1 of the returned struct) + mlir::Value processorId = + cir::ExtractMemberOp::create(builder, loc, i32Ty, result, 1); + // ops[0] is the address to store the processor ID + Address addr(ops[0], CharUnits::fromQuantity(4)); + builder.createStore(loc, processorId, addr); + + // Return timestamp (element 0 of the returned struct) + return cir::ExtractMemberOp::create(builder, loc, i64Ty, result, 0); } case X86::BI__builtin_ia32_lzcnt_u16: case X86::BI__builtin_ia32_lzcnt_u32: diff --git a/clang/test/CIR/CodeGenBuiltins/X86/rd-builtins.c b/clang/test/CIR/CodeGenBuiltins/X86/rd-builtins.c new file mode 100644 index 0000000000000..a310bc6e146ed --- /dev/null +++ b/clang/test/CIR/CodeGenBuiltins/X86/rd-builtins.c @@ -0,0 +1,46 @@ +// RUN: %clang_cc1 -x c -ffreestanding -triple x86_64-unknown-linux -fclangir -emit-cir -o %t.cir %s +// RUN: FileCheck --check-prefix=CIR --input-file=%t.cir %s + +// RUN: %clang_cc1 -x c -ffreestanding -triple x86_64-unknown-linux -fclangir -emit-llvm -o %t.ll %s +// RUN: FileCheck --check-prefix=LLVM --input-file=%t.ll %s + +// RUN: %clang_cc1 -x c -ffreestanding -triple=x86_64-unknown-linux -emit-llvm -o - %s | FileCheck %s -check-prefix=OGCG + +// This test mimics clang/test/CodeGen/X86/rd-builtins.c, which eventually +// CIR shall be able to support fully. + +unsigned long long test_rdtsc(void) { + // CIR-LABEL: @test_rdtsc + // CIR: {{%.*}} = cir.call_llvm_intrinsic "x86.rdtsc"() : () -> !u64i + + // LLVM-LABEL: @test_rdtsc + // LLVM: call i64 @llvm.x86.rdtsc() + + // OGCG-LABEL: @test_rdtsc + // OGCG: call i64 @llvm.x86.rdtsc() + + return __rdtsc(); +} + +unsigned long long test_rdtscp(unsigned int *a) { + // CIR-LABEL: @test_rdtscp + // CIR: {{%.*}} = cir.call_llvm_intrinsic "x86.rdtscp"() : () -> !cir.record<!anon + // CIR: {{%.*}} = cir.extract_member {{%.*}}[1] : !cir.record<!anon + // CIR: cir.store {{%.*}}, {{%.*}} : !u32i + // CIR: {{%.*}} = cir.extract_member {{%.*}}[0] : !cir.record<!anon + + // LLVM-LABEL: @test_rdtscp + // LLVM: call { i64, i32 } @llvm.x86.rdtscp() + // LLVM: extractvalue { i64, i32 } {{%.*}}, 1 + // LLVM: store i32 {{%.*}}, ptr {{%.*}} + // LLVM: extractvalue { i64, i32 } {{%.*}}, 0 + + // OGCG-LABEL: @test_rdtscp + // OGCG: [[RDTSCP:%.*]] = call { i64, i32 } @llvm.x86.rdtscp + // OGCG: [[TSC_AUX:%.*]] = extractvalue { i64, i32 } [[RDTSCP]], 1 + // OGCG: store i32 [[TSC_AUX]], ptr %{{.*}} + // OGCG: [[TSC:%.*]] = extractvalue { i64, i32 } [[RDTSCP]], 0 + + return __builtin_ia32_rdtscp(a); +} + _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
