llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT--> @llvm/pr-subscribers-clang Author: None (joaosaffran) <details> <summary>Changes</summary> This patch changes the run lines for log, asin, acos overload test to use -O1 instead of -disable-llvm-passes and rewrite the tests to actually look at the whole function. This work is part of https://github.com/llvm/llvm-project/issues/138016. --- Patch is 28.35 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/177664.diff 3 Files Affected: - (modified) clang/test/CodeGenHLSL/builtins/acos-overloads.hlsl (+82-42) - (modified) clang/test/CodeGenHLSL/builtins/asin-overloads.hlsl (+82-42) - (modified) clang/test/CodeGenHLSL/builtins/log-overloads.hlsl (+82-42) ``````````diff diff --git a/clang/test/CodeGenHLSL/builtins/acos-overloads.hlsl b/clang/test/CodeGenHLSL/builtins/acos-overloads.hlsl index e39ae43d205ee..640f6aacb28af 100644 --- a/clang/test/CodeGenHLSL/builtins/acos-overloads.hlsl +++ b/clang/test/CodeGenHLSL/builtins/acos-overloads.hlsl @@ -1,123 +1,163 @@ // RUN: %clang_cc1 -std=hlsl202x -finclude-default-header -x hlsl -triple \ -// RUN: spirv-unknown-vulkan-compute %s -emit-llvm -disable-llvm-passes \ -// RUN: -o - | FileCheck %s --check-prefixes=CHECK +// RUN: spirv-unknown-vulkan-compute %s -emit-llvm \ +// RUN: -o - | FileCheck %s --check-prefixes=CHECK -DFNATTRS="hidden spir_func noundef nofpclass(nan inf)" -// CHECK-LABEL: test_acos_double -// CHECK: call reassoc nnan ninf nsz arcp afn float @llvm.acos.f32 +// CHECK: define [[FNATTRS]] float @_Z16test_acos_doubled( +// CHECK: [[CONVI:%.*]] = fptrunc {{.*}} double %{{.*}} to float +// CHECK: [[V3:%.*]] = call {{.*}} float @llvm.acos.f32(float [[CONVI]]) +// CHECK: ret float [[V3]] float test_acos_double ( double p0 ) { return acos ( p0 ); } -// CHECK-LABEL: test_acos_double2 -// CHECK: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.acos.v2f32 +// CHECK: define [[FNATTRS]] <2 x float> @_Z17test_acos_double2Dv2_d( +// CHECK: [[CONVI:%.*]] = fptrunc {{.*}} <2 x double> %{{.*}} to <2 x float> +// CHECK: [[V3:%.*]] = call {{.*}} <2 x float> @llvm.acos.v2f32(<2 x float> [[CONVI]]) +// CHECK: ret <2 x float> [[V3]] float2 test_acos_double2 ( double2 p0 ) { return acos ( p0 ); } -// CHECK-LABEL: test_acos_double3 -// CHECK: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.acos.v3f32 +// CHECK: define [[FNATTRS]] <3 x float> @_Z17test_acos_double3Dv3_d( +// CHECK: [[CONVI:%.*]] = fptrunc {{.*}} <3 x double> %{{.*}} to <3 x float> +// CHECK: [[V3:%.*]] = call {{.*}} <3 x float> @llvm.acos.v3f32(<3 x float> [[CONVI]]) +// CHECK: ret <3 x float> [[V3]] float3 test_acos_double3 ( double3 p0 ) { return acos ( p0 ); } -// CHECK-LABEL: test_acos_double4 -// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.acos.v4f32 +// CHECK: define [[FNATTRS]] <4 x float> @_Z17test_acos_double4Dv4_d( +// CHECK: [[CONVI:%.*]] = fptrunc {{.*}} <4 x double> %{{.*}} to <4 x float> +// CHECK: [[V3:%.*]] = call {{.*}} <4 x float> @llvm.acos.v4f32(<4 x float> [[CONVI]]) +// CHECK: ret <4 x float> [[V3]] float4 test_acos_double4 ( double4 p0 ) { return acos ( p0 ); } -// CHECK-LABEL: test_acos_int -// CHECK: call reassoc nnan ninf nsz arcp afn float @llvm.acos.f32 +// CHECK: define [[FNATTRS]] float @_Z13test_acos_inti( +// CHECK: [[CONVI:%.*]] = sitofp i32 %{{.*}} to float +// CHECK: [[V3:%.*]] = call {{.*}} float @llvm.acos.f32(float [[CONVI]]) +// CHECK: ret float [[V3]] float test_acos_int ( int p0 ) { return acos ( p0 ); } -// CHECK-LABEL: test_acos_int2 -// CHECK: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.acos.v2f32 +// CHECK: define [[FNATTRS]] <2 x float> @_Z14test_acos_int2Dv2_i( +// CHECK: [[CONVI:%.*]] = sitofp <2 x i32> %{{.*}} to <2 x float> +// CHECK: [[V3:%.*]] = call {{.*}} <2 x float> @llvm.acos.v2f32(<2 x float> [[CONVI]]) +// CHECK: ret <2 x float> [[V3]] float2 test_acos_int2 ( int2 p0 ) { return acos ( p0 ); } -// CHECK-LABEL: test_acos_int3 -// CHECK: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.acos.v3f32 +// CHECK: define [[FNATTRS]] <3 x float> @_Z14test_acos_int3Dv3_i( +// CHECK: [[CONVI:%.*]] = sitofp <3 x i32> %{{.*}} to <3 x float> +// CHECK: [[V3:%.*]] = call {{.*}} <3 x float> @llvm.acos.v3f32(<3 x float> [[CONVI]]) +// CHECK: ret <3 x float> [[V3]] float3 test_acos_int3 ( int3 p0 ) { return acos ( p0 ); } -// CHECK-LABEL: test_acos_int4 -// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.acos.v4f32 +// CHECK: define [[FNATTRS]] <4 x float> @_Z14test_acos_int4Dv4_i( +// CHECK: [[CONVI:%.*]] = sitofp <4 x i32> %{{.*}} to <4 x float> +// CHECK: [[V3:%.*]] = call {{.*}} <4 x float> @llvm.acos.v4f32(<4 x float> [[CONVI]]) +// CHECK: ret <4 x float> [[V3]] float4 test_acos_int4 ( int4 p0 ) { return acos ( p0 ); } -// CHECK-LABEL: test_acos_uint -// CHECK: call reassoc nnan ninf nsz arcp afn float @llvm.acos.f32 +// CHECK: define [[FNATTRS]] float @_Z14test_acos_uintj( +// CHECK: [[CONVI:%.*]] = uitofp i32 %{{.*}} to float +// CHECK: [[V3:%.*]] = call {{.*}} float @llvm.acos.f32(float [[CONVI]]) +// CHECK: ret float [[V3]] float test_acos_uint ( uint p0 ) { return acos ( p0 ); } -// CHECK-LABEL: test_acos_uint2 -// CHECK: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.acos.v2f32 +// CHECK: define [[FNATTRS]] <2 x float> @_Z15test_acos_uint2Dv2_j( +// CHECK: [[CONVI:%.*]] = uitofp <2 x i32> %{{.*}} to <2 x float> +// CHECK: [[V3:%.*]] = call {{.*}} <2 x float> @llvm.acos.v2f32(<2 x float> [[CONVI]]) +// CHECK: ret <2 x float> [[V3]] float2 test_acos_uint2 ( uint2 p0 ) { return acos ( p0 ); } -// CHECK-LABEL: test_acos_uint3 -// CHECK: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.acos.v3f32 +// CHECK: define [[FNATTRS]] <3 x float> @_Z15test_acos_uint3Dv3_j( +// CHECK: [[CONVI:%.*]] = uitofp <3 x i32> %{{.*}} to <3 x float> +// CHECK: [[V3:%.*]] = call {{.*}} <3 x float> @llvm.acos.v3f32(<3 x float> [[CONVI]]) +// CHECK: ret <3 x float> [[V3]] float3 test_acos_uint3 ( uint3 p0 ) { return acos ( p0 ); } -// CHECK-LABEL: test_acos_uint4 -// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.acos.v4f32 +// CHECK: define [[FNATTRS]] <4 x float> @_Z15test_acos_uint4Dv4_j( +// CHECK: [[CONVI:%.*]] = uitofp <4 x i32> %{{.*}} to <4 x float> +// CHECK: [[V3:%.*]] = call {{.*}} <4 x float> @llvm.acos.v4f32(<4 x float> [[CONVI]]) +// CHECK: ret <4 x float> [[V3]] float4 test_acos_uint4 ( uint4 p0 ) { return acos ( p0 ); } -// CHECK-LABEL: test_acos_int64_t -// CHECK: call reassoc nnan ninf nsz arcp afn float @llvm.acos.f32 +// CHECK: define [[FNATTRS]] float @_Z17test_acos_int64_tl( +// CHECK: [[CONVI:%.*]] = sitofp i64 %{{.*}} to float +// CHECK: [[V3:%.*]] = call {{.*}} float @llvm.acos.f32(float [[CONVI]]) +// CHECK: ret float [[V3]] float test_acos_int64_t ( int64_t p0 ) { return acos ( p0 ); } -// CHECK-LABEL: test_acos_int64_t2 -// CHECK: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.acos.v2f32 +// CHECK: define [[FNATTRS]] <2 x float> @_Z18test_acos_int64_t2Dv2_l( +// CHECK: [[CONVI:%.*]] = sitofp <2 x i64> %{{.*}} to <2 x float> +// CHECK: [[V3:%.*]] = call {{.*}} <2 x float> @llvm.acos.v2f32(<2 x float> [[CONVI]]) +// CHECK: ret <2 x float> [[V3]] float2 test_acos_int64_t2 ( int64_t2 p0 ) { return acos ( p0 ); } -// CHECK-LABEL: test_acos_int64_t3 -// CHECK: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.acos.v3f32 +// CHECK: define [[FNATTRS]] <3 x float> @_Z18test_acos_int64_t3Dv3_l( +// CHECK: [[CONVI:%.*]] = sitofp <3 x i64> %{{.*}} to <3 x float> +// CHECK: [[V3:%.*]] = call {{.*}} <3 x float> @llvm.acos.v3f32(<3 x float> [[CONVI]]) +// CHECK: ret <3 x float> [[V3]] float3 test_acos_int64_t3 ( int64_t3 p0 ) { return acos ( p0 ); } -// CHECK-LABEL: test_acos_int64_t4 -// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.acos.v4f32 +// CHECK: define [[FNATTRS]] <4 x float> @_Z18test_acos_int64_t4Dv4_l( +// CHECK: [[CONVI:%.*]] = sitofp <4 x i64> %{{.*}} to <4 x float> +// CHECK: [[V3:%.*]] = call {{.*}} <4 x float> @llvm.acos.v4f32(<4 x float> [[CONVI]]) +// CHECK: ret <4 x float> [[V3]] float4 test_acos_int64_t4 ( int64_t4 p0 ) { return acos ( p0 ); } -// CHECK-LABEL: test_acos_uint64_t -// CHECK: call reassoc nnan ninf nsz arcp afn float @llvm.acos.f32 +// CHECK: define [[FNATTRS]] float @_Z18test_acos_uint64_tm( +// CHECK: [[CONVI:%.*]] = uitofp i64 %{{.*}} to float +// CHECK: [[V3:%.*]] = call {{.*}} float @llvm.acos.f32(float [[CONVI]]) +// CHECK: ret float [[V3]] float test_acos_uint64_t ( uint64_t p0 ) { return acos ( p0 ); } -// CHECK-LABEL: test_acos_uint64_t2 -// CHECK: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.acos.v2f32 +// CHECK: define [[FNATTRS]] <2 x float> @_Z19test_acos_uint64_t2Dv2_m( +// CHECK: [[CONVI:%.*]] = uitofp <2 x i64> %{{.*}} to <2 x float> +// CHECK: [[V3:%.*]] = call {{.*}} <2 x float> @llvm.acos.v2f32(<2 x float> [[CONVI]]) +// CHECK: ret <2 x float> [[V3]] float2 test_acos_uint64_t2 ( uint64_t2 p0 ) { return acos ( p0 ); } -// CHECK-LABEL: test_acos_uint64_t3 -// CHECK: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.acos.v3f32 +// CHECK: define [[FNATTRS]] <3 x float> @_Z19test_acos_uint64_t3Dv3_m( +// CHECK: [[CONVI:%.*]] = uitofp <3 x i64> %{{.*}} to <3 x float> +// CHECK: [[V3:%.*]] = call {{.*}} <3 x float> @llvm.acos.v3f32(<3 x float> [[CONVI]]) +// CHECK: ret <3 x float> [[V3]] float3 test_acos_uint64_t3 ( uint64_t3 p0 ) { return acos ( p0 ); } -// CHECK-LABEL: test_acos_uint64_t4 -// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.acos.v4f32 +// CHECK: define [[FNATTRS]] <4 x float> @_Z19test_acos_uint64_t4Dv4_m( +// CHECK: [[CONVI:%.*]] = uitofp <4 x i64> %{{.*}} to <4 x float> +// CHECK: [[V3:%.*]] = call {{.*}} <4 x float> @llvm.acos.v4f32(<4 x float> [[CONVI]]) +// CHECK: ret <4 x float> [[V3]] float4 test_acos_uint64_t4 ( uint64_t4 p0 ) { return acos ( p0 ); } diff --git a/clang/test/CodeGenHLSL/builtins/asin-overloads.hlsl b/clang/test/CodeGenHLSL/builtins/asin-overloads.hlsl index 7f7a2c4795129..93208206a7f01 100644 --- a/clang/test/CodeGenHLSL/builtins/asin-overloads.hlsl +++ b/clang/test/CodeGenHLSL/builtins/asin-overloads.hlsl @@ -1,123 +1,163 @@ // RUN: %clang_cc1 -std=hlsl202x -finclude-default-header -x hlsl -triple \ -// RUN: spirv-unknown-vulkan-compute %s -emit-llvm -disable-llvm-passes \ -// RUN: -o - | FileCheck %s --check-prefixes=CHECK +// RUN: spirv-unknown-vulkan-compute %s -emit-llvm \ +// RUN: -o - | FileCheck %s --check-prefixes=CHECK -DFNATTRS="hidden spir_func noundef nofpclass(nan inf)" -// CHECK-LABEL: test_asin_double -// CHECK: call reassoc nnan ninf nsz arcp afn float @llvm.asin.f32 +// CHECK: define [[FNATTRS]] float @_Z16test_asin_doubled( +// CHECK: [[CONVI:%.*]] = fptrunc {{.*}} double %{{.*}} to float +// CHECK: [[V3:%.*]] = call {{.*}} float @llvm.asin.f32(float [[CONVI]]) +// CHECK: ret float [[V3]] float test_asin_double ( double p0 ) { return asin ( p0 ); } -// CHECK-LABEL: test_asin_double2 -// CHECK: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.asin.v2f32 +// CHECK: define [[FNATTRS]] <2 x float> @_Z17test_asin_double2Dv2_d( +// CHECK: [[CONVI:%.*]] = fptrunc {{.*}} <2 x double> %{{.*}} to <2 x float> +// CHECK: [[V3:%.*]] = call {{.*}} <2 x float> @llvm.asin.v2f32(<2 x float> [[CONVI]]) +// CHECK: ret <2 x float> [[V3]] float2 test_asin_double2 ( double2 p0 ) { return asin ( p0 ); } -// CHECK-LABEL: test_asin_double3 -// CHECK: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.asin.v3f32 +// CHECK: define [[FNATTRS]] <3 x float> @_Z17test_asin_double3Dv3_d( +// CHECK: [[CONVI:%.*]] = fptrunc {{.*}} <3 x double> %{{.*}} to <3 x float> +// CHECK: [[V3:%.*]] = call {{.*}} <3 x float> @llvm.asin.v3f32(<3 x float> [[CONVI]]) +// CHECK: ret <3 x float> [[V3]] float3 test_asin_double3 ( double3 p0 ) { return asin ( p0 ); } -// CHECK-LABEL: test_asin_double4 -// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.asin.v4f32 +// CHECK: define [[FNATTRS]] <4 x float> @_Z17test_asin_double4Dv4_d( +// CHECK: [[CONVI:%.*]] = fptrunc {{.*}} <4 x double> %{{.*}} to <4 x float> +// CHECK: [[V3:%.*]] = call {{.*}} <4 x float> @llvm.asin.v4f32(<4 x float> [[CONVI]]) +// CHECK: ret <4 x float> [[V3]] float4 test_asin_double4 ( double4 p0 ) { return asin ( p0 ); } -// CHECK-LABEL: test_asin_int -// CHECK: call reassoc nnan ninf nsz arcp afn float @llvm.asin.f32 +// CHECK: define [[FNATTRS]] float @_Z13test_asin_inti( +// CHECK: [[CONVI:%.*]] = sitofp i32 %{{.*}} to float +// CHECK: [[V3:%.*]] = call {{.*}} float @llvm.asin.f32(float [[CONVI]]) +// CHECK: ret float [[V3]] float test_asin_int ( int p0 ) { return asin ( p0 ); } -// CHECK-LABEL: test_asin_int2 -// CHECK: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.asin.v2f32 +// CHECK: define [[FNATTRS]] <2 x float> @_Z14test_asin_int2Dv2_i( +// CHECK: [[CONVI:%.*]] = sitofp <2 x i32> %{{.*}} to <2 x float> +// CHECK: [[V3:%.*]] = call {{.*}} <2 x float> @llvm.asin.v2f32(<2 x float> [[CONVI]]) +// CHECK: ret <2 x float> [[V3]] float2 test_asin_int2 ( int2 p0 ) { return asin ( p0 ); } -// CHECK-LABEL: test_asin_int3 -// CHECK: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.asin.v3f32 +// CHECK: define [[FNATTRS]] <3 x float> @_Z14test_asin_int3Dv3_i( +// CHECK: [[CONVI:%.*]] = sitofp <3 x i32> %{{.*}} to <3 x float> +// CHECK: [[V3:%.*]] = call {{.*}} <3 x float> @llvm.asin.v3f32(<3 x float> [[CONVI]]) +// CHECK: ret <3 x float> [[V3]] float3 test_asin_int3 ( int3 p0 ) { return asin ( p0 ); } -// CHECK-LABEL: test_asin_int4 -// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.asin.v4f32 +// CHECK: define [[FNATTRS]] <4 x float> @_Z14test_asin_int4Dv4_i( +// CHECK: [[CONVI:%.*]] = sitofp <4 x i32> %{{.*}} to <4 x float> +// CHECK: [[V3:%.*]] = call {{.*}} <4 x float> @llvm.asin.v4f32(<4 x float> [[CONVI]]) +// CHECK: ret <4 x float> [[V3]] float4 test_asin_int4 ( int4 p0 ) { return asin ( p0 ); } -// CHECK-LABEL: test_asin_uint -// CHECK: call reassoc nnan ninf nsz arcp afn float @llvm.asin.f32 +// CHECK: define [[FNATTRS]] float @_Z14test_asin_uintj( +// CHECK: [[CONVI:%.*]] = uitofp i32 %{{.*}} to float +// CHECK: [[V3:%.*]] = call {{.*}} float @llvm.asin.f32(float [[CONVI]]) +// CHECK: ret float [[V3]] float test_asin_uint ( uint p0 ) { return asin ( p0 ); } -// CHECK-LABEL: test_asin_uint2 -// CHECK: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.asin.v2f32 +// CHECK: define [[FNATTRS]] <2 x float> @_Z15test_asin_uint2Dv2_j( +// CHECK: [[CONVI:%.*]] = uitofp <2 x i32> %{{.*}} to <2 x float> +// CHECK: [[V3:%.*]] = call {{.*}} <2 x float> @llvm.asin.v2f32(<2 x float> [[CONVI]]) +// CHECK: ret <2 x float> [[V3]] float2 test_asin_uint2 ( uint2 p0 ) { return asin ( p0 ); } -// CHECK-LABEL: test_asin_uint3 -// CHECK: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.asin.v3f32 +// CHECK: define [[FNATTRS]] <3 x float> @_Z15test_asin_uint3Dv3_j( +// CHECK: [[CONVI:%.*]] = uitofp <3 x i32> %{{.*}} to <3 x float> +// CHECK: [[V3:%.*]] = call {{.*}} <3 x float> @llvm.asin.v3f32(<3 x float> [[CONVI]]) +// CHECK: ret <3 x float> [[V3]] float3 test_asin_uint3 ( uint3 p0 ) { return asin ( p0 ); } -// CHECK-LABEL: test_asin_uint4 -// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.asin.v4f32 +// CHECK: define [[FNATTRS]] <4 x float> @_Z15test_asin_uint4Dv4_j( +// CHECK: [[CONVI:%.*]] = uitofp <4 x i32> %{{.*}} to <4 x float> +// CHECK: [[V3:%.*]] = call {{.*}} <4 x float> @llvm.asin.v4f32(<4 x float> [[CONVI]]) +// CHECK: ret <4 x float> [[V3]] float4 test_asin_uint4 ( uint4 p0 ) { return asin ( p0 ); } -// CHECK-LABEL: test_asin_int64_t -// CHECK: call reassoc nnan ninf nsz arcp afn float @llvm.asin.f32 +// CHECK: define [[FNATTRS]] float @_Z17test_asin_int64_tl( +// CHECK: [[CONVI:%.*]] = sitofp i64 %{{.*}} to float +// CHECK: [[V3:%.*]] = call {{.*}} float @llvm.asin.f32(float [[CONVI]]) +// CHECK: ret float [[V3]] float test_asin_int64_t ( int64_t p0 ) { return asin ( p0 ); } -// CHECK-LABEL: test_asin_int64_t2 -// CHECK: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.asin.v2f32 +// CHECK: define [[FNATTRS]] <2 x float> @_Z18test_asin_int64_t2Dv2_l( +// CHECK: [[CONVI:%.*]] = sitofp <2 x i64> %{{.*}} to <2 x float> +// CHECK: [[V3:%.*]] = call {{.*}} <2 x float> @llvm.asin.v2f32(<2 x float> [[CONVI]]) +// CHECK: ret <2 x float> [[V3]] float2 test_asin_int64_t2 ( int64_t2 p0 ) { return asin ( p0 ); } -// CHECK-LABEL: test_asin_int64_t3 -// CHECK: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.asin.v3f32 +// CHECK: define [[FNATTRS]] <3 x float> @_Z18test_asin_int64_t3Dv3_l( +// CHECK: [[CONVI:%.*]] = sitofp <3 x i64> %{{.*}} to <3 x float> +// CHECK: [[V3:%.*]] = call {{.*}} <3 x float> @llvm.asin.v3f32(<3 x float> [[CONVI]]) +// CHECK: ret <3 x float> [[V3]] float3 test_asin_int64_t3 ( int64_t3 p0 ) { return asin ( p0 ); } -// CHECK-LABEL: test_asin_int64_t4 -// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.asin.v4f32 +// CHECK: define [[FNATTRS]] <4 x float> @_Z18test_asin_int64_t4Dv4_l( +// CHECK: [[CONVI:%.*]] = sitofp <4 x i64> %{{.*}} to <4 x float> +// CHECK: [[V3:%.*]] = call {{.*}} <4 x float> @llvm.asin.v4f32(<4 x float> [[CONVI]]) +// CHECK: ret <4 x float> [[V3]] float4 test_asin_int64_t4 ( int64_t4 p0 ) { return asin ( p0 ); } -// CHECK-LABEL: test_asin_uint64_t -// CHECK: call reassoc nnan ninf nsz arcp afn float @llvm.asin.f32 +// CHECK: define [[FNATTRS]] float @_Z18test_asin_uint64_tm( +// CHECK: [[CONVI:%.*]] = uitofp i64 %{{.*}} to float +// CHECK: [[V3:%.*]] = call {{.*}} float @llvm.asin.f32(float [[CONVI]]) +// CHECK: ret float [[V3]] float test_asin_uint64_t ( uint64_t p0 ) { return asin ( p0 ); } -// CHECK-LABEL: test_asin_uint64_t2 -// CHECK: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.asin.v2f32 +// CHECK: define [[FNATTRS]] <2 x float> @_Z19test_asin_uint64_t2Dv2_m( +// CHECK: [[CONVI:%.*]] = uitofp <2 x i64> %{{.*}} to <2 x float> +// CHECK: [[V3:%.*]] = call {{.*}} <2 x float> @llvm.asin.v2f32(<2 x float> [[CONVI]]) +// CHECK: ret <2 x float> [[V3]] float2 test_asin_uint64_t2 ( uint64_t2 p0 ) { return asin ( p0 ); } -// CHECK-LABEL: test_asin_uint64_t3 -// CHECK: call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.asin.v3f32 +// CHECK: define [[FNATTRS]] <3 x float> @_Z19test_asin_uint64_t3Dv3_m( +// CHECK: [[CONVI:%.*]] = uitofp <3 x i64> %{{.*}} to <3 x float> +// CHECK: [[V3:%.*]] = call {{.*}} <3 x float> @llvm.asin.v3f32(<3 x float> [[CONVI]]) +// CHECK: ret <3 x float> [[V3]] float3 test_asin_uint64_t3 ( uint64_t3 p0 ) { return asin ( p0 ); } -// CHECK-LABEL: test_asin_uint64_t4 -// CHECK: call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.asin.v4f32 +// CHECK: define [[FNATTRS]] <4 x float> @_Z19test_asin_uint64_t4Dv4_m( +// CHECK: [[CONVI:%.*]] = uitofp <4 x i64> %{{.*}} to <4 x float> +// CHECK: [[V3:%.*]] = call {{.*}} <4 x float> @llvm.asin.v4f32(<4 x float> [[CONVI]]) +// CHECK: ret <4 x float> [[V3]] float4 test_asin_uint64_t4 ( uint64_t4 p0 ) { return asin ( p0 ); } diff --git a/clang/test/CodeGenHLSL/builtins/log-overloads.hlsl b/clang/test/CodeGenHLSL/builtins/log-overloads.hlsl index d7aacdc486ac6..02007b4c80f22 100644 --- a/clang/test/CodeGenHLSL/builtins/log-overloads.hlsl +++ b/clang/test/CodeGenHLSL/builtins/log-overloads.hlsl @@ -1,68 +1,108 @@ // RUN: %clang_cc1 -std=hlsl202x -finclude-default-header -triple dxil-pc-shadermodel6.3-library %s \ -// RUN: -emit-llvm -disable-llvm-passes -o - | \ -// RUN: FileCheck %s --check-prefixes=CHECK +// RUN: -emit-llvm -o - | \ +// RUN: FileCheck %s --check-prefixes=CHECK -DFNATTRS="hidden noundef nofpclass(nan inf)" -// CHECK-LABEL: define hidden noundef nofpclass(nan inf) float {{.*}}test_log_double -// CHECK: call reassoc nnan ninf nsz arcp afn float @llvm.log.f32( +// CHECK: define [[FNATTRS]] float @_Z15test_log_doubled( +// CHECK: [[CONVI:%.*]] = fptrunc {{.*}} double %{{.*}} to float +// CHECK: [[V2:%.*]] = call {{.*}} float @llvm.log.f32(float [[CONVI]]) +// CHECK: ret float [[V2]] float test_log_double(double p0) { return log(p0); } -// CHECK-LABEL: define hidden noundef nofpclass(nan inf) <2 x float> {{.*}}test_log_double2 -// CHECK: call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.log.v2f32 +// CHECK: define [[FNATTRS]] <2 x float> @_Z16test_log_double2Dv2_d( +// CHECK: [[CONVI:%.*]] = fptrunc {{.*}} <2 x double> %{{.*}} to <2 x float> +// CHECK: [[V2:%.*]] = call {{.*}} <2 x float> @llvm.log.v2f32(<2 x float> [[CONVI]]) +// CHECK: ret <2 x float> [[V2]] float2 test_log_double2(double2 p0) { return log(p0); } -// CHECK-LABEL: define hidden noundef nofpclass(nan inf) <3 ... [truncated] `````````` </details> https://github.com/llvm/llvm-project/pull/177664 _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
