Author: Michael Liao Date: 2026-01-01T13:44:03-05:00 New Revision: dca074a1c71cd381400db7bf509663008ca6acb4
URL: https://github.com/llvm/llvm-project/commit/dca074a1c71cd381400db7bf509663008ca6acb4 DIFF: https://github.com/llvm/llvm-project/commit/dca074a1c71cd381400db7bf509663008ca6acb4.diff LOG: [CIR] Match codegen change on __builtin_clrsb expansion - 0bc6491da0c827ce94bd8fa852422eaafe6c39e7 adds the `nuw` flag during __builtin_clrsb expansion. Match that change in CIR. Added: Modified: clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp clang/test/CIR/CodeGenBuiltins/builtin_bit.cpp Removed: ################################################################################ diff --git a/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp b/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp index 998c93efb768a..7686add38250e 100644 --- a/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp +++ b/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp @@ -1050,7 +1050,8 @@ mlir::LogicalResult CIRToLLVMBitClrsbOpLowering::matchAndRewrite( rewriter, op.getLoc(), resTy, select, /*is_zero_poison=*/false); auto one = mlir::LLVM::ConstantOp::create(rewriter, op.getLoc(), resTy, 1); - auto res = mlir::LLVM::SubOp::create(rewriter, op.getLoc(), clz, one); + auto res = mlir::LLVM::SubOp::create(rewriter, op.getLoc(), clz, one, + mlir::LLVM::IntegerOverflowFlags::nuw); rewriter.replaceOp(op, res); return mlir::LogicalResult::success(); diff --git a/clang/test/CIR/CodeGenBuiltins/builtin_bit.cpp b/clang/test/CIR/CodeGenBuiltins/builtin_bit.cpp index 32a53d883a170..f252840c44900 100644 --- a/clang/test/CIR/CodeGenBuiltins/builtin_bit.cpp +++ b/clang/test/CIR/CodeGenBuiltins/builtin_bit.cpp @@ -18,7 +18,7 @@ int test_builtin_clrsb(int x) { // LLVM-NEXT: %[[X_NOT:.+]] = xor i32 %[[X]], -1 // LLVM-NEXT: %[[P:.+]] = select i1 %[[X_NEG]], i32 %[[X_NOT]], i32 %[[X]] // LLVM-NEXT: %[[LZ:.+]] = call i32 @llvm.ctlz.i32(i32 %[[P]], i1 false) -// LLVM-NEXT: %{{.+}} = sub i32 %[[LZ]], 1 +// LLVM-NEXT: %{{.+}} = sub nuw i32 %[[LZ]], 1 // OGCG-LABEL: _Z18test_builtin_clrsbi // OGCG: %[[X:.+]] = load i32, ptr %{{.+}}, align 4 @@ -26,7 +26,7 @@ int test_builtin_clrsb(int x) { // OGCG-NEXT: %[[X_NOT:.+]] = xor i32 %[[X]], -1 // OGCG-NEXT: %[[P:.+]] = select i1 %[[X_NEG]], i32 %[[X_NOT]], i32 %[[X]] // OGCG-NEXT: %[[LZ:.+]] = call i32 @llvm.ctlz.i32(i32 %[[P]], i1 false) -// OGCG-NEXT: %{{.+}} = sub i32 %[[LZ]], 1 +// OGCG-NEXT: %{{.+}} = sub nuw i32 %[[LZ]], 1 int test_builtin_clrsbl(long x) { return __builtin_clrsbl(x); @@ -42,7 +42,7 @@ int test_builtin_clrsbl(long x) { // LLVM-NEXT: %[[X_NOT:.+]] = xor i64 %[[X]], -1 // LLVM-NEXT: %[[P:.+]] = select i1 %[[X_NEG]], i64 %[[X_NOT]], i64 %[[X]] // LLVM-NEXT: %[[LZ:.+]] = call i64 @llvm.ctlz.i64(i64 %[[P]], i1 false) -// LLVM-NEXT: %{{.+}} = sub i64 %[[LZ]], 1 +// LLVM-NEXT: %{{.+}} = sub nuw i64 %[[LZ]], 1 // OGCG-LABEL: _Z19test_builtin_clrsbll // OGCG: %[[X:.+]] = load i64, ptr %{{.+}}, align 8 @@ -50,7 +50,7 @@ int test_builtin_clrsbl(long x) { // OGCG-NEXT: %[[X_NOT:.+]] = xor i64 %[[X]], -1 // OGCG-NEXT: %[[P:.+]] = select i1 %[[X_NEG]], i64 %[[X_NOT]], i64 %[[X]] // OGCG-NEXT: %[[LZ:.+]] = call i64 @llvm.ctlz.i64(i64 %[[P]], i1 false) -// OGCG-NEXT: %{{.+}} = sub i64 %[[LZ]], 1 +// OGCG-NEXT: %{{.+}} = sub nuw i64 %[[LZ]], 1 int test_builtin_clrsbll(long long x) { return __builtin_clrsbll(x); @@ -66,7 +66,7 @@ int test_builtin_clrsbll(long long x) { // LLVM-NEXT: %[[X_NOT:.+]] = xor i64 %[[X]], -1 // LLVM-NEXT: %[[P:.+]] = select i1 %[[X_NEG]], i64 %[[X_NOT]], i64 %[[X]] // LLVM-NEXT: %[[LZ:.+]] = call i64 @llvm.ctlz.i64(i64 %[[P]], i1 false) -// LLVM-NEXT: %{{.+}} = sub i64 %[[LZ]], 1 +// LLVM-NEXT: %{{.+}} = sub nuw i64 %[[LZ]], 1 // OGCG-LABEL: _Z20test_builtin_clrsbllx // OGCG: %[[X:.+]] = load i64, ptr %{{.+}}, align 8 @@ -74,7 +74,7 @@ int test_builtin_clrsbll(long long x) { // OGCG-NEXT: %[[X_NOT:.+]] = xor i64 %[[X]], -1 // OGCG-NEXT: %[[P:.+]] = select i1 %[[X_NEG]], i64 %[[X_NOT]], i64 %[[X]] // OGCG-NEXT: %[[LZ:.+]] = call i64 @llvm.ctlz.i64(i64 %[[P]], i1 false) -// OGCG-NEXT: %{{.+}} = sub i64 %[[LZ]], 1 +// OGCG-NEXT: %{{.+}} = sub nuw i64 %[[LZ]], 1 int test_builtin_ctzs(unsigned short x) { return __builtin_ctzs(x); _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
