================
@@ -6504,6 +6518,39 @@ static SDValue sinkProxyReg(SDValue R, SDValue Chain,
}
}
+// Combine add.sat(a, fneg(b)) -> sub.sat(a, b)
+static SDValue combineAddSatWithNeg(SDNode *N, SelectionDAG &DAG,
+ unsigned SubOpc) {
+ SDValue Op2 = N->getOperand(2);
+
+ if (Op2.getOpcode() != ISD::FNEG)
+ return SDValue();
+
+ SDLoc DL(N);
+ return DAG.getNode(SubOpc, DL, N->getValueType(0), N->getOperand(1),
+ Op2.getOperand(0));
+}
+
+static SDValue combineIntrinsicWOChain(SDNode *N,
+ TargetLowering::DAGCombinerInfo &DCI,
+ const NVPTXSubtarget &STI) {
+ unsigned IntID = N->getConstantOperandVal(0);
+
+ switch (IntID) {
+ default:
+ break;
+ case Intrinsic::nvvm_add_rn_sat_f16:
+ return combineAddSatWithNeg(N, DCI.DAG, NVPTXISD::SUB_RN_SAT_F16);
+ case Intrinsic::nvvm_add_rn_ftz_sat_f16:
+ return combineAddSatWithNeg(N, DCI.DAG, NVPTXISD::SUB_RN_FTZ_SAT_F16);
----------------
AlexMaclean wrote:
No need to specify a type in the DAG nodes, you should only have
`NVPTXISD::SUB_RN_FTZ_SAT` and `NVPTXISD::SUB_RN_SAT`
https://github.com/llvm/llvm-project/pull/170079
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