https://github.com/medhatiwari updated https://github.com/llvm/llvm-project/pull/170480
>From 471c262357d191258d41f5eed6980b31623f0cec Mon Sep 17 00:00:00 2001 From: Medha Tiwari <[email protected]> Date: Wed, 3 Dec 2025 19:17:14 +0530 Subject: [PATCH 1/2] [X86][Clang] Add constexpr support for AVX512 kshift intrinsics Fixes #162056 --- clang/include/clang/Basic/BuiltinsX86.td | 12 ++++++------ clang/lib/AST/ByteCode/InterpBuiltin.cpp | 22 ++++++++++++++++++++++ clang/lib/AST/ExprConstant.cpp | 22 ++++++++++++++++++++++ clang/test/CodeGen/X86/avx512bw-builtins.c | 17 +++++++++++++++++ clang/test/CodeGen/X86/avx512dq-builtins.c | 9 +++++++++ clang/test/CodeGen/X86/avx512f-builtins.c | 9 +++++++++ 6 files changed, 85 insertions(+), 6 deletions(-) diff --git a/clang/include/clang/Basic/BuiltinsX86.td b/clang/include/clang/Basic/BuiltinsX86.td index b62928008dd2e..560f94ff2427e 100644 --- a/clang/include/clang/Basic/BuiltinsX86.td +++ b/clang/include/clang/Basic/BuiltinsX86.td @@ -3148,28 +3148,28 @@ let Features = "avx512bw", Attributes = [NoThrow, Const, Constexpr] in { def kxordi : X86Builtin<"unsigned long long int(unsigned long long int, unsigned long long int)">; } -let Features = "avx512dq", Attributes = [NoThrow, Const] in { +let Features = "avx512dq", Attributes = [NoThrow, Const, Constexpr] in { def kshiftliqi : X86Builtin<"unsigned char(unsigned char, _Constant unsigned int)">; } -let Features = "avx512f", Attributes = [NoThrow, Const] in { +let Features = "avx512f", Attributes = [NoThrow, Const, Constexpr] in { def kshiftlihi : X86Builtin<"unsigned short(unsigned short, _Constant unsigned int)">; } -let Features = "avx512bw", Attributes = [NoThrow, Const] in { +let Features = "avx512bw", Attributes = [NoThrow, Const, Constexpr] in { def kshiftlisi : X86Builtin<"unsigned int(unsigned int, _Constant unsigned int)">; def kshiftlidi : X86Builtin<"unsigned long long int(unsigned long long int, _Constant unsigned int)">; } -let Features = "avx512dq", Attributes = [NoThrow, Const] in { +let Features = "avx512dq", Attributes = [NoThrow, Const, Constexpr] in { def kshiftriqi : X86Builtin<"unsigned char(unsigned char, _Constant unsigned int)">; } -let Features = "avx512f", Attributes = [NoThrow, Const] in { +let Features = "avx512f", Attributes = [NoThrow, Const, Constexpr] in { def kshiftrihi : X86Builtin<"unsigned short(unsigned short, _Constant unsigned int)">; } -let Features = "avx512bw", Attributes = [NoThrow, Const] in { +let Features = "avx512bw", Attributes = [NoThrow, Const, Constexpr] in { def kshiftrisi : X86Builtin<"unsigned int(unsigned int, _Constant unsigned int)">; def kshiftridi : X86Builtin<"unsigned long long int(unsigned long long int, _Constant unsigned int)">; } diff --git a/clang/lib/AST/ByteCode/InterpBuiltin.cpp b/clang/lib/AST/ByteCode/InterpBuiltin.cpp index 12e5e7d142aa4..eec6ff66bfc02 100644 --- a/clang/lib/AST/ByteCode/InterpBuiltin.cpp +++ b/clang/lib/AST/ByteCode/InterpBuiltin.cpp @@ -4255,6 +4255,28 @@ bool InterpretBuiltin(InterpState &S, CodePtr OpPC, const CallExpr *Call, return APInt(sizeof(unsigned char) * 8, (A | B) == 0); }); + case clang::X86::BI__builtin_ia32_kshiftliqi: + case clang::X86::BI__builtin_ia32_kshiftlihi: + case clang::X86::BI__builtin_ia32_kshiftlisi: + case clang::X86::BI__builtin_ia32_kshiftlidi: + return interp__builtin_elementwise_int_binop( + S, OpPC, Call, [](const APSInt &LHS, const APSInt &RHS) { + if (RHS.uge(LHS.getBitWidth())) + return APInt::getZero(LHS.getBitWidth()); + return LHS.shl(RHS.getZExtValue()); + }); + + case clang::X86::BI__builtin_ia32_kshiftriqi: + case clang::X86::BI__builtin_ia32_kshiftrihi: + case clang::X86::BI__builtin_ia32_kshiftrisi: + case clang::X86::BI__builtin_ia32_kshiftridi: + return interp__builtin_elementwise_int_binop( + S, OpPC, Call, [](const APSInt &LHS, const APSInt &RHS) { + if (RHS.uge(LHS.getBitWidth())) + return APInt::getZero(LHS.getBitWidth()); + return LHS.lshr(RHS.getZExtValue()); + }); + case clang::X86::BI__builtin_ia32_lzcnt_u16: case clang::X86::BI__builtin_ia32_lzcnt_u32: case clang::X86::BI__builtin_ia32_lzcnt_u64: diff --git a/clang/lib/AST/ExprConstant.cpp b/clang/lib/AST/ExprConstant.cpp index e707c10e5089c..5443e284beb9d 100644 --- a/clang/lib/AST/ExprConstant.cpp +++ b/clang/lib/AST/ExprConstant.cpp @@ -17054,6 +17054,28 @@ bool IntExprEvaluator::VisitBuiltinCallExpr(const CallExpr *E, return Success(Val, E); } + case X86::BI__builtin_ia32_kshiftliqi: + case X86::BI__builtin_ia32_kshiftlihi: + case X86::BI__builtin_ia32_kshiftlisi: + case X86::BI__builtin_ia32_kshiftlidi: { + return HandleMaskBinOp([](const APSInt &LHS, const APSInt &RHS) { + if (RHS.uge(LHS.getBitWidth())) + return APSInt(APInt::getZero(LHS.getBitWidth()), LHS.isUnsigned()); + return APSInt(LHS.shl(RHS.getZExtValue()), LHS.isUnsigned()); + }); + } + + case X86::BI__builtin_ia32_kshiftriqi: + case X86::BI__builtin_ia32_kshiftrihi: + case X86::BI__builtin_ia32_kshiftrisi: + case X86::BI__builtin_ia32_kshiftridi: { + return HandleMaskBinOp([](const APSInt &LHS, const APSInt &RHS) { + if (RHS.uge(LHS.getBitWidth())) + return APSInt(APInt::getZero(LHS.getBitWidth()), LHS.isUnsigned()); + return APSInt(LHS.lshr(RHS.getZExtValue()), LHS.isUnsigned()); + }); + } + case clang::X86::BI__builtin_ia32_vec_ext_v4hi: case clang::X86::BI__builtin_ia32_vec_ext_v16qi: case clang::X86::BI__builtin_ia32_vec_ext_v8hi: diff --git a/clang/test/CodeGen/X86/avx512bw-builtins.c b/clang/test/CodeGen/X86/avx512bw-builtins.c index fd50ab97d2c42..f67e88d63577c 100644 --- a/clang/test/CodeGen/X86/avx512bw-builtins.c +++ b/clang/test/CodeGen/X86/avx512bw-builtins.c @@ -556,6 +556,23 @@ __mmask64 test_kshiftri_mask64(__m512i A, __m512i B, __m512i C, __m512i D) { return _mm512_mask_cmpneq_epu8_mask(_kshiftri_mask64(_mm512_cmpneq_epu8_mask(A, B), 32), C, D); } +TEST_CONSTEXPR(_kshiftli_mask32(0x00000001, 1) == 0x00000002); +TEST_CONSTEXPR(_kshiftli_mask32(0x00000001, 31) == 0x80000000); +TEST_CONSTEXPR(_kshiftli_mask32(0x00000001, 32) == 0x00000000); +TEST_CONSTEXPR(_kshiftli_mask32(0x0000FFFF, 8) == 0x00FFFF00); +TEST_CONSTEXPR(_kshiftri_mask32(0x80000000, 1) == 0x40000000); +TEST_CONSTEXPR(_kshiftri_mask32(0x80000000, 31) == 0x00000001); +TEST_CONSTEXPR(_kshiftri_mask32(0x80000000, 32) == 0x00000000); +TEST_CONSTEXPR(_kshiftri_mask32(0xFFFF0000, 8) == 0x00FFFF00); +TEST_CONSTEXPR(_kshiftli_mask64(0x0000000000000001ULL, 1) == 0x0000000000000002ULL); +TEST_CONSTEXPR(_kshiftli_mask64(0x0000000000000001ULL, 63) == 0x8000000000000000ULL); +TEST_CONSTEXPR(_kshiftli_mask64(0x0000000000000001ULL, 64) == 0x0000000000000000ULL); +TEST_CONSTEXPR(_kshiftli_mask64(0x00000000FFFFFFFFULL, 16) == 0x0000FFFFFFFF0000ULL); +TEST_CONSTEXPR(_kshiftri_mask64(0x8000000000000000ULL, 1) == 0x4000000000000000ULL); +TEST_CONSTEXPR(_kshiftri_mask64(0x8000000000000000ULL, 63) == 0x0000000000000001ULL); +TEST_CONSTEXPR(_kshiftri_mask64(0x8000000000000000ULL, 64) == 0x0000000000000000ULL); +TEST_CONSTEXPR(_kshiftri_mask64(0xFFFFFFFF00000000ULL, 16) == 0x0000FFFFFFFF0000ULL); + unsigned int test_cvtmask32_u32(__m512i A, __m512i B) { // CHECK-LABEL: test_cvtmask32_u32 return _cvtmask32_u32(_mm512_cmpneq_epu16_mask(A, B)); diff --git a/clang/test/CodeGen/X86/avx512dq-builtins.c b/clang/test/CodeGen/X86/avx512dq-builtins.c index b8d9587af0394..839ae7ab5d5ea 100644 --- a/clang/test/CodeGen/X86/avx512dq-builtins.c +++ b/clang/test/CodeGen/X86/avx512dq-builtins.c @@ -372,6 +372,15 @@ __mmask8 test_kshiftri_mask8(__m512i A, __m512i B, __m512i C, __m512i D) { return _mm512_mask_cmpneq_epu64_mask(_kshiftri_mask8(_mm512_cmpneq_epu64_mask(A, B), 2), C, D); } +TEST_CONSTEXPR(_kshiftli_mask8(0x01, 1) == 0x02); +TEST_CONSTEXPR(_kshiftli_mask8(0x01, 7) == 0x80); +TEST_CONSTEXPR(_kshiftli_mask8(0x01, 8) == 0x00); +TEST_CONSTEXPR(_kshiftli_mask8(0x0F, 2) == 0x3C); +TEST_CONSTEXPR(_kshiftri_mask8(0x80, 1) == 0x40); +TEST_CONSTEXPR(_kshiftri_mask8(0x80, 7) == 0x01); +TEST_CONSTEXPR(_kshiftri_mask8(0x80, 8) == 0x00); +TEST_CONSTEXPR(_kshiftri_mask8(0xF0, 2) == 0x3C); + unsigned int test_cvtmask8_u32(__m512i A, __m512i B) { // CHECK-LABEL: test_cvtmask8_u32 // CHECK: zext i8 %{{.*}} to i32 diff --git a/clang/test/CodeGen/X86/avx512f-builtins.c b/clang/test/CodeGen/X86/avx512f-builtins.c index 49e606e4ee1cb..8cb859e94556f 100644 --- a/clang/test/CodeGen/X86/avx512f-builtins.c +++ b/clang/test/CodeGen/X86/avx512f-builtins.c @@ -9581,6 +9581,15 @@ __mmask16 test_kshiftri_mask16(__m512i A, __m512i B, __m512i C, __m512i D) { return _mm512_mask_cmpneq_epu32_mask(_kshiftri_mask16(_mm512_cmpneq_epu32_mask(A, B), 1), C, D); } +TEST_CONSTEXPR(_kshiftli_mask16(0x0001, 1) == 0x0002); +TEST_CONSTEXPR(_kshiftli_mask16(0x0001, 15) == 0x8000); +TEST_CONSTEXPR(_kshiftli_mask16(0x0001, 16) == 0x0000); +TEST_CONSTEXPR(_kshiftli_mask16(0x00FF, 4) == 0x0FF0); +TEST_CONSTEXPR(_kshiftri_mask16(0x8000, 1) == 0x4000); +TEST_CONSTEXPR(_kshiftri_mask16(0x8000, 15) == 0x0001); +TEST_CONSTEXPR(_kshiftri_mask16(0x8000, 16) == 0x0000); +TEST_CONSTEXPR(_kshiftri_mask16(0xFF00, 4) == 0x0FF0); + unsigned int test_cvtmask16_u32(__m512i A, __m512i B) { // CHECK-LABEL: test_cvtmask16_u32 // CHECK: bitcast <16 x i1> %{{.*}} to i16 >From a428622303a0173ceb26733c49c7a351c80a09ea Mon Sep 17 00:00:00 2001 From: Medha Tiwari <[email protected]> Date: Wed, 3 Dec 2025 22:07:10 +0530 Subject: [PATCH 2/2] Address review comments: mask shift amount with 0xFF and fix test placement Signed-off-by: Medha Tiwari <[email protected]> --- clang/lib/AST/ByteCode/InterpBuiltin.cpp | 10 +++++---- clang/lib/AST/ExprConstant.cpp | 10 +++++---- clang/test/CodeGen/X86/avx512bw-builtins.c | 25 +++++++++++----------- clang/test/CodeGen/X86/avx512dq-builtins.c | 9 ++++---- clang/test/CodeGen/X86/avx512f-builtins.c | 9 ++++---- 5 files changed, 32 insertions(+), 31 deletions(-) diff --git a/clang/lib/AST/ByteCode/InterpBuiltin.cpp b/clang/lib/AST/ByteCode/InterpBuiltin.cpp index eec6ff66bfc02..382273e768919 100644 --- a/clang/lib/AST/ByteCode/InterpBuiltin.cpp +++ b/clang/lib/AST/ByteCode/InterpBuiltin.cpp @@ -4261,9 +4261,10 @@ bool InterpretBuiltin(InterpState &S, CodePtr OpPC, const CallExpr *Call, case clang::X86::BI__builtin_ia32_kshiftlidi: return interp__builtin_elementwise_int_binop( S, OpPC, Call, [](const APSInt &LHS, const APSInt &RHS) { - if (RHS.uge(LHS.getBitWidth())) + unsigned Amt = RHS.getZExtValue() & 0xFF; + if (Amt >= LHS.getBitWidth()) return APInt::getZero(LHS.getBitWidth()); - return LHS.shl(RHS.getZExtValue()); + return LHS.shl(Amt); }); case clang::X86::BI__builtin_ia32_kshiftriqi: @@ -4272,9 +4273,10 @@ bool InterpretBuiltin(InterpState &S, CodePtr OpPC, const CallExpr *Call, case clang::X86::BI__builtin_ia32_kshiftridi: return interp__builtin_elementwise_int_binop( S, OpPC, Call, [](const APSInt &LHS, const APSInt &RHS) { - if (RHS.uge(LHS.getBitWidth())) + unsigned Amt = RHS.getZExtValue() & 0xFF; + if (Amt >= LHS.getBitWidth()) return APInt::getZero(LHS.getBitWidth()); - return LHS.lshr(RHS.getZExtValue()); + return LHS.lshr(Amt); }); case clang::X86::BI__builtin_ia32_lzcnt_u16: diff --git a/clang/lib/AST/ExprConstant.cpp b/clang/lib/AST/ExprConstant.cpp index 5443e284beb9d..c1fb95c084d73 100644 --- a/clang/lib/AST/ExprConstant.cpp +++ b/clang/lib/AST/ExprConstant.cpp @@ -17059,9 +17059,10 @@ bool IntExprEvaluator::VisitBuiltinCallExpr(const CallExpr *E, case X86::BI__builtin_ia32_kshiftlisi: case X86::BI__builtin_ia32_kshiftlidi: { return HandleMaskBinOp([](const APSInt &LHS, const APSInt &RHS) { - if (RHS.uge(LHS.getBitWidth())) + unsigned Amt = RHS.getZExtValue() & 0xFF; + if (Amt >= LHS.getBitWidth()) return APSInt(APInt::getZero(LHS.getBitWidth()), LHS.isUnsigned()); - return APSInt(LHS.shl(RHS.getZExtValue()), LHS.isUnsigned()); + return APSInt(LHS.shl(Amt), LHS.isUnsigned()); }); } @@ -17070,9 +17071,10 @@ bool IntExprEvaluator::VisitBuiltinCallExpr(const CallExpr *E, case X86::BI__builtin_ia32_kshiftrisi: case X86::BI__builtin_ia32_kshiftridi: { return HandleMaskBinOp([](const APSInt &LHS, const APSInt &RHS) { - if (RHS.uge(LHS.getBitWidth())) + unsigned Amt = RHS.getZExtValue() & 0xFF; + if (Amt >= LHS.getBitWidth()) return APSInt(APInt::getZero(LHS.getBitWidth()), LHS.isUnsigned()); - return APSInt(LHS.lshr(RHS.getZExtValue()), LHS.isUnsigned()); + return APSInt(LHS.lshr(Amt), LHS.isUnsigned()); }); } diff --git a/clang/test/CodeGen/X86/avx512bw-builtins.c b/clang/test/CodeGen/X86/avx512bw-builtins.c index f67e88d63577c..7cdec9b4cbbee 100644 --- a/clang/test/CodeGen/X86/avx512bw-builtins.c +++ b/clang/test/CodeGen/X86/avx512bw-builtins.c @@ -534,6 +534,10 @@ __mmask32 test_kshiftli_mask32(__m512i A, __m512i B, __m512i C, __m512i D) { // CHECK: [[RES:%.*]] = shufflevector <32 x i1> zeroinitializer, <32 x i1> [[VAL]], <32 x i32> <i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 32> return _mm512_mask_cmpneq_epu16_mask(_kshiftli_mask32(_mm512_cmpneq_epu16_mask(A, B), 31), C, D); } +TEST_CONSTEXPR(_kshiftli_mask32(0x00000001, 1) == 0x00000002); +TEST_CONSTEXPR(_kshiftli_mask32(0x00000001, 31) == 0x80000000); +TEST_CONSTEXPR(_kshiftli_mask32(0x00000001, 32) == 0x00000000); +TEST_CONSTEXPR(_kshiftli_mask32(0x0000FFFF, 8) == 0x00FFFF00); __mmask32 test_kshiftri_mask32(__m512i A, __m512i B, __m512i C, __m512i D) { // CHECK-LABEL: test_kshiftri_mask32 @@ -541,6 +545,10 @@ __mmask32 test_kshiftri_mask32(__m512i A, __m512i B, __m512i C, __m512i D) { // CHECK: [[RES:%.*]] = shufflevector <32 x i1> [[VAL]], <32 x i1> zeroinitializer, <32 x i32> <i32 31, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62> return _mm512_mask_cmpneq_epu16_mask(_kshiftri_mask32(_mm512_cmpneq_epu16_mask(A, B), 31), C, D); } +TEST_CONSTEXPR(_kshiftri_mask32(0x80000000, 1) == 0x40000000); +TEST_CONSTEXPR(_kshiftri_mask32(0x80000000, 31) == 0x00000001); +TEST_CONSTEXPR(_kshiftri_mask32(0x80000000, 32) == 0x00000000); +TEST_CONSTEXPR(_kshiftri_mask32(0xFFFF0000, 8) == 0x00FFFF00); __mmask64 test_kshiftli_mask64(__m512i A, __m512i B, __m512i C, __m512i D) { // CHECK-LABEL: test_kshiftli_mask64 @@ -548,6 +556,10 @@ __mmask64 test_kshiftli_mask64(__m512i A, __m512i B, __m512i C, __m512i D) { // CHECK: [[RES:%.*]] = shufflevector <64 x i1> zeroinitializer, <64 x i1> [[VAL]], <64 x i32> <i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95> return _mm512_mask_cmpneq_epu8_mask(_kshiftli_mask64(_mm512_cmpneq_epu8_mask(A, B), 32), C, D); } +TEST_CONSTEXPR(_kshiftli_mask64(0x0000000000000001ULL, 1) == 0x0000000000000002ULL); +TEST_CONSTEXPR(_kshiftli_mask64(0x0000000000000001ULL, 63) == 0x8000000000000000ULL); +TEST_CONSTEXPR(_kshiftli_mask64(0x0000000000000001ULL, 64) == 0x0000000000000000ULL); +TEST_CONSTEXPR(_kshiftli_mask64(0x00000000FFFFFFFFULL, 16) == 0x0000FFFFFFFF0000ULL); __mmask64 test_kshiftri_mask64(__m512i A, __m512i B, __m512i C, __m512i D) { // CHECK-LABEL: test_kshiftri_mask64 @@ -555,19 +567,6 @@ __mmask64 test_kshiftri_mask64(__m512i A, __m512i B, __m512i C, __m512i D) { // CHECK: [[RES:%.*]] = shufflevector <64 x i1> [[VAL]], <64 x i1> zeroinitializer, <64 x i32> <i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95> return _mm512_mask_cmpneq_epu8_mask(_kshiftri_mask64(_mm512_cmpneq_epu8_mask(A, B), 32), C, D); } - -TEST_CONSTEXPR(_kshiftli_mask32(0x00000001, 1) == 0x00000002); -TEST_CONSTEXPR(_kshiftli_mask32(0x00000001, 31) == 0x80000000); -TEST_CONSTEXPR(_kshiftli_mask32(0x00000001, 32) == 0x00000000); -TEST_CONSTEXPR(_kshiftli_mask32(0x0000FFFF, 8) == 0x00FFFF00); -TEST_CONSTEXPR(_kshiftri_mask32(0x80000000, 1) == 0x40000000); -TEST_CONSTEXPR(_kshiftri_mask32(0x80000000, 31) == 0x00000001); -TEST_CONSTEXPR(_kshiftri_mask32(0x80000000, 32) == 0x00000000); -TEST_CONSTEXPR(_kshiftri_mask32(0xFFFF0000, 8) == 0x00FFFF00); -TEST_CONSTEXPR(_kshiftli_mask64(0x0000000000000001ULL, 1) == 0x0000000000000002ULL); -TEST_CONSTEXPR(_kshiftli_mask64(0x0000000000000001ULL, 63) == 0x8000000000000000ULL); -TEST_CONSTEXPR(_kshiftli_mask64(0x0000000000000001ULL, 64) == 0x0000000000000000ULL); -TEST_CONSTEXPR(_kshiftli_mask64(0x00000000FFFFFFFFULL, 16) == 0x0000FFFFFFFF0000ULL); TEST_CONSTEXPR(_kshiftri_mask64(0x8000000000000000ULL, 1) == 0x4000000000000000ULL); TEST_CONSTEXPR(_kshiftri_mask64(0x8000000000000000ULL, 63) == 0x0000000000000001ULL); TEST_CONSTEXPR(_kshiftri_mask64(0x8000000000000000ULL, 64) == 0x0000000000000000ULL); diff --git a/clang/test/CodeGen/X86/avx512dq-builtins.c b/clang/test/CodeGen/X86/avx512dq-builtins.c index 839ae7ab5d5ea..d8647b5547ceb 100644 --- a/clang/test/CodeGen/X86/avx512dq-builtins.c +++ b/clang/test/CodeGen/X86/avx512dq-builtins.c @@ -364,6 +364,10 @@ __mmask8 test_kshiftli_mask8(__m512i A, __m512i B, __m512i C, __m512i D) { // CHECK: [[RES:%.*]] = shufflevector <8 x i1> zeroinitializer, <8 x i1> [[VAL]], <8 x i32> <i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13> return _mm512_mask_cmpneq_epu64_mask(_kshiftli_mask8(_mm512_cmpneq_epu64_mask(A, B), 2), C, D); } +TEST_CONSTEXPR(_kshiftli_mask8(0x01, 1) == 0x02); +TEST_CONSTEXPR(_kshiftli_mask8(0x01, 7) == 0x80); +TEST_CONSTEXPR(_kshiftli_mask8(0x01, 8) == 0x00); +TEST_CONSTEXPR(_kshiftli_mask8(0x0F, 2) == 0x3C); __mmask8 test_kshiftri_mask8(__m512i A, __m512i B, __m512i C, __m512i D) { // CHECK-LABEL: test_kshiftri_mask8 @@ -371,11 +375,6 @@ __mmask8 test_kshiftri_mask8(__m512i A, __m512i B, __m512i C, __m512i D) { // CHECK: [[RES:%.*]] = shufflevector <8 x i1> [[VAL]], <8 x i1> zeroinitializer, <8 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9> return _mm512_mask_cmpneq_epu64_mask(_kshiftri_mask8(_mm512_cmpneq_epu64_mask(A, B), 2), C, D); } - -TEST_CONSTEXPR(_kshiftli_mask8(0x01, 1) == 0x02); -TEST_CONSTEXPR(_kshiftli_mask8(0x01, 7) == 0x80); -TEST_CONSTEXPR(_kshiftli_mask8(0x01, 8) == 0x00); -TEST_CONSTEXPR(_kshiftli_mask8(0x0F, 2) == 0x3C); TEST_CONSTEXPR(_kshiftri_mask8(0x80, 1) == 0x40); TEST_CONSTEXPR(_kshiftri_mask8(0x80, 7) == 0x01); TEST_CONSTEXPR(_kshiftri_mask8(0x80, 8) == 0x00); diff --git a/clang/test/CodeGen/X86/avx512f-builtins.c b/clang/test/CodeGen/X86/avx512f-builtins.c index 8cb859e94556f..ab047a8ecd55e 100644 --- a/clang/test/CodeGen/X86/avx512f-builtins.c +++ b/clang/test/CodeGen/X86/avx512f-builtins.c @@ -9572,6 +9572,10 @@ __mmask16 test_kshiftli_mask16(__m512i A, __m512i B, __m512i C, __m512i D) { // CHECK: bitcast <16 x i1> {{.*}} to i16 return _mm512_mask_cmpneq_epu32_mask(_kshiftli_mask16(_mm512_cmpneq_epu32_mask(A, B), 1), C, D); } +TEST_CONSTEXPR(_kshiftli_mask16(0x0001, 1) == 0x0002); +TEST_CONSTEXPR(_kshiftli_mask16(0x0001, 15) == 0x8000); +TEST_CONSTEXPR(_kshiftli_mask16(0x0001, 16) == 0x0000); +TEST_CONSTEXPR(_kshiftli_mask16(0x00FF, 4) == 0x0FF0); __mmask16 test_kshiftri_mask16(__m512i A, __m512i B, __m512i C, __m512i D) { // CHECK-LABEL: test_kshiftri_mask16 @@ -9580,11 +9584,6 @@ __mmask16 test_kshiftri_mask16(__m512i A, __m512i B, __m512i C, __m512i D) { // CHECK: bitcast <16 x i1> {{.*}} to i16 return _mm512_mask_cmpneq_epu32_mask(_kshiftri_mask16(_mm512_cmpneq_epu32_mask(A, B), 1), C, D); } - -TEST_CONSTEXPR(_kshiftli_mask16(0x0001, 1) == 0x0002); -TEST_CONSTEXPR(_kshiftli_mask16(0x0001, 15) == 0x8000); -TEST_CONSTEXPR(_kshiftli_mask16(0x0001, 16) == 0x0000); -TEST_CONSTEXPR(_kshiftli_mask16(0x00FF, 4) == 0x0FF0); TEST_CONSTEXPR(_kshiftri_mask16(0x8000, 1) == 0x4000); TEST_CONSTEXPR(_kshiftri_mask16(0x8000, 15) == 0x0001); TEST_CONSTEXPR(_kshiftri_mask16(0x8000, 16) == 0x0000); _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
