================
@@ -1841,6 +1841,23 @@ def SVPMULLT_PAIR_U64 : SInst<"svpmullt_pair[_{d}]",
"ddd", "Ul", MergeNone,
def SVPMULLT_PAIR_N_U64 : SInst<"svpmullt_pair[_n_{d}]", "dda", "Ul",
MergeNone, "aarch64_sve_pmullt_pair", [VerifyRuntimeMode]>;
}
+let SVETargetGuard = "sve-aes2", SMETargetGuard = "sve-aes2,ssve-aes" in {
+def SVAESD_X2 : SInst<"svaesd_lane[_{d}_x2]", "22di", "Uc", MergeNone,
"aarch64_sve_aesd_lane_x2", [IsOverloadNone, VerifyRuntimeMode]>;
+def SVAESDIMC_X2 : SInst<"svaesdimc_lane[_{d}_x2]", "22di", "Uc", MergeNone,
"aarch64_sve_aesdimc_lane_x2", [IsOverloadNone, VerifyRuntimeMode]>;
+def SVAESE_X2 : SInst<"svaese_lane[_{d}_x2]", "22di", "Uc", MergeNone,
"aarch64_sve_aese_lane_x2", [IsOverloadNone, VerifyRuntimeMode]>;
+def SVAESEMC_X2 : SInst<"svaesemc_lane[_{d}_x2]", "22di", "Uc", MergeNone,
"aarch64_sve_aesemc_lane_x2", [IsOverloadNone, VerifyRuntimeMode]>;
+
+def SVAESD_X4 : SInst<"svaesd_lane[_{d}_x4]", "44di", "Uc", MergeNone,
"aarch64_sve_aesd_lane_x4", [IsOverloadNone, VerifyRuntimeMode]>;
+def SVAESDIMC_X4 : SInst<"svaesdimc_lane[_{d}_x4]", "44di", "Uc", MergeNone,
"aarch64_sve_aesdimc_lane_x4", [IsOverloadNone, VerifyRuntimeMode]>;
+def SVAESE_X4 : SInst<"svaese_lane[_{d}_x4]", "44di", "Uc", MergeNone,
"aarch64_sve_aese_lane_x4", [IsOverloadNone, VerifyRuntimeMode]>;
+def SVAESEMC_X4 : SInst<"svaesemc_lane[_{d}_x4]", "44di", "Uc", MergeNone,
"aarch64_sve_aesemc_lane_x4", [IsOverloadNone, VerifyRuntimeMode]>;
+
+def SVPMULL_PAIR_U64 : SInst<"svpmull_pair[_{d}_x2]", "2dd", "Ul",
MergeNone, "aarch64_sve_pmull_pair_x2", [IsOverloadNone, VerifyRuntimeMode]>;
+def SVPMULL_PAIR_N_U64 : SInst<"svpmull_pair[_n_{d}_x2]", "2da", "Ul",
MergeNone, "aarch64_sve_pmull_pair_x2", [IsOverloadNone, VerifyRuntimeMode]>;
+def SVPMLAL_PAIR_U64 : SInst<"svpmlal_pair[_{d}_x2]", "22dd", "Ul",
MergeNone, "aarch64_sve_pmlal_pair_x2", [IsOverloadNone, VerifyRuntimeMode]>;
+def SVPMLAL_PAIR_N_U64 : SInst<"svpmlal_pair[_n_{d}_x2]", "22da", "Ul",
MergeNone, "aarch64_sve_pmlal_pair_x2", [IsOverloadNone, VerifyRuntimeMode]>;
----------------
Lukacma wrote:
Thanks. That's actually an ACLE issue. Since this instruction is kind of a mix
of pmullb and pmullt, the intrinsics should be the same as for those (so only
u64 variant should exist).
https://github.com/llvm/llvm-project/pull/165545
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