dstenb wrote:
Thanks for picking this up, @OCHyams, and sorry for some delay in reviewing
this!
I see that you discussed omitting `DW_AT_data_bit_offset` of value 0. I think
that we need to amend the patch so that it emits that attribute for non byte
size-multiple types on big-endian targets. I think I may have only experimented
with x86 when I made that initial patch (I see that there is a commented out
line adding that attribute in my patch that I don't remember the history for).
I have confirmed this by trying out this patch on our downstream target with
GDB, and I think it can be seen e.g. with the following MIPS example:
```
struct { uint16_t a : 1; uint16_t b : 15; } bf = { .b = 0x3fffU };
unsigned _BitInt(15) bi = 0x3fffU;
```
Memory-wise the two globals are the same, with `bf.a` "emulating" the padding
bit in the stored `bi` value. The `bf.b` field gets a `DW_AT_data_bit_offset`
of 1, so I think we need to do the same for `bi`.
```
0x0000003c: DW_TAG_member
DW_AT_name ("b")
DW_AT_type (0x00000047 "uint16_t")
DW_AT_decl_file ("bif.c")
DW_AT_decl_line (3)
DW_AT_bit_size (0x0f)
DW_AT_data_bit_offset (0x01)
```
https://github.com/llvm/llvm-project/pull/164372
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