================
@@ -616,6 +616,35 @@ unsigned ARMBaseInstrInfo::getInstSizeInBytes(const
MachineInstr &MI) const {
// contrast to AArch64 instructions which have a default size of 4 bytes
for
// example.
return MCID.getSize();
+ case ARM::KCFI_CHECK: {
----------------
kees wrote:
This required 3 separate `PseudoInst`s, but it does end up being a little
easier to read. Or rather, what is being expanded is now very clear as the
bundle is named based on the subarch.
I notice that none of the other architectures include Size in their Tablegen
KCFI_CHECK definitions. Is this just waiting to bite us (instructions with
relative offsets needed are just much larger on non-ARM)? Do the other
architectures need to have this added?
https://github.com/llvm/llvm-project/pull/163698
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