https://github.com/markbhasawut updated
https://github.com/llvm/llvm-project/pull/156901
>From 2b91d9f709d8bfbeac5f1157d76945896f7dbfc3 Mon Sep 17 00:00:00 2001
From: Bhasawut Singhaphan <bhasa...@gmail.com>
Date: Thu, 4 Sep 2025 21:41:54 +0700
Subject: [PATCH 1/2] [Headers][X86] Allow AVX512 integer min/max mask/maskz
variants intrinsics to be used in constexpr
Update the AVX512 integer min/max mask/maskz variants intrinsics to be constexpr
compatible.
This is the last in the 'Allow MMX/SSE/AVX2/AVX512 integer min/max intrinsics
to be used in constexpr' series.
---
clang/lib/Headers/avx512bwintrin.h | 81 +++++++++-------------
clang/lib/Headers/avx512fintrin.h | 80 +++++++++------------
clang/test/CodeGen/X86/avx512bw-builtins.c | 48 +++++++++++++
clang/test/CodeGen/X86/avx512f-builtins.c | 34 ++++++++-
4 files changed, 145 insertions(+), 98 deletions(-)
diff --git a/clang/lib/Headers/avx512bwintrin.h
b/clang/lib/Headers/avx512bwintrin.h
index a08735b937704..e0d3e676ac470 100644
--- a/clang/lib/Headers/avx512bwintrin.h
+++ b/clang/lib/Headers/avx512bwintrin.h
@@ -742,17 +742,15 @@ _mm512_max_epi8(__m512i __A, __m512i __B) {
return (__m512i)__builtin_elementwise_max((__v64qs) __A, (__v64qs) __B);
}
-static __inline__ __m512i __DEFAULT_FN_ATTRS512
-_mm512_maskz_max_epi8 (__mmask64 __M, __m512i __A, __m512i __B)
-{
+static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
+_mm512_maskz_max_epi8(__mmask64 __M, __m512i __A, __m512i __B) {
return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M,
(__v64qi)_mm512_max_epi8(__A,
__B),
(__v64qi)_mm512_setzero_si512());
}
-static __inline__ __m512i __DEFAULT_FN_ATTRS512
-_mm512_mask_max_epi8 (__m512i __W, __mmask64 __M, __m512i __A, __m512i __B)
-{
+static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
+_mm512_mask_max_epi8(__m512i __W, __mmask64 __M, __m512i __A, __m512i __B) {
return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M,
(__v64qi)_mm512_max_epi8(__A,
__B),
(__v64qi)__W);
@@ -763,18 +761,15 @@ _mm512_max_epi16(__m512i __A, __m512i __B) {
return (__m512i)__builtin_elementwise_max((__v32hi) __A, (__v32hi) __B);
}
-static __inline__ __m512i __DEFAULT_FN_ATTRS512
-_mm512_maskz_max_epi16 (__mmask32 __M, __m512i __A, __m512i __B)
-{
+static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
+_mm512_maskz_max_epi16(__mmask32 __M, __m512i __A, __m512i __B) {
return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M,
(__v32hi)_mm512_max_epi16(__A,
__B),
(__v32hi)_mm512_setzero_si512());
}
-static __inline__ __m512i __DEFAULT_FN_ATTRS512
-_mm512_mask_max_epi16 (__m512i __W, __mmask32 __M, __m512i __A,
- __m512i __B)
-{
+static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
+_mm512_mask_max_epi16(__m512i __W, __mmask32 __M, __m512i __A, __m512i __B) {
return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M,
(__v32hi)_mm512_max_epi16(__A,
__B),
(__v32hi)__W);
@@ -785,17 +780,15 @@ _mm512_max_epu8(__m512i __A, __m512i __B) {
return (__m512i)__builtin_elementwise_max((__v64qu)__A, (__v64qu)__B);
}
-static __inline__ __m512i __DEFAULT_FN_ATTRS512
-_mm512_maskz_max_epu8 (__mmask64 __M, __m512i __A, __m512i __B)
-{
+static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
+_mm512_maskz_max_epu8(__mmask64 __M, __m512i __A, __m512i __B) {
return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M,
(__v64qi)_mm512_max_epu8(__A,
__B),
(__v64qi)_mm512_setzero_si512());
}
-static __inline__ __m512i __DEFAULT_FN_ATTRS512
-_mm512_mask_max_epu8 (__m512i __W, __mmask64 __M, __m512i __A, __m512i __B)
-{
+static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
+_mm512_mask_max_epu8(__m512i __W, __mmask64 __M, __m512i __A, __m512i __B) {
return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M,
(__v64qi)_mm512_max_epu8(__A,
__B),
(__v64qi)__W);
@@ -806,17 +799,15 @@ _mm512_max_epu16(__m512i __A, __m512i __B) {
return (__m512i)__builtin_elementwise_max((__v32hu)__A, (__v32hu)__B);
}
-static __inline__ __m512i __DEFAULT_FN_ATTRS512
-_mm512_maskz_max_epu16 (__mmask32 __M, __m512i __A, __m512i __B)
-{
+static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
+_mm512_maskz_max_epu16(__mmask32 __M, __m512i __A, __m512i __B) {
return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M,
(__v32hi)_mm512_max_epu16(__A,
__B),
(__v32hi)_mm512_setzero_si512());
}
-static __inline__ __m512i __DEFAULT_FN_ATTRS512
-_mm512_mask_max_epu16 (__m512i __W, __mmask32 __M, __m512i __A, __m512i __B)
-{
+static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
+_mm512_mask_max_epu16(__m512i __W, __mmask32 __M, __m512i __A, __m512i __B) {
return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M,
(__v32hi)_mm512_max_epu16(__A,
__B),
(__v32hi)__W);
@@ -827,17 +818,15 @@ _mm512_min_epi8(__m512i __A, __m512i __B) {
return (__m512i)__builtin_elementwise_min((__v64qs) __A, (__v64qs) __B);
}
-static __inline__ __m512i __DEFAULT_FN_ATTRS512
-_mm512_maskz_min_epi8 (__mmask64 __M, __m512i __A, __m512i __B)
-{
+static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
+_mm512_maskz_min_epi8(__mmask64 __M, __m512i __A, __m512i __B) {
return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M,
(__v64qi)_mm512_min_epi8(__A,
__B),
(__v64qi)_mm512_setzero_si512());
}
-static __inline__ __m512i __DEFAULT_FN_ATTRS512
-_mm512_mask_min_epi8 (__m512i __W, __mmask64 __M, __m512i __A, __m512i __B)
-{
+static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
+_mm512_mask_min_epi8(__m512i __W, __mmask64 __M, __m512i __A, __m512i __B) {
return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M,
(__v64qi)_mm512_min_epi8(__A,
__B),
(__v64qi)__W);
@@ -848,17 +837,15 @@ _mm512_min_epi16(__m512i __A, __m512i __B) {
return (__m512i)__builtin_elementwise_min((__v32hi) __A, (__v32hi) __B);
}
-static __inline__ __m512i __DEFAULT_FN_ATTRS512
-_mm512_maskz_min_epi16 (__mmask32 __M, __m512i __A, __m512i __B)
-{
+static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
+_mm512_maskz_min_epi16(__mmask32 __M, __m512i __A, __m512i __B) {
return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M,
(__v32hi)_mm512_min_epi16(__A,
__B),
(__v32hi)_mm512_setzero_si512());
}
-static __inline__ __m512i __DEFAULT_FN_ATTRS512
-_mm512_mask_min_epi16 (__m512i __W, __mmask32 __M, __m512i __A, __m512i __B)
-{
+static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
+_mm512_mask_min_epi16(__m512i __W, __mmask32 __M, __m512i __A, __m512i __B) {
return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M,
(__v32hi)_mm512_min_epi16(__A,
__B),
(__v32hi)__W);
@@ -869,17 +856,15 @@ _mm512_min_epu8(__m512i __A, __m512i __B) {
return (__m512i)__builtin_elementwise_min((__v64qu)__A, (__v64qu)__B);
}
-static __inline__ __m512i __DEFAULT_FN_ATTRS512
-_mm512_maskz_min_epu8 (__mmask64 __M, __m512i __A, __m512i __B)
-{
+static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
+_mm512_maskz_min_epu8(__mmask64 __M, __m512i __A, __m512i __B) {
return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M,
(__v64qi)_mm512_min_epu8(__A,
__B),
(__v64qi)_mm512_setzero_si512());
}
-static __inline__ __m512i __DEFAULT_FN_ATTRS512
-_mm512_mask_min_epu8 (__m512i __W, __mmask64 __M, __m512i __A, __m512i __B)
-{
+static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
+_mm512_mask_min_epu8(__m512i __W, __mmask64 __M, __m512i __A, __m512i __B) {
return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M,
(__v64qi)_mm512_min_epu8(__A,
__B),
(__v64qi)__W);
@@ -890,17 +875,15 @@ _mm512_min_epu16(__m512i __A, __m512i __B) {
return (__m512i)__builtin_elementwise_min((__v32hu)__A, (__v32hu)__B);
}
-static __inline__ __m512i __DEFAULT_FN_ATTRS512
-_mm512_maskz_min_epu16 (__mmask32 __M, __m512i __A, __m512i __B)
-{
+static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
+_mm512_maskz_min_epu16(__mmask32 __M, __m512i __A, __m512i __B) {
return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M,
(__v32hi)_mm512_min_epu16(__A,
__B),
(__v32hi)_mm512_setzero_si512());
}
-static __inline__ __m512i __DEFAULT_FN_ATTRS512
-_mm512_mask_min_epu16 (__m512i __W, __mmask32 __M, __m512i __A, __m512i __B)
-{
+static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
+_mm512_mask_min_epu16(__m512i __W, __mmask32 __M, __m512i __A, __m512i __B) {
return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M,
(__v32hi)_mm512_min_epu16(__A,
__B),
(__v32hi)__W);
diff --git a/clang/lib/Headers/avx512fintrin.h
b/clang/lib/Headers/avx512fintrin.h
index 3e285f031ffe8..b9475d3f1d410 100644
--- a/clang/lib/Headers/avx512fintrin.h
+++ b/clang/lib/Headers/avx512fintrin.h
@@ -1091,17 +1091,15 @@ static __inline __m512i
return (__m512i)__builtin_elementwise_max((__v16si)__A, (__v16si)__B);
}
-static __inline__ __m512i __DEFAULT_FN_ATTRS512
-_mm512_mask_max_epi32 (__m512i __W, __mmask16 __M, __m512i __A, __m512i __B)
-{
+static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
+_mm512_mask_max_epi32(__m512i __W, __mmask16 __M, __m512i __A, __m512i __B) {
return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M,
(__v16si)_mm512_max_epi32(__A,
__B),
(__v16si)__W);
}
-static __inline__ __m512i __DEFAULT_FN_ATTRS512
-_mm512_maskz_max_epi32 (__mmask16 __M, __m512i __A, __m512i __B)
-{
+static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
+_mm512_maskz_max_epi32(__mmask16 __M, __m512i __A, __m512i __B) {
return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M,
(__v16si)_mm512_max_epi32(__A,
__B),
(__v16si)_mm512_setzero_si512());
@@ -1112,17 +1110,15 @@ _mm512_max_epu32(__m512i __A, __m512i __B) {
return (__m512i)__builtin_elementwise_max((__v16su)__A, (__v16su)__B);
}
-static __inline__ __m512i __DEFAULT_FN_ATTRS512
-_mm512_mask_max_epu32 (__m512i __W, __mmask16 __M, __m512i __A, __m512i __B)
-{
+static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
+_mm512_mask_max_epu32(__m512i __W, __mmask16 __M, __m512i __A, __m512i __B) {
return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M,
(__v16si)_mm512_max_epu32(__A,
__B),
(__v16si)__W);
}
-static __inline__ __m512i __DEFAULT_FN_ATTRS512
-_mm512_maskz_max_epu32 (__mmask16 __M, __m512i __A, __m512i __B)
-{
+static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
+_mm512_maskz_max_epu32(__mmask16 __M, __m512i __A, __m512i __B) {
return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M,
(__v16si)_mm512_max_epu32(__A,
__B),
(__v16si)_mm512_setzero_si512());
@@ -1133,17 +1129,15 @@ _mm512_max_epi64(__m512i __A, __m512i __B) {
return (__m512i)__builtin_elementwise_max((__v8di)__A, (__v8di)__B);
}
-static __inline__ __m512i __DEFAULT_FN_ATTRS512
-_mm512_mask_max_epi64 (__m512i __W, __mmask8 __M, __m512i __A, __m512i __B)
-{
+static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
+_mm512_mask_max_epi64(__m512i __W, __mmask8 __M, __m512i __A, __m512i __B) {
return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M,
(__v8di)_mm512_max_epi64(__A,
__B),
(__v8di)__W);
}
-static __inline__ __m512i __DEFAULT_FN_ATTRS512
-_mm512_maskz_max_epi64 (__mmask8 __M, __m512i __A, __m512i __B)
-{
+static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
+_mm512_maskz_max_epi64(__mmask8 __M, __m512i __A, __m512i __B) {
return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M,
(__v8di)_mm512_max_epi64(__A,
__B),
(__v8di)_mm512_setzero_si512());
@@ -1154,17 +1148,15 @@ _mm512_max_epu64(__m512i __A, __m512i __B) {
return (__m512i)__builtin_elementwise_max((__v8du)__A, (__v8du)__B);
}
-static __inline__ __m512i __DEFAULT_FN_ATTRS512
-_mm512_mask_max_epu64 (__m512i __W, __mmask8 __M, __m512i __A, __m512i __B)
-{
+static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
+_mm512_mask_max_epu64(__m512i __W, __mmask8 __M, __m512i __A, __m512i __B) {
return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M,
(__v8di)_mm512_max_epu64(__A,
__B),
(__v8di)__W);
}
-static __inline__ __m512i __DEFAULT_FN_ATTRS512
-_mm512_maskz_max_epu64 (__mmask8 __M, __m512i __A, __m512i __B)
-{
+static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
+_mm512_maskz_max_epu64(__mmask8 __M, __m512i __A, __m512i __B) {
return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M,
(__v8di)_mm512_max_epu64(__A,
__B),
(__v8di)_mm512_setzero_si512());
@@ -1321,17 +1313,15 @@ static __inline __m512i
return (__m512i)__builtin_elementwise_min((__v16si)__A, (__v16si)__B);
}
-static __inline__ __m512i __DEFAULT_FN_ATTRS512
-_mm512_mask_min_epi32 (__m512i __W, __mmask16 __M, __m512i __A, __m512i __B)
-{
+static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
+_mm512_mask_min_epi32(__m512i __W, __mmask16 __M, __m512i __A, __m512i __B) {
return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M,
(__v16si)_mm512_min_epi32(__A,
__B),
(__v16si)__W);
}
-static __inline__ __m512i __DEFAULT_FN_ATTRS512
-_mm512_maskz_min_epi32 (__mmask16 __M, __m512i __A, __m512i __B)
-{
+static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
+_mm512_maskz_min_epi32(__mmask16 __M, __m512i __A, __m512i __B) {
return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M,
(__v16si)_mm512_min_epi32(__A,
__B),
(__v16si)_mm512_setzero_si512());
@@ -1342,17 +1332,15 @@ _mm512_min_epu32(__m512i __A, __m512i __B) {
return (__m512i)__builtin_elementwise_min((__v16su)__A, (__v16su)__B);
}
-static __inline__ __m512i __DEFAULT_FN_ATTRS512
-_mm512_mask_min_epu32 (__m512i __W, __mmask16 __M, __m512i __A, __m512i __B)
-{
+static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
+_mm512_mask_min_epu32(__m512i __W, __mmask16 __M, __m512i __A, __m512i __B) {
return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M,
(__v16si)_mm512_min_epu32(__A,
__B),
(__v16si)__W);
}
-static __inline__ __m512i __DEFAULT_FN_ATTRS512
-_mm512_maskz_min_epu32 (__mmask16 __M, __m512i __A, __m512i __B)
-{
+static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
+_mm512_maskz_min_epu32(__mmask16 __M, __m512i __A, __m512i __B) {
return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M,
(__v16si)_mm512_min_epu32(__A,
__B),
(__v16si)_mm512_setzero_si512());
@@ -1363,17 +1351,15 @@ _mm512_min_epi64(__m512i __A, __m512i __B) {
return (__m512i)__builtin_elementwise_min((__v8di)__A, (__v8di)__B);
}
-static __inline__ __m512i __DEFAULT_FN_ATTRS512
-_mm512_mask_min_epi64 (__m512i __W, __mmask8 __M, __m512i __A, __m512i __B)
-{
+static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
+_mm512_mask_min_epi64(__m512i __W, __mmask8 __M, __m512i __A, __m512i __B) {
return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M,
(__v8di)_mm512_min_epi64(__A,
__B),
(__v8di)__W);
}
-static __inline__ __m512i __DEFAULT_FN_ATTRS512
-_mm512_maskz_min_epi64 (__mmask8 __M, __m512i __A, __m512i __B)
-{
+static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
+_mm512_maskz_min_epi64(__mmask8 __M, __m512i __A, __m512i __B) {
return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M,
(__v8di)_mm512_min_epi64(__A,
__B),
(__v8di)_mm512_setzero_si512());
@@ -1384,17 +1370,15 @@ _mm512_min_epu64(__m512i __A, __m512i __B) {
return (__m512i)__builtin_elementwise_min((__v8du)__A, (__v8du)__B);
}
-static __inline__ __m512i __DEFAULT_FN_ATTRS512
-_mm512_mask_min_epu64 (__m512i __W, __mmask8 __M, __m512i __A, __m512i __B)
-{
+static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
+_mm512_mask_min_epu64(__m512i __W, __mmask8 __M, __m512i __A, __m512i __B) {
return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M,
(__v8di)_mm512_min_epu64(__A,
__B),
(__v8di)__W);
}
-static __inline__ __m512i __DEFAULT_FN_ATTRS512
-_mm512_maskz_min_epu64 (__mmask8 __M, __m512i __A, __m512i __B)
-{
+static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
+_mm512_maskz_min_epu64(__mmask8 __M, __m512i __A, __m512i __B) {
return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M,
(__v8di)_mm512_min_epu64(__A,
__B),
(__v8di)_mm512_setzero_si512());
diff --git a/clang/test/CodeGen/X86/avx512bw-builtins.c
b/clang/test/CodeGen/X86/avx512bw-builtins.c
index f9330a1d914bc..1f67a9e4d2e53 100644
--- a/clang/test/CodeGen/X86/avx512bw-builtins.c
+++ b/clang/test/CodeGen/X86/avx512bw-builtins.c
@@ -1103,12 +1103,18 @@ __m512i test_mm512_maskz_max_epi8(__mmask64 __M,
__m512i __A, __m512i __B) {
// CHECK: select <64 x i1> {{.*}}, <64 x i8> [[RES]], <64 x i8> {{.*}}
return _mm512_maskz_max_epi8(__M,__A,__B);
}
+
+TEST_CONSTEXPR(match_v64qi(_mm512_maskz_max_epi8(0x00000000FFFFFFFF,
(__m512i)(__v64qs){0, +1, -2, +3, -4, +5, -6, +7, -8, +9, -10, +11, -12, +13,
-14, +15, -16, +17, -18, +19, -20, +21, -22, +23, -24, +25, -26, +27, -28, +29,
-30, +31, -32, +33, -34, +35, -36, +37, -38, +39, -40, +41, -42, +43, -44, +45,
-46, +47, -48, +49, -50, +51, -52, +53, -54, +55, -56, +57, -58, +59, -60, +61,
-62, +63}, (__m512i)(__v64qs){0, -1, +2, -3, +4, -5, +6, -7, +8, -9, +10, -11,
+12, -13, +14, -15, +16, -17, +18, -19, +20, -21, +22, -23, +24, -25, +26, -27,
+28, -29, +30, -31, +32, -33, +34, -35, +36, -37, +38, -39, +40, -41, +42, -43,
+44, -45, +46, -47, +48, -49, +50, -51, +52, -53, +54, -55, +56, -57, +58, -59,
+60, -61, +62, -63}), 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16,
17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0));
+
__m512i test_mm512_mask_max_epi8(__m512i __W, __mmask64 __M, __m512i __A,
__m512i __B) {
// CHECK-LABEL: test_mm512_mask_max_epi8
// CHECK: [[RES:%.*]] = call <64 x i8> @llvm.smax.v64i8(<64 x i8>
%{{.*}}, <64 x i8> %{{.*}})
// CHECK: select <64 x i1> {{.*}}, <64 x i8> [[RES]], <64 x i8> {{.*}}
return _mm512_mask_max_epi8(__W,__M,__A,__B);
}
+
+TEST_CONSTEXPR(match_v64qi(_mm512_mask_max_epi8((__m512i)(__v64qs){-1, +2, -3,
+4, -5, +6, -7, +8, -9, +10, -11, +12, -13, +14, -15, +16, -17, +18, -19, +20,
-21, +22, -23, +24, -25, +26, -27, +28, -29, +30, -31, +32, -33, +34, -35, +36,
-37, +38, -39, +40, -41, +42, -43, +44, -45, +46, -47, +48, -49, +50, -51, +52,
-53, +54, -55, +56, -57, +58, -59, +60, -61, +62, -63, +64},
0x00000000FFFFFFFF, (__m512i)(__v64qs){0, +1, -2, +3, -4, +5, -6, +7, -8, +9,
-10, +11, -12, +13, -14, +15, -16, +17, -18, +19, -20, +21, -22, +23, -24, +25,
-26, +27, -28, +29, -30, +31, -32, +33, -34, +35, -36, +37, -38, +39, -40, +41,
-42, +43, -44, +45, -46, +47, -48, +49, -50, +51, -52, +53, -54, +55, -56, +57,
-58, +59, -60, +61, -62, +63}, (__m512i)(__v64qs){0, -1, +2, -3, +4, -5, +6,
-7, +8, -9, +10, -11, +12, -13, +14, -15, +16, -17, +18, -19, +20, -21, +22,
-23, +24, -25, +26, -27, +28, -29, +30, -31, +32, -33, +34, -35, +36, -37, +38,
-39, +40, -41, +42, -43, +44, -45, +46, -47, +48, -49, +50, -51, +52, -53, +54,
-55, +56, -57, +58, -59, +60, -61, +62, -63}), 0, 1, 2, 3, 4, 5, 6, 7, 8, 9,
10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29,
30, 31, -33, +34, -35, +36, -37, +38, -39, +40, -41, +42, -43, +44, -45, +46,
-47, +48, -49, +50, -51, +52, -53, +54, -55, +56, -57, +58, -59, +60, -61, +62,
-63, +64));
+
__m512i test_mm512_max_epi16(__m512i __A, __m512i __B) {
// CHECK-LABEL: test_mm512_max_epi16
// CHECK: [[RES:%.*]] = call <32 x i16> @llvm.smax.v32i16(<32 x i16>
%{{.*}}, <32 x i16> %{{.*}})
@@ -1123,12 +1129,18 @@ __m512i test_mm512_maskz_max_epi16(__mmask32 __M,
__m512i __A, __m512i __B) {
// CHECK: select <32 x i1> {{.*}}, <32 x i16> [[RES]], <32 x i16>
{{.*}}
return _mm512_maskz_max_epi16(__M,__A,__B);
}
+
+TEST_CONSTEXPR(match_v32hi(_mm512_maskz_max_epi16(0x0000FFFF,
(__m512i)(__v32hi){+1, -2, +3, -4, +5, -6, +7, -8, +9, -10, +11, -12, +13, -14,
+15, -16, +17, -18, +19, -20, +21, -22, +23, -24, +25, -26, +27, -28, +29, -30,
+31, -32}, (__m512i)(__v32hi){-1, +2, -3, +4, -5, +6, -7, +8, -9, +10, -11,
+12, -13, +14, -15, +16, -17, +18, -19, +20, -21, +22, -23, +24, -25, +26, -27,
+28, -29, +30, -31, +32}), +1, +2, +3, +4, +5, +6, +7, +8, +9, +10, +11, +12,
+13, +14, +15, +16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0));
+
__m512i test_mm512_mask_max_epi16(__m512i __W, __mmask32 __M, __m512i __A,
__m512i __B) {
// CHECK-LABEL: test_mm512_mask_max_epi16
// CHECK: [[RES:%.*]] = call <32 x i16> @llvm.smax.v32i16(<32 x i16>
%{{.*}}, <32 x i16> %{{.*}})
// CHECK: select <32 x i1> {{.*}}, <32 x i16> [[RES]], <32 x i16>
{{.*}}
return _mm512_mask_max_epi16(__W,__M,__A,__B);
}
+
+TEST_CONSTEXPR(match_v32hi(_mm512_mask_max_epi16((__m512i)(__v32hi){-1, +2,
-3, +4, -5, +6, -7, +8, -9, +10, -11, +12, -13, +14, -15, +16, -17, +18, -19,
+20, -21, +22, -23, +24, -25, +26, -27, +28, -29, +30, -31, +32}, 0x0000FFFF,
(__m512i)(__v32hi){+1, -2, +3, -4, +5, -6, +7, -8, +9, -10, +11, -12, +13, -14,
+15, -16, +17, -18, +19, -20, +21, -22, +23, -24, +25, -26, +27, -28, +29, -30,
+31, -32}, (__m512i)(__v32hi){-1, +2, -3, +4, -5, +6, -7, +8, -9, +10, -11,
+12, -13, +14, -15, +16, -17, +18, -19, +20, -21, +22, -23, +24, -25, +26, -27,
+28, -29, +30, -31, +32}), +1, +2, +3, +4, +5, +6, +7, +8, +9, +10, +11, +12,
+13, +14, +15, +16, -17, +18, -19, +20, -21, +22, -23, +24, -25, +26, -27, +28,
-29, +30, -31, +32));
+
__m512i test_mm512_max_epu8(__m512i __A, __m512i __B) {
// CHECK-LABEL: test_mm512_max_epu8
// CHECK: [[RES:%.*]] = call <64 x i8> @llvm.umax.v64i8(<64 x i8>
%{{.*}}, <64 x i8> %{{.*}})
@@ -1143,12 +1155,18 @@ __m512i test_mm512_maskz_max_epu8(__mmask64 __M,
__m512i __A, __m512i __B) {
// CHECK: select <64 x i1> {{.*}}, <64 x i8> [[RES]], <64 x i8> {{.*}}
return _mm512_maskz_max_epu8(__M,__A,__B);
}
+
+TEST_CONSTEXPR(match_v64qu(_mm512_maskz_max_epu8(0x00000000FFFFFFFF,
(__m512i)(__v64qu){1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37,
38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57,
58, 59, 60, 61, 62, 63, 64}, (__m512i)(__v64qu){0, 1, 2, 3, 4, 5, 6, 7, 8, 9,
10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29,
30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49,
50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63}), 1, 2, 3, 4, 5, 6, 7,
8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27,
28, 29, 30, 31, 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0));
+
__m512i test_mm512_mask_max_epu8(__m512i __W, __mmask64 __M, __m512i __A,
__m512i __B) {
// CHECK-LABEL: test_mm512_mask_max_epu8
// CHECK: [[RES:%.*]] = call <64 x i8> @llvm.umax.v64i8(<64 x i8>
%{{.*}}, <64 x i8> %{{.*}})
// CHECK: select <64 x i1> {{.*}}, <64 x i8> [[RES]], <64 x i8> {{.*}}
return _mm512_mask_max_epu8(__W,__M,__A,__B);
}
+
+TEST_CONSTEXPR(match_v64qu(_mm512_mask_max_epu8((__m512i)(__v64qu){1, 2, 3, 4,
5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25,
26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45,
46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64},
0x00000000FFFFFFFF, (__m512i)(__v64qu){1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12,
13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32,
33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52,
53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64}, (__m512i)(__v64qu){0, 1, 2, 3,
4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24,
25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44,
45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63}),
1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22,
23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42,
43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62,
63, 64));
+
__m512i test_mm512_max_epu16(__m512i __A, __m512i __B) {
// CHECK-LABEL: test_mm512_max_epu16
// CHECK: [[RES:%.*]] = call <32 x i16> @llvm.umax.v32i16(<32 x i16>
%{{.*}}, <32 x i16> %{{.*}})
@@ -1163,12 +1181,18 @@ __m512i test_mm512_maskz_max_epu16(__mmask32 __M,
__m512i __A, __m512i __B) {
// CHECK: select <32 x i1> {{.*}}, <32 x i16> [[RES]], <32 x i16>
{{.*}}
return _mm512_maskz_max_epu16(__M,__A,__B);
}
+
+TEST_CONSTEXPR(match_v32hu(_mm512_maskz_max_epu16(0x0000FFFF,
(__m512i)(__v32hu){1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32},
(__m512i)(__v32hu){0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16,
17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31}), 1, 2, 3, 4, 5, 6,
7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0));
+
__m512i test_mm512_mask_max_epu16(__m512i __W, __mmask32 __M, __m512i __A,
__m512i __B) {
// CHECK-LABEL: test_mm512_mask_max_epu16
// CHECK: [[RES:%.*]] = call <32 x i16> @llvm.umax.v32i16(<32 x i16>
%{{.*}}, <32 x i16> %{{.*}})
// CHECK: select <32 x i1> {{.*}}, <32 x i16> [[RES]], <32 x i16>
{{.*}}
return _mm512_mask_max_epu16(__W,__M,__A,__B);
}
+
+TEST_CONSTEXPR(match_v32hu(_mm512_mask_max_epu16((__m512i)(__v32hu){1, 2, 3,
4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24,
25, 26, 27, 28, 29, 30, 31, 32}, 0x0000FFFF, (__m512i)(__v32hu){1, 2, 3, 4, 5,
6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26,
27, 28, 29, 30, 31, 32}, (__m512i)(__v32hu){0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10,
11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30,
31}), 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20,
21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32));
+
__m512i test_mm512_min_epi8(__m512i __A, __m512i __B) {
// CHECK-LABEL: test_mm512_min_epi8
// CHECK: [[RES:%.*]] = call <64 x i8> @llvm.smin.v64i8(<64 x i8>
%{{.*}}, <64 x i8> %{{.*}})
@@ -1183,12 +1207,18 @@ __m512i test_mm512_maskz_min_epi8(__mmask64 __M,
__m512i __A, __m512i __B) {
// CHECK: select <64 x i1> {{.*}}, <64 x i8> [[RES]], <64 x i8> {{.*}}
return _mm512_maskz_min_epi8(__M,__A,__B);
}
+
+TEST_CONSTEXPR(match_v64qi(_mm512_maskz_min_epi8(0x00000000FFFFFFFF,
(__m512i)(__v64qs){0, +1, -2, +3, -4, +5, -6, +7, -8, +9, -10, +11, -12, +13,
-14, +15, -16, +17, -18, +19, -20, +21, -22, +23, -24, +25, -26, +27, -28, +29,
-30, +31, -32, +33, -34, +35, -36, +37, -38, +39, -40, +41, -42, +43, -44, +45,
-46, +47, -48, +49, -50, +51, -52, +53, -54, +55, -56, +57, -58, +59, -60, +61,
-62, +63}, (__m512i)(__v64qs){0, -1, +2, -3, +4, -5, +6, -7, +8, -9, +10, -11,
+12, -13, +14, -15, +16, -17, +18, -19, +20, -21, +22, -23, +24, -25, +26, -27,
+28, -29, +30, -31, +32, -33, +34, -35, +36, -37, +38, -39, +40, -41, +42, -43,
+44, -45, +46, -47, +48, -49, +50, -51, +52, -53, +54, -55, +56, -57, +58, -59,
+60, -61, +62, -63}), 0, -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12,
-13, -14, -15, -16, -17, -18, -19, -20, -21, -22, -23, -24, -25, -26, -27, -28,
-29, -30, -31, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0));
+
__m512i test_mm512_mask_min_epi8(__m512i __W, __mmask64 __M, __m512i __A,
__m512i __B) {
// CHECK-LABEL: test_mm512_mask_min_epi8
// CHECK: [[RES:%.*]] = call <64 x i8> @llvm.smin.v64i8(<64 x i8>
%{{.*}}, <64 x i8> %{{.*}})
// CHECK: select <64 x i1> {{.*}}, <64 x i8> [[RES]], <64 x i8> {{.*}}
return _mm512_mask_min_epi8(__W,__M,__A,__B);
}
+
+TEST_CONSTEXPR(match_v64qi(_mm512_mask_min_epi8((__m512i)(__v64qs){-1, +2, -3,
+4, -5, +6, -7, +8, -9, +10, -11, +12, -13, +14, -15, +16, -17, +18, -19, +20,
-21, +22, -23, +24, -25, +26, -27, +28, -29, +30, -31, +32, -33, +34, -35, +36,
-37, +38, -39, +40, -41, +42, -43, +44, -45, +46, -47, +48, -49, +50, -51, +52,
-53, +54, -55, +56, -57, +58, -59, +60, -61, +62, -63, +64},
0x00000000FFFFFFFF, (__m512i)(__v64qs){0, +1, -2, +3, -4, +5, -6, +7, -8, +9,
-10, +11, -12, +13, -14, +15, -16, +17, -18, +19, -20, +21, -22, +23, -24, +25,
-26, +27, -28, +29, -30, +31, -32, +33, -34, +35, -36, +37, -38, +39, -40, +41,
-42, +43, -44, +45, -46, +47, -48, +49, -50, +51, -52, +53, -54, +55, -56, +57,
-58, +59, -60, +61, -62, +63}, (__m512i)(__v64qs){0, -1, +2, -3, +4, -5, +6,
-7, +8, -9, +10, -11, +12, -13, +14, -15, +16, -17, +18, -19, +20, -21, +22,
-23, +24, -25, +26, -27, +28, -29, +30, -31, +32, -33, +34, -35, +36, -37, +38,
-39, +40, -41, +42, -43, +44, -45, +46, -47, +48, -49, +50, -51, +52, -53, +54,
-55, +56, -57, +58, -59, +60, -61, +62, -63}), 0, -1, -2, -3, -4, -5, -6, -7,
-8, -9, -10, -11, -12, -13, -14, -15, -16, -17, -18, -19, -20, -21, -22, -23,
-24, -25, -26, -27, -28, -29, -30, -31, -33, +34, -35, +36, -37, +38, -39, +40,
-41, +42, -43, +44, -45, +46, -47, +48, -49, +50, -51, +52, -53, +54, -55, +56,
-57, +58, -59, +60, -61, +62, -63, +64));
+
__m512i test_mm512_min_epi16(__m512i __A, __m512i __B) {
// CHECK-LABEL: test_mm512_min_epi16
// CHECK: [[RES:%.*]] = call <32 x i16> @llvm.smin.v32i16(<32 x i16>
%{{.*}}, <32 x i16> %{{.*}})
@@ -1203,12 +1233,18 @@ __m512i test_mm512_maskz_min_epi16(__mmask32 __M,
__m512i __A, __m512i __B) {
// CHECK: select <32 x i1> {{.*}}, <32 x i16> [[RES]], <32 x i16>
{{.*}}
return _mm512_maskz_min_epi16(__M,__A,__B);
}
+
+TEST_CONSTEXPR(match_v32hi(_mm512_maskz_min_epi16(0x0000FFFF,
(__m512i)(__v32hi){+1, -2, +3, -4, +5, -6, +7, -8, +9, -10, +11, -12, +13, -14,
+15, -16, +17, -18, +19, -20, +21, -22, +23, -24, +25, -26, +27, -28, +29, -30,
+31, -32}, (__m512i)(__v32hi){-1, +2, -3, +4, -5, +6, -7, +8, -9, +10, -11,
+12, -13, +14, -15, +16, -17, +18, -19, +20, -21, +22, -23, +24, -25, +26, -27,
+28, -29, +30, -31, +32}), -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12,
-13, -14, -15, -16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0));
+
__m512i test_mm512_mask_min_epi16(__m512i __W, __mmask32 __M, __m512i __A,
__m512i __B) {
// CHECK-LABEL: test_mm512_mask_min_epi16
// CHECK: [[RES:%.*]] = call <32 x i16> @llvm.smin.v32i16(<32 x i16>
%{{.*}}, <32 x i16> %{{.*}})
// CHECK: select <32 x i1> {{.*}}, <32 x i16> [[RES]], <32 x i16>
{{.*}}
return _mm512_mask_min_epi16(__W,__M,__A,__B);
}
+
+TEST_CONSTEXPR(match_v32hi(_mm512_mask_min_epi16((__m512i)(__v32hi){-1, +2,
-3, +4, -5, +6, -7, +8, -9, +10, -11, +12, -13, +14, -15, +16, -17, +18, -19,
+20, -21, +22, -23, +24, -25, +26, -27, +28, -29, +30, -31, +32}, 0x0000FFFF,
(__m512i)(__v32hi){+1, -2, +3, -4, +5, -6, +7, -8, +9, -10, +11, -12, +13, -14,
+15, -16, +17, -18, +19, -20, +21, -22, +23, -24, +25, -26, +27, -28, +29, -30,
+31, -32}, (__m512i)(__v32hi){-1, +2, -3, +4, -5, +6, -7, +8, -9, +10, -11,
+12, -13, +14, -15, +16, -17, +18, -19, +20, -21, +22, -23, +24, -25, +26, -27,
+28, -29, +30, -31, +32}), -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12,
-13, -14, -15, -16, -17, +18, -19, +20, -21, +22, -23, +24, -25, +26, -27, +28,
-29, +30, -31, +32));
+
__m512i test_mm512_min_epu8(__m512i __A, __m512i __B) {
// CHECK-LABEL: test_mm512_min_epu8
// CHECK: [[RES:%.*]] = call <64 x i8> @llvm.umin.v64i8(<64 x i8>
%{{.*}}, <64 x i8> %{{.*}})
@@ -1223,12 +1259,18 @@ __m512i test_mm512_maskz_min_epu8(__mmask64 __M,
__m512i __A, __m512i __B) {
// CHECK: select <64 x i1> {{.*}}, <64 x i8> [[RES]], <64 x i8> {{.*}}
return _mm512_maskz_min_epu8(__M,__A,__B);
}
+
+TEST_CONSTEXPR(match_v64qu(_mm512_maskz_min_epu8(0x00000000FFFFFFFF,
(__m512i)(__v64qu){1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37,
38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57,
58, 59, 60, 61, 62, 63, 64}, (__m512i)(__v64qu){0, 1, 2, 3, 4, 5, 6, 7, 8, 9,
10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29,
30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49,
50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63}), 0, 1, 2, 3, 4, 5, 6,
7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26,
27, 28, 29, 30, 31, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0));
+
__m512i test_mm512_mask_min_epu8(__m512i __W, __mmask64 __M, __m512i __A,
__m512i __B) {
// CHECK-LABEL: test_mm512_mask_min_epu8
// CHECK: [[RES:%.*]] = call <64 x i8> @llvm.umin.v64i8(<64 x i8>
%{{.*}}, <64 x i8> %{{.*}})
// CHECK: select <64 x i1> {{.*}}, <64 x i8> [[RES]], <64 x i8> {{.*}}
return _mm512_mask_min_epu8(__W,__M,__A,__B);
}
+
+TEST_CONSTEXPR(match_v64qu(_mm512_mask_min_epu8((__m512i)(__v64qu){1, 2, 3, 4,
5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25,
26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45,
46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64},
0x00000000FFFFFFFF, (__m512i)(__v64qu){1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12,
13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32,
33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52,
53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64}, (__m512i)(__v64qu){0, 1, 2, 3,
4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24,
25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44,
45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63}),
0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21,
22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42,
43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62,
63, 64));
+
__m512i test_mm512_min_epu16(__m512i __A, __m512i __B) {
// CHECK-LABEL: test_mm512_min_epu16
// CHECK: [[RES:%.*]] = call <32 x i16> @llvm.umin.v32i16(<32 x i16>
%{{.*}}, <32 x i16> %{{.*}})
@@ -1243,12 +1285,18 @@ __m512i test_mm512_maskz_min_epu16(__mmask32 __M,
__m512i __A, __m512i __B) {
// CHECK: select <32 x i1> {{.*}}, <32 x i16> [[RES]], <32 x i16>
{{.*}}
return _mm512_maskz_min_epu16(__M,__A,__B);
}
+
+TEST_CONSTEXPR(match_v32hu(_mm512_maskz_min_epu16(0x0000FFFF,
(__m512i)(__v32hu){1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32},
(__m512i)(__v32hu){0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16,
17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31}), 0, 1, 2, 3, 4, 5,
6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0));
+
__m512i test_mm512_mask_min_epu16(__m512i __W, __mmask32 __M, __m512i __A,
__m512i __B) {
// CHECK-LABEL: test_mm512_mask_min_epu16
// CHECK: [[RES:%.*]] = call <32 x i16> @llvm.umin.v32i16(<32 x i16>
%{{.*}}, <32 x i16> %{{.*}})
// CHECK: select <32 x i1> {{.*}}, <32 x i16> [[RES]], <32 x i16>
{{.*}}
return _mm512_mask_min_epu16(__W,__M,__A,__B);
}
+
+TEST_CONSTEXPR(match_v32hu(_mm512_mask_min_epu16((__m512i)(__v32hu){1, 2, 3,
4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24,
25, 26, 27, 28, 29, 30, 31, 32}, 0x0000FFFF, (__m512i)(__v32hu){1, 2, 3, 4, 5,
6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26,
27, 28, 29, 30, 31, 32}, (__m512i)(__v32hu){0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10,
11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30,
31}), 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 17, 18, 19, 20, 21,
22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32));
+
__m512i test_mm512_shuffle_epi8(__m512i __A, __m512i __B) {
// CHECK-LABEL: test_mm512_shuffle_epi8
// CHECK: @llvm.x86.avx512.pshuf.b.512
diff --git a/clang/test/CodeGen/X86/avx512f-builtins.c
b/clang/test/CodeGen/X86/avx512f-builtins.c
index 3c93d729f8a03..10d464c429a43 100644
--- a/clang/test/CodeGen/X86/avx512f-builtins.c
+++ b/clang/test/CodeGen/X86/avx512f-builtins.c
@@ -10187,6 +10187,8 @@ __m512i test_mm512_mask_max_epi32 (__m512i __W,
__mmask16 __M, __m512i __A, __m5
return _mm512_mask_max_epi32 (__W,__M,__A,__B);
}
+TEST_CONSTEXPR(match_v16si(_mm512_mask_max_epi32((__m512i)(__v16si){-100,
+200, -300, +400, -500, +600, -700, +800, -900, +1000, -1100, +1200, -1300,
+1400, -1500, +1600}, 0x00FF, (__m512i)(__v16si){+1, -2, +3, -4, +5, -6, +7,
-8, +9, -10, +11, -12, +13, -14, +15, -16}, (__m512i)(__v16si){-1, +2, -3, +4,
-5, +6, -7, +8, -9, +10, -11, +12, -13, +14, -15, +16}), +1, +2, +3, +4, +5,
+6, +7, +8, -900, +1000, -1100, +1200, -1300, +1400, -1500, +1600));
+
__m512i test_mm512_maskz_max_epi32 (__mmask16 __M, __m512i __A, __m512i __B)
{
// CHECK-LABEL: test_mm512_maskz_max_epi32
@@ -10195,6 +10197,8 @@ __m512i test_mm512_maskz_max_epi32 (__mmask16 __M,
__m512i __A, __m512i __B)
return _mm512_maskz_max_epi32 (__M,__A,__B);
}
+TEST_CONSTEXPR(match_v16si(_mm512_maskz_max_epi32(0x00FF,
(__m512i)(__v16si){+1, -2, +3, -4, +5, -6, +7, -8, +9, -10, +11, -12, +13, -14,
+15, -16}, (__m512i)(__v16si){-1, +2, -3, +4, -5, +6, -7, +8, -9, +10, -11,
+12, -13, +14, -15, +16}), +1, +2, +3, +4, +5, +6, +7, +8, 0, 0, 0, 0, 0, 0, 0,
0));
+
__m512i test_mm512_max_epi64 (__m512i __A, __m512i __B)
{
// CHECK-LABEL: test_mm512_max_epi64
@@ -10212,6 +10216,8 @@ __m512i test_mm512_mask_max_epi64 (__m512i __W,
__mmask8 __M, __m512i __A, __m51
return _mm512_mask_max_epi64 (__W,__M,__A,__B);
}
+TEST_CONSTEXPR(match_v8di(_mm512_mask_max_epi64((__m512i)(__v8di){-100, +200,
-300, +400, -500, +600, -700, +800}, 0x0F, (__m512i)(__v8di){+1, -2, +3, -4,
+5, -6, +7, -8}, (__m512i)(__v8di){-1, +2, -3, +4, -5, +6, -7, +8}), +1, +2,
+3, +4, -500, +600, -700, +800));
+
__m512i test_mm512_maskz_max_epi64 (__mmask8 __M, __m512i __A, __m512i __B)
{
// CHECK-LABEL: test_mm512_maskz_max_epi64
@@ -10220,6 +10226,8 @@ __m512i test_mm512_maskz_max_epi64 (__mmask8 __M,
__m512i __A, __m512i __B)
return _mm512_maskz_max_epi64 (__M,__A,__B);
}
+TEST_CONSTEXPR(match_v8di(_mm512_maskz_max_epi64(0x0F, (__m512i)(__v8di){+1,
-2, +3, -4, +5, -6, +7, -8}, (__m512i)(__v8di){-1, +2, -3, +4, -5, +6, -7,
+8}), +1, +2, +3, +4, 0, 0, 0, 0));
+
__m512i test_mm512_max_epu64 (__m512i __A, __m512i __B)
{
// CHECK-LABEL: test_mm512_max_epu64
@@ -10227,7 +10235,7 @@ __m512i test_mm512_max_epu64 (__m512i __A, __m512i __B)
return _mm512_max_epu64 (__A,__B);
}
-TEST_CONSTEXPR(match_m512i(_mm512_max_epu64((__m512i)(__v8du){1, 2, 3, 4, 8,
7, 6, 5}, (__m512i)(__v8du){4, 3, 2, 1, 5, 6, 7, 8}), 4, 3, 3, 4, 8, 7, 7, 8 ));
+TEST_CONSTEXPR(match_m512i(_mm512_max_epu64((__m512i)(__v8du){1, 2, 3, 4, 8,
7, 6, 5}, (__m512i)(__v8du){4, 3, 2, 1, 5, 6, 7, 8}), 4, 3, 3, 4, 8, 7, 7, 8));
__m512i test_mm512_mask_max_epu64 (__m512i __W, __mmask8 __M, __m512i __A,
__m512i __B)
{
@@ -10237,6 +10245,8 @@ __m512i test_mm512_mask_max_epu64 (__m512i __W,
__mmask8 __M, __m512i __A, __m51
return _mm512_mask_max_epu64 (__W,__M,__A,__B);
}
+TEST_CONSTEXPR(match_m512i(_mm512_mask_max_epu64((__m512i)(__v8du){100, 200,
300, 400, 500, 600, 700, 800}, 0x0F, (__m512i)(__v8du){1, 2, 3, 4, 8, 7, 6, 5},
(__m512i)(__v8du){4, 3, 2, 1, 5, 6, 7, 8}), 4, 3, 3, 4, 500, 600, 700, 800));
+
__m512i test_mm512_maskz_max_epu64 (__mmask8 __M, __m512i __A, __m512i __B)
{
// CHECK-LABEL: test_mm512_maskz_max_epu64
@@ -10245,6 +10255,8 @@ __m512i test_mm512_maskz_max_epu64 (__mmask8 __M,
__m512i __A, __m512i __B)
return _mm512_maskz_max_epu64 (__M,__A,__B);
}
+TEST_CONSTEXPR(match_m512i(_mm512_maskz_max_epu64(0x0F, (__m512i)(__v8du){1,
2, 3, 4, 8, 7, 6, 5}, (__m512i)(__v8du){4, 3, 2, 1, 5, 6, 7, 8}), 4, 3, 3, 4,
0, 0, 0, 0));
+
__m512i test_mm512_max_epu32 (__m512i __A, __m512i __B)
{
// CHECK-LABEL: test_mm512_max_epu32
@@ -10262,6 +10274,8 @@ __m512i test_mm512_mask_max_epu32 (__m512i __W,
__mmask16 __M, __m512i __A, __m5
return _mm512_mask_max_epu32 (__W,__M,__A,__B);
}
+TEST_CONSTEXPR(match_v16su(_mm512_mask_max_epu32((__m512i)(__v16su){100, 200,
300, 400, 500, 600, 700, 800, 900, 1000, 1100, 1200, 1300, 1400, 1500, 1600},
0x00FF, (__m512i)(__v16su){1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
16}, (__m512i)(__v16su){0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}),
1, 2, 3, 4, 5, 6, 7, 8, 900, 1000, 1100, 1200, 1300, 1400, 1500, 1600));
+
__m512i test_mm512_maskz_max_epu32 (__mmask16 __M, __m512i __A, __m512i __B)
{
// CHECK-LABEL: test_mm512_maskz_max_epu32
@@ -10270,6 +10284,8 @@ __m512i test_mm512_maskz_max_epu32 (__mmask16 __M,
__m512i __A, __m512i __B)
return _mm512_maskz_max_epu32 (__M,__A,__B);
}
+TEST_CONSTEXPR(match_v16su(_mm512_maskz_max_epu32(0x00FF,
(__m512i)(__v16su){1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16},
(__m512i)(__v16su){0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}), 1,
2, 3, 4, 5, 6, 7, 8, 0, 0, 0, 0, 0, 0, 0, 0));
+
__m512i test_mm512_min_epi32 (__m512i __A, __m512i __B)
{
// CHECK-LABEL: test_mm512_min_epi32
@@ -10287,6 +10303,8 @@ __m512i test_mm512_mask_min_epi32 (__m512i __W,
__mmask16 __M, __m512i __A, __m5
return _mm512_mask_min_epi32 (__W,__M,__A,__B);
}
+TEST_CONSTEXPR(match_v16si(_mm512_mask_min_epi32((__m512i)(__v16si){-100,
+200, -300, +400, -500, +600, -700, +800, -900, +1000, -1100, +1200, -1300,
+1400, -1500, +1600}, 0x00FF, (__m512i)(__v16si){+1, -2, +3, -4, +5, -6, +7,
-8, +9, -10, +11, -12, +13, -14, +15, -16}, (__m512i)(__v16si){-1, +2, -3, +4,
-5, +6, -7, +8, -9, +10, -11, +12, -13, +14, -15, +16}), -1, -2, -3, -4, -5,
-6, -7, -8, -900, +1000, -1100, +1200, -1300, +1400, -1500, +1600));
+
__m512i test_mm512_maskz_min_epi32 (__mmask16 __M, __m512i __A, __m512i __B)
{
// CHECK-LABEL: test_mm512_maskz_min_epi32
@@ -10295,6 +10313,8 @@ __m512i test_mm512_maskz_min_epi32 (__mmask16 __M,
__m512i __A, __m512i __B)
return _mm512_maskz_min_epi32 (__M,__A,__B);
}
+TEST_CONSTEXPR(match_v16si(_mm512_maskz_min_epi32(0x00FF,
(__m512i)(__v16si){+1, -2, +3, -4, +5, -6, +7, -8, +9, -10, +11, -12, +13, -14,
+15, -16}, (__m512i)(__v16si){-1, +2, -3, +4, -5, +6, -7, +8, -9, +10, -11,
+12, -13, +14, -15, +16}), -1, -2, -3, -4, -5, -6, -7, -8, 0, 0, 0, 0, 0, 0, 0,
0));
+
__m512i test_mm512_min_epu32 (__m512i __A, __m512i __B)
{
// CHECK-LABEL: test_mm512_min_epu32
@@ -10312,6 +10332,8 @@ __m512i test_mm512_mask_min_epu32 (__m512i __W,
__mmask16 __M, __m512i __A, __m5
return _mm512_mask_min_epu32 (__W,__M,__A,__B);
}
+TEST_CONSTEXPR(match_v16su(_mm512_mask_min_epu32((__m512i)(__v16su){100, 200,
300, 400, 500, 600, 700, 800, 900, 1000, 1100, 1200, 1300, 1400, 1500, 1600},
0x00FF, (__m512i)(__v16su){1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
16}, (__m512i)(__v16su){0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}),
0, 1, 2, 3, 4, 5, 6, 7, 900, 1000, 1100, 1200, 1300, 1400, 1500, 1600));
+
__m512i test_mm512_maskz_min_epu32 (__mmask16 __M, __m512i __A, __m512i __B)
{
// CHECK-LABEL: test_mm512_maskz_min_epu32
@@ -10320,6 +10342,8 @@ __m512i test_mm512_maskz_min_epu32 (__mmask16 __M,
__m512i __A, __m512i __B)
return _mm512_maskz_min_epu32 (__M,__A,__B);
}
+TEST_CONSTEXPR(match_v16su(_mm512_maskz_min_epu32(0x00FF,
(__m512i)(__v16su){1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16},
(__m512i)(__v16su){0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}), 0,
1, 2, 3, 4, 5, 6, 7, 0, 0, 0, 0, 0, 0, 0, 0));
+
__m512i test_mm512_min_epi64 (__m512i __A, __m512i __B)
{
// CHECK-LABEL: test_mm512_min_epi64
@@ -10337,6 +10361,8 @@ __m512i test_mm512_mask_min_epi64 (__m512i __W,
__mmask8 __M, __m512i __A, __m51
return _mm512_mask_min_epi64 (__W,__M,__A,__B);
}
+TEST_CONSTEXPR(match_v8di(_mm512_mask_min_epi64((__m512i)(__v8di){-100, +200,
-300, +400, -500, +600, -700, +800}, 0x0F, (__m512i)(__v8di){+1, -2, +3, -4,
+5, -6, +7, -8}, (__m512i)(__v8di){-1, +2, -3, +4, -5, +6, -7, +8}), -1, -2,
-3, -4, -500, +600, -700, +800));
+
__m512i test_mm512_maskz_min_epi64 (__mmask8 __M, __m512i __A, __m512i __B)
{
// CHECK-LABEL: test_mm512_maskz_min_epi64
@@ -10345,6 +10371,8 @@ __m512i test_mm512_maskz_min_epi64 (__mmask8 __M,
__m512i __A, __m512i __B)
return _mm512_maskz_min_epi64 (__M,__A,__B);
}
+TEST_CONSTEXPR(match_v8di(_mm512_maskz_min_epi64(0x0F, (__m512i)(__v8di){+1,
-2, +3, -4, +5, -6, +7, -8}, (__m512i)(__v8di){-1, +2, -3, +4, -5, +6, -7,
+8}), -1, -2, -3, -4, 0, 0, 0, 0));
+
__m512i test_mm512_min_epu64 (__m512i __A, __m512i __B)
{
// CHECK-LABEL: test_mm512_min_epu64
@@ -10362,6 +10390,8 @@ __m512i test_mm512_mask_min_epu64 (__m512i __W,
__mmask8 __M, __m512i __A, __m51
return _mm512_mask_min_epu64 (__W,__M,__A,__B);
}
+TEST_CONSTEXPR(match_m512i(_mm512_mask_min_epu64((__m512i)(__v8du){100, 200,
300, 400, 500, 600, 700, 800}, 0x0F, (__m512i)(__v8du){1, 2, 3, 4, 8, 7, 6, 5},
(__m512i)(__v8du){4, 3, 2, 1, 5, 6, 7, 8}), 1, 2, 2, 1, 500, 600, 700, 800));
+
__m512i test_mm512_maskz_min_epu64 (__mmask8 __M, __m512i __A, __m512i __B)
{
// CHECK-LABEL: test_mm512_maskz_min_epu64
@@ -10370,6 +10400,8 @@ __m512i test_mm512_maskz_min_epu64 (__mmask8 __M,
__m512i __A, __m512i __B)
return _mm512_maskz_min_epu64 (__M,__A,__B);
}
+TEST_CONSTEXPR(match_m512i(_mm512_maskz_min_epu64(0x0F, (__m512i)(__v8du){1,
2, 3, 4, 8, 7, 6, 5}, (__m512i)(__v8du){4, 3, 2, 1, 5, 6, 7, 8}), 1, 2, 2, 1,
0, 0, 0, 0));
+
__m512i test_mm512_mask_set1_epi32 (__m512i __O, __mmask16 __M, int __A)
{
// CHECK-LABEL: test_mm512_mask_set1_epi32
>From b78e75c09fd62d5b641e30f829954c0f6ba5de14 Mon Sep 17 00:00:00 2001
From: Bhasawut Singhaphan <bhasa...@gmail.com>
Date: Sat, 6 Sep 2025 01:48:00 +0700
Subject: [PATCH 2/2] Update mask/maskz variants in avx512vlintrin.h
---
clang/lib/Headers/avx512vlintrin.h | 96 +++++++++++-----------
clang/test/CodeGen/X86/avx512vl-builtins.c | 96 ++++++++++++++++++++++
2 files changed, 144 insertions(+), 48 deletions(-)
diff --git a/clang/lib/Headers/avx512vlintrin.h
b/clang/lib/Headers/avx512vlintrin.h
index e7e02624f56c0..33657b1e19b6d 100644
--- a/clang/lib/Headers/avx512vlintrin.h
+++ b/clang/lib/Headers/avx512vlintrin.h
@@ -2857,28 +2857,28 @@ _mm256_maskz_abs_epi64(__mmask8 __U, __m256i __A) {
(__v4di)_mm256_setzero_si256());
}
-static __inline__ __m128i __DEFAULT_FN_ATTRS128
+static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
_mm_maskz_max_epi32(__mmask8 __M, __m128i __A, __m128i __B) {
return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M,
(__v4si)_mm_max_epi32(__A, __B),
(__v4si)_mm_setzero_si128());
}
-static __inline__ __m128i __DEFAULT_FN_ATTRS128
+static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
_mm_mask_max_epi32(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) {
return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M,
(__v4si)_mm_max_epi32(__A, __B),
(__v4si)__W);
}
-static __inline__ __m256i __DEFAULT_FN_ATTRS256
+static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
_mm256_maskz_max_epi32(__mmask8 __M, __m256i __A, __m256i __B) {
return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M,
(__v8si)_mm256_max_epi32(__A,
__B),
(__v8si)_mm256_setzero_si256());
}
-static __inline__ __m256i __DEFAULT_FN_ATTRS256
+static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
_mm256_mask_max_epi32(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) {
return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M,
(__v8si)_mm256_max_epi32(__A,
__B),
@@ -2890,15 +2890,15 @@ _mm_max_epi64(__m128i __A, __m128i __B) {
return (__m128i)__builtin_elementwise_max((__v2di)__A, (__v2di)__B);
}
-static __inline__ __m128i __DEFAULT_FN_ATTRS128
-_mm_maskz_max_epi64 (__mmask8 __M, __m128i __A, __m128i __B) {
+static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
+_mm_maskz_max_epi64(__mmask8 __M, __m128i __A, __m128i __B) {
return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M,
(__v2di)_mm_max_epi64(__A, __B),
(__v2di)_mm_setzero_si128());
}
-static __inline__ __m128i __DEFAULT_FN_ATTRS128
-_mm_mask_max_epi64 (__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) {
+static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
+_mm_mask_max_epi64(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) {
return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M,
(__v2di)_mm_max_epi64(__A, __B),
(__v2di)__W);
@@ -2909,42 +2909,42 @@ _mm256_max_epi64(__m256i __A, __m256i __B) {
return (__m256i)__builtin_elementwise_max((__v4di)__A, (__v4di)__B);
}
-static __inline__ __m256i __DEFAULT_FN_ATTRS256
-_mm256_maskz_max_epi64 (__mmask8 __M, __m256i __A, __m256i __B) {
+static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
+_mm256_maskz_max_epi64(__mmask8 __M, __m256i __A, __m256i __B) {
return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M,
(__v4di)_mm256_max_epi64(__A,
__B),
(__v4di)_mm256_setzero_si256());
}
-static __inline__ __m256i __DEFAULT_FN_ATTRS256
-_mm256_mask_max_epi64 (__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) {
+static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
+_mm256_mask_max_epi64(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) {
return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M,
(__v4di)_mm256_max_epi64(__A,
__B),
(__v4di)__W);
}
-static __inline__ __m128i __DEFAULT_FN_ATTRS128
+static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
_mm_maskz_max_epu32(__mmask8 __M, __m128i __A, __m128i __B) {
return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M,
(__v4si)_mm_max_epu32(__A, __B),
(__v4si)_mm_setzero_si128());
}
-static __inline__ __m128i __DEFAULT_FN_ATTRS128
+static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
_mm_mask_max_epu32(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) {
return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M,
(__v4si)_mm_max_epu32(__A, __B),
(__v4si)__W);
}
-static __inline__ __m256i __DEFAULT_FN_ATTRS256
+static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
_mm256_maskz_max_epu32(__mmask8 __M, __m256i __A, __m256i __B) {
return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M,
(__v8si)_mm256_max_epu32(__A,
__B),
(__v8si)_mm256_setzero_si256());
}
-static __inline__ __m256i __DEFAULT_FN_ATTRS256
+static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
_mm256_mask_max_epu32(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) {
return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M,
(__v8si)_mm256_max_epu32(__A,
__B),
@@ -2956,15 +2956,15 @@ _mm_max_epu64(__m128i __A, __m128i __B) {
return (__m128i)__builtin_elementwise_max((__v2du)__A, (__v2du)__B);
}
-static __inline__ __m128i __DEFAULT_FN_ATTRS128
-_mm_maskz_max_epu64 (__mmask8 __M, __m128i __A, __m128i __B) {
+static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
+_mm_maskz_max_epu64(__mmask8 __M, __m128i __A, __m128i __B) {
return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M,
(__v2di)_mm_max_epu64(__A, __B),
(__v2di)_mm_setzero_si128());
}
-static __inline__ __m128i __DEFAULT_FN_ATTRS128
-_mm_mask_max_epu64 (__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) {
+static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
+_mm_mask_max_epu64(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) {
return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M,
(__v2di)_mm_max_epu64(__A, __B),
(__v2di)__W);
@@ -2975,42 +2975,42 @@ _mm256_max_epu64(__m256i __A, __m256i __B) {
return (__m256i)__builtin_elementwise_max((__v4du)__A, (__v4du)__B);
}
-static __inline__ __m256i __DEFAULT_FN_ATTRS256
-_mm256_maskz_max_epu64 (__mmask8 __M, __m256i __A, __m256i __B) {
+static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
+_mm256_maskz_max_epu64(__mmask8 __M, __m256i __A, __m256i __B) {
return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M,
(__v4di)_mm256_max_epu64(__A,
__B),
(__v4di)_mm256_setzero_si256());
}
-static __inline__ __m256i __DEFAULT_FN_ATTRS256
-_mm256_mask_max_epu64 (__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) {
+static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
+_mm256_mask_max_epu64(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) {
return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M,
(__v4di)_mm256_max_epu64(__A,
__B),
(__v4di)__W);
}
-static __inline__ __m128i __DEFAULT_FN_ATTRS128
+static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
_mm_maskz_min_epi32(__mmask8 __M, __m128i __A, __m128i __B) {
return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M,
(__v4si)_mm_min_epi32(__A, __B),
(__v4si)_mm_setzero_si128());
}
-static __inline__ __m128i __DEFAULT_FN_ATTRS128
+static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
_mm_mask_min_epi32(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) {
return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M,
(__v4si)_mm_min_epi32(__A, __B),
(__v4si)__W);
}
-static __inline__ __m256i __DEFAULT_FN_ATTRS256
+static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
_mm256_maskz_min_epi32(__mmask8 __M, __m256i __A, __m256i __B) {
return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M,
(__v8si)_mm256_min_epi32(__A,
__B),
(__v8si)_mm256_setzero_si256());
}
-static __inline__ __m256i __DEFAULT_FN_ATTRS256
+static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
_mm256_mask_min_epi32(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) {
return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M,
(__v8si)_mm256_min_epi32(__A,
__B),
@@ -3022,15 +3022,15 @@ _mm_min_epi64(__m128i __A, __m128i __B) {
return (__m128i)__builtin_elementwise_min((__v2di)__A, (__v2di)__B);
}
-static __inline__ __m128i __DEFAULT_FN_ATTRS128
-_mm_mask_min_epi64 (__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) {
+static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
+_mm_mask_min_epi64(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) {
return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M,
(__v2di)_mm_min_epi64(__A, __B),
(__v2di)__W);
}
-static __inline__ __m128i __DEFAULT_FN_ATTRS128
-_mm_maskz_min_epi64 (__mmask8 __M, __m128i __A, __m128i __B) {
+static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
+_mm_maskz_min_epi64(__mmask8 __M, __m128i __A, __m128i __B) {
return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M,
(__v2di)_mm_min_epi64(__A, __B),
(__v2di)_mm_setzero_si128());
@@ -3041,42 +3041,42 @@ _mm256_min_epi64(__m256i __A, __m256i __B) {
return (__m256i)__builtin_elementwise_min((__v4di)__A, (__v4di)__B);
}
-static __inline__ __m256i __DEFAULT_FN_ATTRS256
-_mm256_mask_min_epi64 (__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) {
+static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
+_mm256_mask_min_epi64(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) {
return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M,
(__v4di)_mm256_min_epi64(__A,
__B),
(__v4di)__W);
}
-static __inline__ __m256i __DEFAULT_FN_ATTRS256
-_mm256_maskz_min_epi64 (__mmask8 __M, __m256i __A, __m256i __B) {
+static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
+_mm256_maskz_min_epi64(__mmask8 __M, __m256i __A, __m256i __B) {
return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M,
(__v4di)_mm256_min_epi64(__A,
__B),
(__v4di)_mm256_setzero_si256());
}
-static __inline__ __m128i __DEFAULT_FN_ATTRS128
+static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
_mm_maskz_min_epu32(__mmask8 __M, __m128i __A, __m128i __B) {
return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M,
(__v4si)_mm_min_epu32(__A, __B),
(__v4si)_mm_setzero_si128());
}
-static __inline__ __m128i __DEFAULT_FN_ATTRS128
+static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
_mm_mask_min_epu32(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) {
return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M,
(__v4si)_mm_min_epu32(__A, __B),
(__v4si)__W);
}
-static __inline__ __m256i __DEFAULT_FN_ATTRS256
+static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
_mm256_maskz_min_epu32(__mmask8 __M, __m256i __A, __m256i __B) {
return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M,
(__v8si)_mm256_min_epu32(__A,
__B),
(__v8si)_mm256_setzero_si256());
}
-static __inline__ __m256i __DEFAULT_FN_ATTRS256
+static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
_mm256_mask_min_epu32(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) {
return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M,
(__v8si)_mm256_min_epu32(__A,
__B),
@@ -3088,15 +3088,15 @@ _mm_min_epu64(__m128i __A, __m128i __B) {
return (__m128i)__builtin_elementwise_min((__v2du)__A, (__v2du)__B);
}
-static __inline__ __m128i __DEFAULT_FN_ATTRS128
-_mm_mask_min_epu64 (__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) {
+static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
+_mm_mask_min_epu64(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) {
return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M,
(__v2di)_mm_min_epu64(__A, __B),
(__v2di)__W);
}
-static __inline__ __m128i __DEFAULT_FN_ATTRS128
-_mm_maskz_min_epu64 (__mmask8 __M, __m128i __A, __m128i __B) {
+static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
+_mm_maskz_min_epu64(__mmask8 __M, __m128i __A, __m128i __B) {
return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M,
(__v2di)_mm_min_epu64(__A, __B),
(__v2di)_mm_setzero_si128());
@@ -3107,15 +3107,15 @@ _mm256_min_epu64(__m256i __A, __m256i __B) {
return (__m256i)__builtin_elementwise_min((__v4du)__A, (__v4du)__B);
}
-static __inline__ __m256i __DEFAULT_FN_ATTRS256
-_mm256_mask_min_epu64 (__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) {
+static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
+_mm256_mask_min_epu64(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) {
return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M,
(__v4di)_mm256_min_epu64(__A,
__B),
(__v4di)__W);
}
-static __inline__ __m256i __DEFAULT_FN_ATTRS256
-_mm256_maskz_min_epu64 (__mmask8 __M, __m256i __A, __m256i __B) {
+static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
+_mm256_maskz_min_epu64(__mmask8 __M, __m256i __A, __m256i __B) {
return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M,
(__v4di)_mm256_min_epu64(__A,
__B),
(__v4di)_mm256_setzero_si256());
diff --git a/clang/test/CodeGen/X86/avx512vl-builtins.c
b/clang/test/CodeGen/X86/avx512vl-builtins.c
index 8c5931af54ea3..129b5cd41d9ec 100644
--- a/clang/test/CodeGen/X86/avx512vl-builtins.c
+++ b/clang/test/CodeGen/X86/avx512vl-builtins.c
@@ -4722,6 +4722,9 @@ __m128i test_mm_maskz_max_epi32(__mmask8 __M, __m128i
__A, __m128i __B) {
// CHECK: select <4 x i1> {{.*}}, <4 x i32> [[RES]], <4 x i32> {{.*}}
return _mm_maskz_max_epi32(__M,__A,__B);
}
+
+TEST_CONSTEXPR(match_v4si(_mm_maskz_max_epi32(0x01, (__m128i)(__v4si){+1, -2,
+3, -4}, (__m128i)(__v4si){-1, +2, -3, +4}), +1, 0, 0, 0));
+
__m128i test_mm_mask_max_epi32(__m128i __W, __mmask8 __M, __m128i __A, __m128i
__B) {
// CHECK-LABEL: test_mm_mask_max_epi32
// CHECK: [[RES:%.*]] = call <4 x i32> @llvm.smax.v4i32(<4 x i32> %{{.*}},
<4 x i32> %{{.*}})
@@ -4730,6 +4733,9 @@ __m128i test_mm_mask_max_epi32(__m128i __W, __mmask8 __M,
__m128i __A, __m128i _
// CHECK: select <4 x i1> {{.*}}, <4 x i32> [[RES]], <4 x i32> {{.*}}
return _mm_mask_max_epi32(__W,__M,__A,__B);
}
+
+TEST_CONSTEXPR(match_v4si(_mm_mask_max_epi32((__m128i)(__v4si){-100, +200,
-300, +400}, 0x01, (__m128i)(__v4si){+1, -2, +3, -4}, (__m128i)(__v4si){-1, +2,
-3, +4}), +1, +200, -300, +400));
+
__m256i test_mm256_maskz_max_epi32(__mmask8 __M, __m256i __A, __m256i __B) {
// CHECK-LABEL: test_mm256_maskz_max_epi32
// CHECK: [[RES:%.*]] = call <8 x i32> @llvm.smax.v8i32(<8 x i32> %{{.*}},
<8 x i32> %{{.*}})
@@ -4738,6 +4744,9 @@ __m256i test_mm256_maskz_max_epi32(__mmask8 __M, __m256i
__A, __m256i __B) {
// CHECK: select <8 x i1> {{.*}}, <8 x i32> [[RES]], <8 x i32> {{.*}}
return _mm256_maskz_max_epi32(__M,__A,__B);
}
+
+TEST_CONSTEXPR(match_v8si(_mm256_maskz_max_epi32(0x0F, (__m128i)(__v8si){+1,
-2, +3, -4, +5, -6, +7, -8}, (__m128i)(__v8si){-1, +2, -3, +4, -5, +6, -7,
+8}), +1, +2, +3, +4, 0, 0, 0, 0));
+
__m256i test_mm256_mask_max_epi32(__m256i __W, __mmask8 __M, __m256i __A,
__m256i __B) {
// CHECK-LABEL: test_mm256_mask_max_epi32
// CHECK: [[RES:%.*]] = call <8 x i32> @llvm.smax.v8i32(<8 x i32> %{{.*}},
<8 x i32> %{{.*}})
@@ -4746,18 +4755,27 @@ __m256i test_mm256_mask_max_epi32(__m256i __W, __mmask8
__M, __m256i __A, __m256
// CHECK: select <8 x i1> {{.*}}, <8 x i32> [[RES]], <8 x i32> {{.*}}
return _mm256_mask_max_epi32(__W,__M,__A,__B);
}
+
+TEST_CONSTEXPR(match_v8si(_mm256_mask_max_epi32((__m128i)(__v8si){-100, +200,
-300, +400, -500, +600, -700, +800}, 0x0F, (__m128i)(__v8si){+1, -2, +3, -4,
+5, -6, +7, -8}, (__m128i)(__v8si){-1, +2, -3, +4, -5, +6, -7, +8}), +1, +2,
+3, +4, -500, +600, -700, +800));
+
__m128i test_mm_maskz_max_epi64(__mmask8 __M, __m128i __A, __m128i __B) {
// CHECK-LABEL: test_mm_maskz_max_epi64
// CHECK: [[RES:%.*]] = call {{.*}}<2 x i64> @llvm.smax.v2i64(<2 x i64>
%{{.*}}, <2 x i64> %{{.*}})
// CHECK: select <2 x i1> {{.*}}, <2 x i64> [[RES]], <2 x i64> {{.*}}
return _mm_maskz_max_epi64(__M,__A,__B);
}
+
+TEST_CONSTEXPR(match_v2di(_mm_maskz_max_epi64(0x01, (__m128i)(__v2di){+1, -2},
(__m128i)(__v2di){-1, +2}), +1, 0));
+
__m128i test_mm_mask_max_epi64(__m128i __W, __mmask8 __M, __m128i __A, __m128i
__B) {
// CHECK-LABEL: test_mm_mask_max_epi64
// CHECK: [[RES:%.*]] = call {{.*}}<2 x i64> @llvm.smax.v2i64(<2 x i64>
%{{.*}}, <2 x i64> %{{.*}})
// CHECK: select <2 x i1> {{.*}}, <2 x i64> [[RES]], <2 x i64> {{.*}}
return _mm_mask_max_epi64(__W,__M,__A,__B);
}
+
+TEST_CONSTEXPR(match_v2di(_mm_mask_max_epi64((__m128i)(__v2di){-100, +200},
0x01, (__m128i)(__v2di){+1, -2}, (__m128i)(__v2di){-1, +2}), +1, +200));
+
__m128i test_mm_max_epi64(__m128i __A, __m128i __B) {
// CHECK-LABEL: test_mm_max_epi64
// CHECK: [[RES:%.*]] = call {{.*}}<2 x i64> @llvm.smax.v2i64(<2 x i64>
%{{.*}}, <2 x i64> %{{.*}})
@@ -4772,12 +4790,18 @@ __m256i test_mm256_maskz_max_epi64(__mmask8 __M,
__m256i __A, __m256i __B) {
// CHECK: select <4 x i1> {{.*}}, <4 x i64> [[RES]], <4 x i64> {{.*}}
return _mm256_maskz_max_epi64(__M,__A,__B);
}
+
+TEST_CONSTEXPR(match_v4di(_mm256_maskz_max_epi64(0x01, (__m256i)(__v4di){+1,
-2, +3, -4}, (__m256i)(__v4di){-1, +2, -3, +4}), +1, 0, 0, 0));
+
__m256i test_mm256_mask_max_epi64(__m256i __W, __mmask8 __M, __m256i __A,
__m256i __B) {
// CHECK-LABEL: test_mm256_mask_max_epi64
// CHECK: [[RES:%.*]] = call {{.*}}<4 x i64> @llvm.smax.v4i64(<4 x i64>
%{{.*}}, <4 x i64> %{{.*}})
// CHECK: select <4 x i1> {{.*}}, <4 x i64> [[RES]], <4 x i64> {{.*}}
return _mm256_mask_max_epi64(__W,__M,__A,__B);
}
+
+TEST_CONSTEXPR(match_v4di(_mm256_maskz_max_epi64((__m256i)(__v4di){-100, +200,
-300, +400}, 0x01, (__m256i)(__v4di){+1, -2, +3, -4}, (__m256i)(__v4di){-1, +2,
-3, +4}), +1, +200, -300, +400));
+
__m256i test_mm256_max_epi64(__m256i __A, __m256i __B) {
// CHECK-LABEL: test_mm256_max_epi64
// CHECK: [[RES:%.*]] = call {{.*}}<4 x i64> @llvm.smax.v4i64(<4 x i64>
%{{.*}}, <4 x i64> %{{.*}})
@@ -4794,6 +4818,9 @@ __m128i test_mm_maskz_max_epu32(__mmask8 __M, __m128i
__A, __m128i __B) {
// CHECK: select <4 x i1> {{.*}}, <4 x i32> [[RES]], <4 x i32> {{.*}}
return _mm_maskz_max_epu32(__M,__A,__B);
}
+
+TEST_CONSTEXPR(match_v4su(_mm_maskz_max_epu32(0x01, (__m128i)(__v4su){1, 3, 5,
7}, (__m128i)(__v4su){3, 4, 5, 6}), 3, 0, 0, 0));
+
__m128i test_mm_mask_max_epu32(__m128i __W, __mmask8 __M, __m128i __A, __m128i
__B) {
// CHECK-LABEL: test_mm_mask_max_epu32
// CHECK: [[RES:%.*]] = call <4 x i32> @llvm.umax.v4i32(<4 x i32> %{{.*}},
<4 x i32> %{{.*}})
@@ -4802,6 +4829,9 @@ __m128i test_mm_mask_max_epu32(__m128i __W, __mmask8 __M,
__m128i __A, __m128i _
// CHECK: select <4 x i1> {{.*}}, <4 x i32> [[RES]], <4 x i32> {{.*}}
return _mm_mask_max_epu32(__W,__M,__A,__B);
}
+
+TEST_CONSTEXPR(match_v4su(_mm_mask_max_epu32((__m128i)(__v4su){100, 200, 300,
400}, 0x01, (__m128i)(__v4su){1, 3, 5, 7}, (__m128i)(__v4su){3, 4, 5, 6}), 3,
200, 300, 400));
+
__m256i test_mm256_maskz_max_epu32(__mmask8 __M, __m256i __A, __m256i __B) {
// CHECK-LABEL: test_mm256_maskz_max_epu32
// CHECK: [[RES:%.*]] = call <8 x i32> @llvm.umax.v8i32(<8 x i32> %{{.*}},
<8 x i32> %{{.*}})
@@ -4810,6 +4840,9 @@ __m256i test_mm256_maskz_max_epu32(__mmask8 __M, __m256i
__A, __m256i __B) {
// CHECK: select <8 x i1> {{.*}}, <8 x i32> [[RES]], <8 x i32> {{.*}}
return _mm256_maskz_max_epu32(__M,__A,__B);
}
+
+TEST_CONSTEXPR(match_v8su(_mm256_maskz_max_epu32(0x0F, (__m256i)(__v8su){1, 2,
3, 4, 5, 6, 7, 8}, (__m256i)(__v8su){0, 1, 2, 3, 4, 5, 6, 7}), 1, 2, 3, 4, 0,
0, 0, 0));
+
__m256i test_mm256_mask_max_epu32(__m256i __W, __mmask8 __M, __m256i __A,
__m256i __B) {
// CHECK-LABEL: test_mm256_mask_max_epu32
// CHECK: [[RES:%.*]] = call <8 x i32> @llvm.umax.v8i32(<8 x i32> %{{.*}},
<8 x i32> %{{.*}})
@@ -4818,12 +4851,18 @@ __m256i test_mm256_mask_max_epu32(__m256i __W, __mmask8
__M, __m256i __A, __m256
// CHECK: select <8 x i1> {{.*}}, <8 x i32> [[RES]], <8 x i32> {{.*}}
return _mm256_mask_max_epu32(__W,__M,__A,__B);
}
+
+TEST_CONSTEXPR(match_v8su(_mm256_mask_max_epu32((__m256i)(__v8su){100, 200,
300, 400, 500, 600, 700, 800}, 0x0F, (__m256i)(__v8su){1, 2, 3, 4, 5, 6, 7, 8},
(__m256i)(__v8su){0, 1, 2, 3, 4, 5, 6, 7}), 1, 2, 3, 4, 0, 0, 0, 0));
+
__m128i test_mm_maskz_max_epu64(__mmask8 __M, __m128i __A, __m128i __B) {
// CHECK-LABEL: test_mm_maskz_max_epu64
// CHECK: [[RES:%.*]] = call {{.*}}<2 x i64> @llvm.umax.v2i64(<2 x i64>
%{{.*}}, <2 x i64> %{{.*}})
// CHECK: select <2 x i1> {{.*}}, <2 x i64> [[RES]], <2 x i64> {{.*}}
return _mm_maskz_max_epu64(__M,__A,__B);
}
+
+TEST_CONSTEXPR(match_m128i(_mm_maskz_max_epu64(0x01, (__m128i)(__v2du){0, 3},
(__m128i)(__v2du){1, 2}), 1, 0));
+
__m128i test_mm_max_epu64(__m128i __A, __m128i __B) {
// CHECK-LABEL: test_mm_max_epu64
// CHECK: [[RES:%.*]] = call {{.*}}<2 x i64> @llvm.umax.v2i64(<2 x i64>
%{{.*}}, <2 x i64> %{{.*}})
@@ -4838,12 +4877,18 @@ __m128i test_mm_mask_max_epu64(__m128i __W, __mmask8
__M, __m128i __A, __m128i _
// CHECK: select <2 x i1> {{.*}}, <2 x i64> [[RES]], <2 x i64> {{.*}}
return _mm_mask_max_epu64(__W,__M,__A,__B);
}
+
+TEST_CONSTEXPR(match_m128i(_mm_mask_max_epu64((__m128i)(__v2du){100, 200},
0x01, (__m128i)(__v2du){0, 3}, (__m128i)(__v2du){1, 2}), 1, 200));
+
__m256i test_mm256_maskz_max_epu64(__mmask8 __M, __m256i __A, __m256i __B) {
// CHECK-LABEL: test_mm256_maskz_max_epu64
// CHECK: [[RES:%.*]] = call {{.*}}<4 x i64> @llvm.umax.v4i64(<4 x i64>
%{{.*}}, <4 x i64> %{{.*}})
// CHECK: select <4 x i1> {{.*}}, <4 x i64> [[RES]], <4 x i64> {{.*}}
return _mm256_maskz_max_epu64(__M,__A,__B);
}
+
+TEST_CONSTEXPR(match_m256i(_mm256_max_epu64(0x01, (__m256i)(__v4du){0, 1, 4,
3}, (__m256i)(__v4du){1, 2, 3, 4}), 1, 0, 0, 0));
+
__m256i test_mm256_max_epu64(__m256i __A, __m256i __B) {
// CHECK-LABEL: test_mm256_max_epu64
// CHECK: [[RES:%.*]] = call {{.*}}<4 x i64> @llvm.umax.v4i64(<4 x i64>
%{{.*}}, <4 x i64> %{{.*}})
@@ -4858,6 +4903,9 @@ __m256i test_mm256_mask_max_epu64(__m256i __W, __mmask8
__M, __m256i __A, __m256
// CHECK: select <4 x i1> {{.*}}, <4 x i64> [[RES]], <4 x i64> {{.*}}
return _mm256_mask_max_epu64(__W,__M,__A,__B);
}
+
+TEST_CONSTEXPR(match_m256i(_mm256_mask_max_epu64((__m256i)(__v4du){100, 200,
300, 400}, 0x01, (__m256i)(__v4du){0, 1, 4, 3}, (__m256i)(__v4du){1, 2, 3, 4}),
1, 200, 300, 400));
+
__m128i test_mm_maskz_min_epi32(__mmask8 __M, __m128i __A, __m128i __B) {
// CHECK-LABEL: test_mm_maskz_min_epi32
// CHECK: [[RES:%.*]] = call <4 x i32> @llvm.smin.v4i32(<4 x i32> %{{.*}},
<4 x i32> %{{.*}})
@@ -4866,6 +4914,9 @@ __m128i test_mm_maskz_min_epi32(__mmask8 __M, __m128i
__A, __m128i __B) {
// CHECK: select <4 x i1> {{.*}}, <4 x i32> [[RES]], <4 x i32> {{.*}}
return _mm_maskz_min_epi32(__M,__A,__B);
}
+
+TEST_CONSTEXPR(match_v4si(_mm_maskz_min_epi32(0x01, (__m128i)(__v4si){-1, +2,
-3, +4}, (__m128i)(__v4si){+1, -2, +3, -4}), -1, 0, 0, 0));
+
__m128i test_mm_mask_min_epi32(__m128i __W, __mmask8 __M, __m128i __A, __m128i
__B) {
// CHECK-LABEL: test_mm_mask_min_epi32
// CHECK: [[RES:%.*]] = call <4 x i32> @llvm.smin.v4i32(<4 x i32> %{{.*}},
<4 x i32> %{{.*}})
@@ -4874,6 +4925,9 @@ __m128i test_mm_mask_min_epi32(__m128i __W, __mmask8 __M,
__m128i __A, __m128i _
// CHECK: select <4 x i1> {{.*}}, <4 x i32> [[RES]], <4 x i32> {{.*}}
return _mm_mask_min_epi32(__W,__M,__A,__B);
}
+
+TEST_CONSTEXPR(match_v4si(_mm_mask_min_epi32((__m128i)(__v4si){-100, +200,
-300, +400}, 0x01, (__m128i)(__v4si){-1, +2, -3, +4}, (__m128i)(__v4si){+1, -2,
+3, -4}), -1, +200, -300, +400));
+
__m256i test_mm256_maskz_min_epi32(__mmask8 __M, __m256i __A, __m256i __B) {
// CHECK-LABEL: test_mm256_maskz_min_epi32
// CHECK: [[RES:%.*]] = call <8 x i32> @llvm.smin.v8i32(<8 x i32> %{{.*}},
<8 x i32> %{{.*}})
@@ -4882,6 +4936,9 @@ __m256i test_mm256_maskz_min_epi32(__mmask8 __M, __m256i
__A, __m256i __B) {
// CHECK: select <8 x i1> {{.*}}, <8 x i32> [[RES]], <8 x i32> {{.*}}
return _mm256_maskz_min_epi32(__M,__A,__B);
}
+
+TEST_CONSTEXPR(match_v8si(_mm256_maskz_min_epi32(0x0F, (__m256i)(__v8si){+1,
-2, +3, -4, +5, -6, +7, -8}, (__m256i)(__v8si){-1, +2, -3, +4, -5, +6, -7,
+8}), -1, -2, -3, -4, 0, 0, 0, 0));
+
__m256i test_mm256_mask_min_epi32(__m256i __W, __mmask8 __M, __m256i __A,
__m256i __B) {
// CHECK-LABEL: test_mm256_mask_min_epi32
// CHECK: [[RES:%.*]] = call <8 x i32> @llvm.smin.v8i32(<8 x i32> %{{.*}},
<8 x i32> %{{.*}})
@@ -4890,6 +4947,9 @@ __m256i test_mm256_mask_min_epi32(__m256i __W, __mmask8
__M, __m256i __A, __m256
// CHECK: select <8 x i1> {{.*}}, <8 x i32> [[RES]], <8 x i32> {{.*}}
return _mm256_mask_min_epi32(__W,__M,__A,__B);
}
+
+TEST_CONSTEXPR(match_v8si(_mm256_mask_min_epi32((__m256i)(__v8si){-100, +200,
-300, +400, -500, +600, -700, +800}, 0x0F, (__m256i)(__v8si){+1, -2, +3, -4,
+5, -6, +7, -8}, (__m256i)(__v8si){-1, +2, -3, +4, -5, +6, -7, +8}), -1, -2,
-3, -4, -500, +600, -700, +800));
+
__m128i test_mm_min_epi64(__m128i __A, __m128i __B) {
// CHECK-LABEL: test_mm_min_epi64
// CHECK: [[RES:%.*]] = call {{.*}}<2 x i64> @llvm.smin.v2i64(<2 x i64>
%{{.*}}, <2 x i64> %{{.*}})
@@ -4904,12 +4964,18 @@ __m128i test_mm_mask_min_epi64(__m128i __W, __mmask8
__M, __m128i __A, __m128i _
// CHECK: select <2 x i1> {{.*}}, <2 x i64> [[RES]], <2 x i64> {{.*}}
return _mm_mask_min_epi64(__W,__M,__A,__B);
}
+
+TEST_CONSTEXPR(match_v2di(_mm_mask_min_epi64((__m128i)(__v2di){-100, +200},
0x01, (__m128i)(__v2di){+1, -2}, (__m128i)(__v2di){-1, +2}), -1, +200));
+
__m128i test_mm_maskz_min_epi64(__mmask8 __M, __m128i __A, __m128i __B) {
// CHECK-LABEL: test_mm_maskz_min_epi64
// CHECK: [[RES:%.*]] = call {{.*}}<2 x i64> @llvm.smin.v2i64(<2 x i64>
%{{.*}}, <2 x i64> %{{.*}})
// CHECK: select <2 x i1> {{.*}}, <2 x i64> [[RES]], <2 x i64> {{.*}}
return _mm_maskz_min_epi64(__M,__A,__B);
}
+
+TEST_CONSTEXPR(match_v2di(_mm_maskz_min_epi64(0x01, (__m128i)(__v2di){+1, -2},
(__m128i)(__v2di){-1, +2}), -1, 0));
+
__m256i test_mm256_min_epi64(__m256i __A, __m256i __B) {
// CHECK-LABEL: test_mm256_min_epi64
// CHECK: [[RES:%.*]] = call {{.*}}<4 x i64> @llvm.smin.v4i64(<4 x i64>
%{{.*}}, <4 x i64> %{{.*}})
@@ -4924,12 +4990,18 @@ __m256i test_mm256_mask_min_epi64(__m256i __W, __mmask8
__M, __m256i __A, __m256
// CHECK: select <4 x i1> {{.*}}, <4 x i64> [[RES]], <4 x i64> {{.*}}
return _mm256_mask_min_epi64(__W,__M,__A,__B);
}
+
+TEST_CONSTEXPR(match_v4di(_mm256_mask_min_epi64((__m256i)(__v4di){}, 0x01,
(__m256i)(__v4di){+1, -2, +3, -4}, (__m256i)(__v4di){-1, +2, -3, +4}), -1, 0,
0, 0));
+
__m256i test_mm256_maskz_min_epi64(__mmask8 __M, __m256i __A, __m256i __B) {
// CHECK-LABEL: test_mm256_maskz_min_epi64
// CHECK: [[RES:%.*]] = call {{.*}}<4 x i64> @llvm.smin.v4i64(<4 x i64>
%{{.*}}, <4 x i64> %{{.*}})
// CHECK: select <4 x i1> {{.*}}, <4 x i64> [[RES]], <4 x i64> {{.*}}
return _mm256_maskz_min_epi64(__M,__A,__B);
}
+
+TEST_CONSTEXPR(match_v4di(_mm256_maskz_min_epi64(0x01, (__m256i)(__v4di){+1,
-2, +3, -4}, (__m256i)(__v4di){-1, +2, -3, +4}), -1, 0, 0, 0));
+
__m128i test_mm_maskz_min_epu32(__mmask8 __M, __m128i __A, __m128i __B) {
// CHECK-LABEL: test_mm_maskz_min_epu32
// CHECK: [[RES:%.*]] = call <4 x i32> @llvm.umin.v4i32(<4 x i32> %{{.*}},
<4 x i32> %{{.*}})
@@ -4938,6 +5010,9 @@ __m128i test_mm_maskz_min_epu32(__mmask8 __M, __m128i
__A, __m128i __B) {
// CHECK: select <4 x i1> {{.*}}, <4 x i32> [[RES]], <4 x i32> {{.*}}
return _mm_maskz_min_epu32(__M,__A,__B);
}
+
+TEST_CONSTEXPR(match_v4su(_mm_maskz_min_epu32(0x01, (__m128i)(__v4su){1, 3, 5,
7}, (__m128i)(__v4su){3, 4, 5, 6}), 1, 0, 0, 0));
+
__m128i test_mm_mask_min_epu32(__m128i __W, __mmask8 __M, __m128i __A, __m128i
__B) {
// CHECK-LABEL: test_mm_mask_min_epu32
// CHECK: [[RES:%.*]] = call <4 x i32> @llvm.umin.v4i32(<4 x i32> %{{.*}},
<4 x i32> %{{.*}})
@@ -4946,6 +5021,9 @@ __m128i test_mm_mask_min_epu32(__m128i __W, __mmask8 __M,
__m128i __A, __m128i _
// CHECK: select <4 x i1> {{.*}}, <4 x i32> [[RES]], <4 x i32> {{.*}}
return _mm_mask_min_epu32(__W,__M,__A,__B);
}
+
+TEST_CONSTEXPR(match_v4su(_mm_mask_min_epu32((__m128i)(__v4su){100, 200, 300,
400}, 0x01, (__m128i)(__v4su){1, 3, 5, 7}, (__m128i)(__v4su){3, 4, 5, 6}), 1,
200, 300, 400));
+
__m256i test_mm256_maskz_min_epu32(__mmask8 __M, __m256i __A, __m256i __B) {
// CHECK-LABEL: test_mm256_maskz_min_epu32
// CHECK: [[RES:%.*]] = call <8 x i32> @llvm.umin.v8i32(<8 x i32> %{{.*}},
<8 x i32> %{{.*}})
@@ -4954,6 +5032,9 @@ __m256i test_mm256_maskz_min_epu32(__mmask8 __M, __m256i
__A, __m256i __B) {
// CHECK: select <8 x i1> {{.*}}, <8 x i32> [[RES]], <8 x i32> {{.*}}
return _mm256_maskz_min_epu32(__M,__A,__B);
}
+
+TEST_CONSTEXPR(match_v8su(_mm256_maskz_min_epu32(0x0F, (__m256i)(__v8su){1, 2,
3, 4, 5, 6, 7, 8}, (__m256i)(__v8su){0, 1, 2, 3, 4, 5, 6, 7}), 0, 1, 2, 3, 0,
0, 0, 0));
+
__m256i test_mm256_mask_min_epu32(__m256i __W, __mmask8 __M, __m256i __A,
__m256i __B) {
// CHECK-LABEL: test_mm256_mask_min_epu32
// CHECK: [[RES:%.*]] = call <8 x i32> @llvm.umin.v8i32(<8 x i32> %{{.*}},
<8 x i32> %{{.*}})
@@ -4962,6 +5043,9 @@ __m256i test_mm256_mask_min_epu32(__m256i __W, __mmask8
__M, __m256i __A, __m256
// CHECK: select <8 x i1> {{.*}}, <8 x i32> [[RES]], <8 x i32> {{.*}}
return _mm256_mask_min_epu32(__W,__M,__A,__B);
}
+
+TEST_CONSTEXPR(match_v8su(_mm256_mask_min_epu32((__m256i)(__v8su){100, 200,
300, 400, 500, 600, 700, 800}, 0x0F, (__m256i)(__v8su){1, 2, 3, 4, 5, 6, 7, 8},
(__m256i)(__v8su){0, 1, 2, 3, 4, 5, 6, 7}), 0, 1, 2, 3, 500, 600, 700, 800));
+
__m128i test_mm_min_epu64(__m128i __A, __m128i __B) {
// CHECK-LABEL: test_mm_min_epu64
// CHECK: [[RES:%.*]] = call {{.*}}<2 x i64> @llvm.umin.v2i64(<2 x i64>
%{{.*}}, <2 x i64> %{{.*}})
@@ -4976,12 +5060,18 @@ __m128i test_mm_mask_min_epu64(__m128i __W, __mmask8
__M, __m128i __A, __m128i _
// CHECK: select <2 x i1> {{.*}}, <2 x i64> [[RES]], <2 x i64> {{.*}}
return _mm_mask_min_epu64(__W,__M,__A,__B);
}
+
+TEST_CONSTEXPR(match_m128i(_mm_mask_min_epu64((__m128i)(__v2du){100, 200},
0x01, (__m128i)(__v2du){0, 3}, (__m128i)(__v2du){1, 2}), 0, 200));
+
__m128i test_mm_maskz_min_epu64(__mmask8 __M, __m128i __A, __m128i __B) {
// CHECK-LABEL: test_mm_maskz_min_epu64
// CHECK: [[RES:%.*]] = call {{.*}}<2 x i64> @llvm.umin.v2i64(<2 x i64>
%{{.*}}, <2 x i64> %{{.*}})
// CHECK: select <2 x i1> {{.*}}, <2 x i64> [[RES]], <2 x i64> {{.*}}
return _mm_maskz_min_epu64(__M,__A,__B);
}
+
+TEST_CONSTEXPR(match_m128i(_mm_maskz_min_epu64(0x01, (__m128i)(__v2du){0, 3},
(__m128i)(__v2du){1, 2}), 0, 0));
+
__m256i test_mm256_min_epu64(__m256i __A, __m256i __B) {
// CHECK-LABEL: test_mm256_min_epu64
// CHECK: [[RES:%.*]] = call {{.*}}<4 x i64> @llvm.umin.v4i64(<4 x i64>
%{{.*}}, <4 x i64> %{{.*}})
@@ -4996,12 +5086,18 @@ __m256i test_mm256_mask_min_epu64(__m256i __W, __mmask8
__M, __m256i __A, __m256
// CHECK: select <4 x i1> {{.*}}, <4 x i64> [[RES]], <4 x i64> {{.*}}
return _mm256_mask_min_epu64(__W,__M,__A,__B);
}
+
+TEST_CONSTEXPR(match_m256i(_mm256_mask_min_epu64((__m256i)(__v4du){100, 200,
300, 400}, 0x01, (__m256i)(__v4du){0, 1, 4, 3}, (__m256i)(__v4du){1, 2, 3, 4}),
0, 200, 300, 400));
+
__m256i test_mm256_maskz_min_epu64(__mmask8 __M, __m256i __A, __m256i __B) {
// CHECK-LABEL: test_mm256_maskz_min_epu64
// CHECK: [[RES:%.*]] = call {{.*}}<4 x i64> @llvm.umin.v4i64(<4 x i64>
%{{.*}}, <4 x i64> %{{.*}})
// CHECK: select <4 x i1> {{.*}}, <4 x i64> [[RES]], <4 x i64> {{.*}}
return _mm256_maskz_min_epu64(__M,__A,__B);
}
+
+TEST_CONSTEXPR(match_m256i(_mm256_maskz_min_epu64(0x01, (__m256i)(__v4du){0,
1, 4, 3}, (__m256i)(__v4du){1, 2, 3, 4}), 0, 0, 0, 0));
+
__m128d test_mm_roundscale_pd(__m128d __A) {
// CHECK-LABEL: test_mm_roundscale_pd
// CHECK: @llvm.x86.avx512.mask.rndscale.pd.128
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