https://github.com/moorabbit created
https://github.com/llvm/llvm-project/pull/155089
The following avx512 intrinsics were removed:
- `__builtin_ia32_vplzcntd_128`
- `__builtin_ia32_vplzcntd_256`
- `__builtin_ia32_vplzcntd_512`
- `__builtin_ia32_vplzcntq_128`
- `__builtin_ia32_vplzcntq_256`
- `__builtin_ia32_vplzcntq_512`
Users of the removed intrinsics (e.g. `_mm512_lzcnt_epi64`, `_mm_lzcnt_epi32`)
are now relying on `__builtin_elementwise_ctlz` and are marked as `constexpr`.
Fixes: #154279
>From b7b38d35769855b15c0fe6f0f5411d24aeeab9b6 Mon Sep 17 00:00:00 2001
From: moorabbit <moorab...@proton.me>
Date: Fri, 22 Aug 2025 09:52:01 -0400
Subject: [PATCH] [Headers][X86] Use `__builtin_elementwise_ctlz` rather
avx512cd intrinsics.
The following avx512 intrinsics were removed:
- `__builtin_ia32_vplzcntd_128`
- `__builtin_ia32_vplzcntd_256`
- `__builtin_ia32_vplzcntd_512`
- `__builtin_ia32_vplzcntq_128`
- `__builtin_ia32_vplzcntq_256`
- `__builtin_ia32_vplzcntq_512`
Users of the removed intrinsics (e.g. `_mm512_lzcnt_epi64`, `_mm_lzcnt_epi32`)
are now relying on
`__builtin_elementwise_ctlz` and are marked as `constexpr`.
---
clang/include/clang/Basic/BuiltinsX86.td | 18 ----------
clang/lib/CodeGen/TargetBuiltins/X86.cpp | 9 -----
clang/lib/Headers/avx512cdintrin.h | 20 ++++++-----
clang/lib/Headers/avx512vlcdintrin.h | 36 +++++++++++---------
clang/test/CodeGen/X86/avx512cd-builtins.c | 19 +++++++----
clang/test/CodeGen/X86/avx512vlcd-builtins.c | 33 +++++++++++-------
6 files changed, 66 insertions(+), 69 deletions(-)
diff --git a/clang/include/clang/Basic/BuiltinsX86.td
b/clang/include/clang/Basic/BuiltinsX86.td
index 527acd9ef086e..0bc93d75c9724 100644
--- a/clang/include/clang/Basic/BuiltinsX86.td
+++ b/clang/include/clang/Basic/BuiltinsX86.td
@@ -1383,8 +1383,6 @@ let Features = "avx512cd,avx512vl", Attributes =
[NoThrow, Const, RequiredVector
let Features = "avx512cd,evex512", Attributes = [NoThrow, Const,
RequiredVectorWidth<512>] in {
def vpconflictdi_512 : X86Builtin<"_Vector<8, long long int>(_Vector<8, long
long int>)">;
def vpconflictsi_512 : X86Builtin<"_Vector<16, int>(_Vector<16, int>)">;
- def vplzcntd_512 : X86Builtin<"_Vector<16, int>(_Vector<16, int>)">;
- def vplzcntq_512 : X86Builtin<"_Vector<8, long long int>(_Vector<8, long
long int>)">;
}
let Features = "avx512vl,avx512bitalg", Attributes = [NoThrow, Const,
RequiredVectorWidth<128>] in {
@@ -2438,22 +2436,6 @@ let Features = "avx512vl", Attributes = [NoThrow, Const,
RequiredVectorWidth<256
def rcp14ps256_mask : X86Builtin<"_Vector<8, float>(_Vector<8, float>,
_Vector<8, float>, unsigned char)">;
}
-let Features = "avx512cd,avx512vl", Attributes = [NoThrow, Const,
RequiredVectorWidth<128>] in {
- def vplzcntd_128 : X86Builtin<"_Vector<4, int>(_Vector<4, int>)">;
-}
-
-let Features = "avx512cd,avx512vl", Attributes = [NoThrow, Const,
RequiredVectorWidth<256>] in {
- def vplzcntd_256 : X86Builtin<"_Vector<8, int>(_Vector<8, int>)">;
-}
-
-let Features = "avx512cd,avx512vl", Attributes = [NoThrow, Const,
RequiredVectorWidth<128>] in {
- def vplzcntq_128 : X86Builtin<"_Vector<2, long long int>(_Vector<2, long
long int>)">;
-}
-
-let Features = "avx512cd,avx512vl", Attributes = [NoThrow, Const,
RequiredVectorWidth<256>] in {
- def vplzcntq_256 : X86Builtin<"_Vector<4, long long int>(_Vector<4, long
long int>)">;
-}
-
let Features = "avx512f", Attributes = [NoThrow, Const,
RequiredVectorWidth<128>] in {
def vcvtsd2si32 : X86Builtin<"int(_Vector<2, double>, _Constant int)">;
def vcvtsd2usi32 : X86Builtin<"unsigned int(_Vector<2, double>, _Constant
int)">;
diff --git a/clang/lib/CodeGen/TargetBuiltins/X86.cpp
b/clang/lib/CodeGen/TargetBuiltins/X86.cpp
index b9248a7d43f85..a4974e45caf10 100644
--- a/clang/lib/CodeGen/TargetBuiltins/X86.cpp
+++ b/clang/lib/CodeGen/TargetBuiltins/X86.cpp
@@ -2183,15 +2183,6 @@ Value *CodeGenFunction::EmitX86BuiltinExpr(unsigned
BuiltinID,
return Builder.CreateBitCast(Res, Ops[0]->getType());
}
- case X86::BI__builtin_ia32_vplzcntd_128:
- case X86::BI__builtin_ia32_vplzcntd_256:
- case X86::BI__builtin_ia32_vplzcntd_512:
- case X86::BI__builtin_ia32_vplzcntq_128:
- case X86::BI__builtin_ia32_vplzcntq_256:
- case X86::BI__builtin_ia32_vplzcntq_512: {
- Function *F = CGM.getIntrinsic(Intrinsic::ctlz, Ops[0]->getType());
- return Builder.CreateCall(F, {Ops[0],Builder.getInt1(false)});
- }
case X86::BI__builtin_ia32_sqrtss:
case X86::BI__builtin_ia32_sqrtsd: {
Value *A = Builder.CreateExtractElement(Ops[0], (uint64_t)0);
diff --git a/clang/lib/Headers/avx512cdintrin.h
b/clang/lib/Headers/avx512cdintrin.h
index 33b552f6fe6ad..b39467c138054 100644
--- a/clang/lib/Headers/avx512cdintrin.h
+++ b/clang/lib/Headers/avx512cdintrin.h
@@ -19,6 +19,12 @@
__attribute__((__always_inline__, __nodebug__,
\
__target__("avx512cd,evex512"), __min_vector_width__(512)))
+#if defined(__cplusplus) && (__cplusplus >= 201103L)
+#define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS constexpr
+#else
+#define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS
+#endif
+
static __inline__ __m512i __DEFAULT_FN_ATTRS
_mm512_conflict_epi64 (__m512i __A)
{
@@ -63,10 +69,9 @@ _mm512_maskz_conflict_epi32 (__mmask16 __U, __m512i __A)
(__v16si)_mm512_setzero_si512());
}
-static __inline__ __m512i __DEFAULT_FN_ATTRS
-_mm512_lzcnt_epi32 (__m512i __A)
-{
- return (__m512i) __builtin_ia32_vplzcntd_512 ((__v16si) __A);
+static __inline__ __m512i __DEFAULT_FN_ATTRS_CONSTEXPR
+_mm512_lzcnt_epi32(__m512i __A) {
+ return (__m512i)__builtin_elementwise_ctlz((__v16si)__A);
}
static __inline__ __m512i __DEFAULT_FN_ATTRS
@@ -85,10 +90,9 @@ _mm512_maskz_lzcnt_epi32 (__mmask16 __U, __m512i __A)
(__v16si)_mm512_setzero_si512());
}
-static __inline__ __m512i __DEFAULT_FN_ATTRS
-_mm512_lzcnt_epi64 (__m512i __A)
-{
- return (__m512i) __builtin_ia32_vplzcntq_512 ((__v8di) __A);
+static __inline__ __m512i __DEFAULT_FN_ATTRS_CONSTEXPR
+_mm512_lzcnt_epi64(__m512i __A) {
+ return (__m512i)__builtin_elementwise_ctlz((__v8di)__A);
}
static __inline__ __m512i __DEFAULT_FN_ATTRS
diff --git a/clang/lib/Headers/avx512vlcdintrin.h
b/clang/lib/Headers/avx512vlcdintrin.h
index 923e2c551a97a..f980ed2da0e80 100644
--- a/clang/lib/Headers/avx512vlcdintrin.h
+++ b/clang/lib/Headers/avx512vlcdintrin.h
@@ -23,6 +23,14 @@
__target__("avx512vl,avx512cd,no-evex512"),
\
__min_vector_width__(256)))
+#if defined(__cplusplus) && (__cplusplus >= 201103L)
+#define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS256 constexpr
+#define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128 constexpr
+#else
+#define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS256
+#define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128
+#endif
+
static __inline__ __m128i __DEFAULT_FN_ATTRS128
_mm_broadcastmb_epi64 (__mmask8 __A)
{
@@ -136,10 +144,9 @@ _mm256_maskz_conflict_epi32 (__mmask8 __U, __m256i __A)
(__v8si)_mm256_setzero_si256());
}
-static __inline__ __m128i __DEFAULT_FN_ATTRS128
-_mm_lzcnt_epi32 (__m128i __A)
-{
- return (__m128i) __builtin_ia32_vplzcntd_128 ((__v4si) __A);
+static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
+_mm_lzcnt_epi32(__m128i __A) {
+ return (__m128i)__builtin_elementwise_ctlz((__v4si)__A);
}
static __inline__ __m128i __DEFAULT_FN_ATTRS128
@@ -158,10 +165,9 @@ _mm_maskz_lzcnt_epi32 (__mmask8 __U, __m128i __A)
(__v4si)_mm_setzero_si128());
}
-static __inline__ __m256i __DEFAULT_FN_ATTRS256
-_mm256_lzcnt_epi32 (__m256i __A)
-{
- return (__m256i) __builtin_ia32_vplzcntd_256 ((__v8si) __A);
+static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
+_mm256_lzcnt_epi32(__m256i __A) {
+ return (__m256i)__builtin_elementwise_ctlz((__v8si)__A);
}
static __inline__ __m256i __DEFAULT_FN_ATTRS256
@@ -180,10 +186,9 @@ _mm256_maskz_lzcnt_epi32 (__mmask8 __U, __m256i __A)
(__v8si)_mm256_setzero_si256());
}
-static __inline__ __m128i __DEFAULT_FN_ATTRS128
-_mm_lzcnt_epi64 (__m128i __A)
-{
- return (__m128i) __builtin_ia32_vplzcntq_128 ((__v2di) __A);
+static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
+_mm_lzcnt_epi64(__m128i __A) {
+ return (__m128i)__builtin_elementwise_ctlz((__v2di)__A);
}
static __inline__ __m128i __DEFAULT_FN_ATTRS128
@@ -202,10 +207,9 @@ _mm_maskz_lzcnt_epi64 (__mmask8 __U, __m128i __A)
(__v2di)_mm_setzero_si128());
}
-static __inline__ __m256i __DEFAULT_FN_ATTRS256
-_mm256_lzcnt_epi64 (__m256i __A)
-{
- return (__m256i) __builtin_ia32_vplzcntq_256 ((__v4di) __A);
+static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
+_mm256_lzcnt_epi64(__m256i __A) {
+ return (__m256i)__builtin_elementwise_ctlz((__v4di)__A);
}
static __inline__ __m256i __DEFAULT_FN_ATTRS256
diff --git a/clang/test/CodeGen/X86/avx512cd-builtins.c
b/clang/test/CodeGen/X86/avx512cd-builtins.c
index 45df0fccb322f..03724844dabdd 100644
--- a/clang/test/CodeGen/X86/avx512cd-builtins.c
+++ b/clang/test/CodeGen/X86/avx512cd-builtins.c
@@ -5,6 +5,7 @@
#include <immintrin.h>
+#include "builtin_test_helpers.h"
__m512i test_mm512_conflict_epi64(__m512i __A) {
// CHECK-LABEL: test_mm512_conflict_epi64
@@ -42,35 +43,41 @@ __m512i test_mm512_maskz_conflict_epi32(__mmask16 __U,
__m512i __A) {
}
__m512i test_mm512_lzcnt_epi32(__m512i __A) {
// CHECK-LABEL: test_mm512_lzcnt_epi32
- // CHECK: call <16 x i32> @llvm.ctlz.v16i32(<16 x i32> %{{.*}}, i1 false)
+ // CHECK: call <16 x i32> @llvm.ctlz.v16i32(<16 x i32> %{{.*}}, i1 true)
return _mm512_lzcnt_epi32(__A);
}
+
+TEST_CONSTEXPR(match_v16si(_mm512_lzcnt_epi32((__m512i)(__v16si){1, 2, 4, 8,
16, 32, 64, 128, 3, 5, 6, 7, 9, 10, 11, 12}), 31, 30, 29, 28, 27, 26, 25, 24,
30, 29, 29, 29, 28, 28, 28, 28));
+
__m512i test_mm512_mask_lzcnt_epi32(__m512i __W, __mmask16 __U, __m512i __A) {
// CHECK-LABEL: test_mm512_mask_lzcnt_epi32
- // CHECK: call <16 x i32> @llvm.ctlz.v16i32(<16 x i32> %{{.*}}, i1 false)
+ // CHECK: call <16 x i32> @llvm.ctlz.v16i32(<16 x i32> %{{.*}}, i1 true)
// CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}
return _mm512_mask_lzcnt_epi32(__W,__U,__A);
}
__m512i test_mm512_maskz_lzcnt_epi32(__mmask16 __U, __m512i __A) {
// CHECK-LABEL: test_mm512_maskz_lzcnt_epi32
- // CHECK: call <16 x i32> @llvm.ctlz.v16i32(<16 x i32> %{{.*}}, i1 false)
+ // CHECK: call <16 x i32> @llvm.ctlz.v16i32(<16 x i32> %{{.*}}, i1 true)
// CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}
return _mm512_maskz_lzcnt_epi32(__U,__A);
}
__m512i test_mm512_lzcnt_epi64(__m512i __A) {
// CHECK-LABEL: test_mm512_lzcnt_epi64
- // CHECK: call {{.*}}<8 x i64> @llvm.ctlz.v8i64(<8 x i64> %{{.*}}, i1 false)
+ // CHECK: call {{.*}}<8 x i64> @llvm.ctlz.v8i64(<8 x i64> %{{.*}}, i1 true)
return _mm512_lzcnt_epi64(__A);
}
+
+TEST_CONSTEXPR(match_v8di(_mm512_lzcnt_epi64((__m512i)(__v8di){1, 2, 4, 8, 16,
32, 64, 128}), 63, 62, 61, 60, 59, 58, 57, 56));
+
__m512i test_mm512_mask_lzcnt_epi64(__m512i __W, __mmask8 __U, __m512i __A) {
// CHECK-LABEL: test_mm512_mask_lzcnt_epi64
- // CHECK: call {{.*}}<8 x i64> @llvm.ctlz.v8i64(<8 x i64> %{{.*}}, i1 false)
+ // CHECK: call {{.*}}<8 x i64> @llvm.ctlz.v8i64(<8 x i64> %{{.*}}, i1 true)
// CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}
return _mm512_mask_lzcnt_epi64(__W,__U,__A);
}
__m512i test_mm512_maskz_lzcnt_epi64(__mmask8 __U, __m512i __A) {
// CHECK-LABEL: test_mm512_maskz_lzcnt_epi64
- // CHECK: call {{.*}}<8 x i64> @llvm.ctlz.v8i64(<8 x i64> %{{.*}}, i1 false)
+ // CHECK: call {{.*}}<8 x i64> @llvm.ctlz.v8i64(<8 x i64> %{{.*}}, i1 true)
// CHECK: select <8 x i1> %{{.*}}, <8 x i64> %{{.*}}, <8 x i64> %{{.*}}
return _mm512_maskz_lzcnt_epi64(__U,__A);
}
diff --git a/clang/test/CodeGen/X86/avx512vlcd-builtins.c
b/clang/test/CodeGen/X86/avx512vlcd-builtins.c
index 939fd6460e6a6..6eff5a6c5e6a8 100644
--- a/clang/test/CodeGen/X86/avx512vlcd-builtins.c
+++ b/clang/test/CodeGen/X86/avx512vlcd-builtins.c
@@ -5,6 +5,7 @@
#include <immintrin.h>
+#include "builtin_test_helpers.h"
__m128i test_mm_broadcastmb_epi64(__m128i a,__m128i b) {
// CHECK-LABEL: test_mm_broadcastmb_epi64
@@ -136,80 +137,88 @@ __m256i test_mm256_maskz_conflict_epi32(__mmask8 __U,
__m256i __A) {
__m128i test_mm_lzcnt_epi32(__m128i __A) {
// CHECK-LABEL: test_mm_lzcnt_epi32
- // CHECK: call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %{{.*}}, i1 false)
+ // CHECK: call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %{{.*}}, i1 true)
return _mm_lzcnt_epi32(__A);
}
+TEST_CONSTEXPR(match_v4si(_mm_lzcnt_epi32((__m128i)(__v4si){8, 16, 32, 64}),
28, 27, 26, 25));
+
__m128i test_mm_mask_lzcnt_epi32(__m128i __W, __mmask8 __U, __m128i __A) {
// CHECK-LABEL: test_mm_mask_lzcnt_epi32
- // CHECK: call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %{{.*}}, i1 false)
+ // CHECK: call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %{{.*}}, i1 true)
// CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}}
return _mm_mask_lzcnt_epi32(__W, __U, __A);
}
__m128i test_mm_maskz_lzcnt_epi32(__mmask8 __U, __m128i __A) {
// CHECK-LABEL: test_mm_maskz_lzcnt_epi32
- // CHECK: call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %{{.*}}, i1 false)
+ // CHECK: call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %{{.*}}, i1 true)
// CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}}
return _mm_maskz_lzcnt_epi32(__U, __A);
}
__m256i test_mm256_lzcnt_epi32(__m256i __A) {
// CHECK-LABEL: test_mm256_lzcnt_epi32
- // CHECK: call <8 x i32> @llvm.ctlz.v8i32(<8 x i32> %{{.*}}, i1 false)
+ // CHECK: call <8 x i32> @llvm.ctlz.v8i32(<8 x i32> %{{.*}}, i1 true)
return _mm256_lzcnt_epi32(__A);
}
+TEST_CONSTEXPR(match_v8si(_mm256_lzcnt_epi32((__m256i)(__v8si){1, 2, 4, 8, 16,
32, 64, 128}), 31, 30, 29, 28, 27, 26, 25, 24));
+
__m256i test_mm256_mask_lzcnt_epi32(__m256i __W, __mmask8 __U, __m256i __A) {
// CHECK-LABEL: test_mm256_mask_lzcnt_epi32
- // CHECK: call <8 x i32> @llvm.ctlz.v8i32(<8 x i32> %{{.*}}, i1 false)
+ // CHECK: call <8 x i32> @llvm.ctlz.v8i32(<8 x i32> %{{.*}}, i1 true)
// CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}}
return _mm256_mask_lzcnt_epi32(__W, __U, __A);
}
__m256i test_mm256_maskz_lzcnt_epi32(__mmask8 __U, __m256i __A) {
// CHECK-LABEL: test_mm256_maskz_lzcnt_epi32
- // CHECK: call <8 x i32> @llvm.ctlz.v8i32(<8 x i32> %{{.*}}, i1 false)
+ // CHECK: call <8 x i32> @llvm.ctlz.v8i32(<8 x i32> %{{.*}}, i1 true)
// CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}}
return _mm256_maskz_lzcnt_epi32(__U, __A);
}
__m128i test_mm_lzcnt_epi64(__m128i __A) {
// CHECK-LABEL: test_mm_lzcnt_epi64
- // CHECK: call {{.*}}<2 x i64> @llvm.ctlz.v2i64(<2 x i64> %{{.*}}, i1 false)
+ // CHECK: call {{.*}}<2 x i64> @llvm.ctlz.v2i64(<2 x i64> %{{.*}}, i1 true)
return _mm_lzcnt_epi64(__A);
}
+TEST_CONSTEXPR(match_v2di(_mm_lzcnt_epi64((__m128i)(__v2di){1, 2}), 63, 62));
+
__m128i test_mm_mask_lzcnt_epi64(__m128i __W, __mmask8 __U, __m128i __A) {
// CHECK-LABEL: test_mm_mask_lzcnt_epi64
- // CHECK: call {{.*}}<2 x i64> @llvm.ctlz.v2i64(<2 x i64> %{{.*}}, i1 false)
+ // CHECK: call {{.*}}<2 x i64> @llvm.ctlz.v2i64(<2 x i64> %{{.*}}, i1 true)
// CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}}
return _mm_mask_lzcnt_epi64(__W, __U, __A);
}
__m128i test_mm_maskz_lzcnt_epi64(__mmask8 __U, __m128i __A) {
// CHECK-LABEL: test_mm_maskz_lzcnt_epi64
- // CHECK: call {{.*}}<2 x i64> @llvm.ctlz.v2i64(<2 x i64> %{{.*}}, i1 false)
+ // CHECK: call {{.*}}<2 x i64> @llvm.ctlz.v2i64(<2 x i64> %{{.*}}, i1 true)
// CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}}
return _mm_maskz_lzcnt_epi64(__U, __A);
}
__m256i test_mm256_lzcnt_epi64(__m256i __A) {
// CHECK-LABEL: test_mm256_lzcnt_epi64
- // CHECK: call {{.*}}<4 x i64> @llvm.ctlz.v4i64(<4 x i64> %{{.*}}, i1 false)
+ // CHECK: call {{.*}}<4 x i64> @llvm.ctlz.v4i64(<4 x i64> %{{.*}}, i1 true)
return _mm256_lzcnt_epi64(__A);
}
+TEST_CONSTEXPR(match_v4di(_mm256_lzcnt_epi64((__m256i)(__v4di){1, 2, 4, 8}),
63, 62, 61, 60));
+
__m256i test_mm256_mask_lzcnt_epi64(__m256i __W, __mmask8 __U, __m256i __A) {
// CHECK-LABEL: test_mm256_mask_lzcnt_epi64
- // CHECK: call {{.*}}<4 x i64> @llvm.ctlz.v4i64(<4 x i64> %{{.*}}, i1 false)
+ // CHECK: call {{.*}}<4 x i64> @llvm.ctlz.v4i64(<4 x i64> %{{.*}}, i1 true)
// CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}}
return _mm256_mask_lzcnt_epi64(__W, __U, __A);
}
__m256i test_mm256_maskz_lzcnt_epi64(__mmask8 __U, __m256i __A) {
// CHECK-LABEL: test_mm256_maskz_lzcnt_epi64
- // CHECK: call {{.*}}<4 x i64> @llvm.ctlz.v4i64(<4 x i64> %{{.*}}, i1 false)
+ // CHECK: call {{.*}}<4 x i64> @llvm.ctlz.v4i64(<4 x i64> %{{.*}}, i1 true)
// CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}}
return _mm256_maskz_lzcnt_epi64(__U, __A);
}
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