llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT--> @llvm/pr-subscribers-backend-powerpc Author: Aditi Medhane (AditiRM) <details> <summary>Changes</summary> Support the following BCD format conversion builtins for PowerPC. - `__builtin_bcdshift` – Shifts a packed decimal value by a specified number of decimal digits. - `__builtin_bcdshiftround` – Shifts a packed decimal value by a specified number of decimal digits, with rounding applied. - `__builtin_bcdtruncate` –Truncates a packed decimal value to a specified number of digits. - `__builtin_bcdunsignedtruncate` – Truncates a packed decimal value and returns the result as an unsigned packed decimal. - `__builtin_bcdunsignedshift` – Shifts an unsigned packed decimal value by a specified number of digits. ## Prototypes ```c vector unsigned char __builtin_bcdshift(vector unsigned char, int, unsigned char); vector unsigned char __builtin_bcdshiftround(vector unsigned char, int, unsigned char); vector unsigned char __builtin_bcdtruncate(vector unsigned char, int, unsigned char); vector unsigned char __builtin_bcdunsignedtruncate(vector unsigned char, int); vector unsigned char __builtin_bcdunsignedshift(vector unsigned char, int); ``` ## Usage Details --- Full diff: https://github.com/llvm/llvm-project/pull/154715.diff 5 Files Affected: - (modified) clang/include/clang/Basic/BuiltinsPPC.def (+5) - (modified) clang/lib/Basic/Targets/PPC.cpp (+7) - (modified) clang/lib/Sema/SemaPPC.cpp (+4) - (modified) clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c (+56) - (modified) llvm/include/llvm/IR/IntrinsicsPowerPC.td (+27-2) ``````````diff diff --git a/clang/include/clang/Basic/BuiltinsPPC.def b/clang/include/clang/Basic/BuiltinsPPC.def index 79df84abd74f0..0e1789b507d5b 100644 --- a/clang/include/clang/Basic/BuiltinsPPC.def +++ b/clang/include/clang/Basic/BuiltinsPPC.def @@ -582,6 +582,11 @@ TARGET_BUILTIN(__builtin_ppc_bcdsub_p, "iiV16UcV16Uc", "", // P9 Binary-coded decimal (BCD) builtins. TARGET_BUILTIN(__builtin_ppc_bcdcopysign, "V16UcV16UcV16Uc", "", "power9-vector") TARGET_BUILTIN(__builtin_ppc_bcdsetsign, "V16UcV16UcUc", "t", "power9-vector") +TARGET_BUILTIN(__builtin_ppc_bcdshift, "V16UcV16UciUc", "t", "power9-vector") +TARGET_BUILTIN(__builtin_ppc_bcdshiftround, "V16UcV16UciUc", "t", "power9-vector") +TARGET_BUILTIN(__builtin_ppc_bcdtruncate, "V16UcV16UciUc", "t", "power9-vector") +TARGET_BUILTIN(__builtin_ppc_bcdunsignedtruncate, "V16UcV16Uci", "", "power9-vector") +TARGET_BUILTIN(__builtin_ppc_bcdunsignedshift, "V16UcV16Uci", "", "power9-vector") TARGET_BUILTIN(__builtin_ppc_national2packed, "V16UcV16UcUc", "t", "power9-vector") TARGET_BUILTIN(__builtin_ppc_packed2national, "V16UcV16Uc", "", "power9-vector") TARGET_BUILTIN(__builtin_ppc_packed2zoned, "V16UcV16UcUc", "t", "power9-vector") diff --git a/clang/lib/Basic/Targets/PPC.cpp b/clang/lib/Basic/Targets/PPC.cpp index a6e1ad10568bb..a37a68ad91724 100644 --- a/clang/lib/Basic/Targets/PPC.cpp +++ b/clang/lib/Basic/Targets/PPC.cpp @@ -91,6 +91,13 @@ bool PPCTargetInfo::handleTargetFeatures(std::vector<std::string> &Features, static void defineXLCompatMacros(MacroBuilder &Builder) { Builder.defineMacro("__builtin_bcdcopysign", "__builtin_ppc_bcdcopysign"); Builder.defineMacro("__builtin_bcdsetsign", "__builtin_ppc_bcdsetsign"); + Builder.defineMacro("__builtin_bcdshift", "__builtin_ppc_bcdshift"); + Builder.defineMacro("__builtin_bcdshiftround", "__builtin_ppc_bcdshiftround"); + Builder.defineMacro("__builtin_bcdtruncate", "__builtin_ppc_bcdtruncate"); + Builder.defineMacro("__builtin_bcdunsignedtruncate", + "__builtin_ppc_bcdunsignedtruncate"); + Builder.defineMacro("__builtin_bcdunsignedshift", + "__builtin_ppc_bcdunsignedshift"); Builder.defineMacro("__builtin_national2packed", "__builtin_ppc_national2packed"); Builder.defineMacro("__builtin_packed2national", diff --git a/clang/lib/Sema/SemaPPC.cpp b/clang/lib/Sema/SemaPPC.cpp index 46d7372dd056b..85b084e9e2f24 100644 --- a/clang/lib/Sema/SemaPPC.cpp +++ b/clang/lib/Sema/SemaPPC.cpp @@ -113,6 +113,10 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const TargetInfo &TI, case PPC::BI__builtin_ppc_packed2zoned: case PPC::BI__builtin_ppc_zoned2packed: return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1); + case PPC::BI__builtin_ppc_bcdshiftround: + case PPC::BI__builtin_ppc_bcdtruncate: + case PPC::BI__builtin_ppc_bcdshift: + return SemaRef.BuiltinConstantArgRange(TheCall, 2, 0, 1); case PPC::BI__builtin_altivec_crypto_vshasigmaw: case PPC::BI__builtin_altivec_crypto_vshasigmad: return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 1) || diff --git a/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c b/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c index 0aeb720e545ed..1698afa3b8b4f 100644 --- a/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c +++ b/clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c @@ -27,3 +27,59 @@ vector unsigned char test_bcdsetsign_imm0(vector unsigned char a) { vector unsigned char test_bcdsetsign_imm1(vector unsigned char a) { return __builtin_ppc_bcdsetsign(a, '\1'); } + +// CHECK-LABEL: test_bcdshift_imm0 +// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdshift(<16 x i8> %a, i32 %b, i32 0) +// CHECK-NEXT: ret <16 x i8> [[TMP0]] +vector unsigned char test_bcdshift_imm0(vector unsigned char a, int b, unsigned char c){ + return __builtin_ppc_bcdshift(a,b,'\0'); +} + +// CHECK-LABEL: test_bcdshift_imm1 +// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdshift(<16 x i8> %a, i32 %b, i32 1) +// CHECK-NEXT: ret <16 x i8> [[TMP0]] +vector unsigned char test_bcdshift_imm1(vector unsigned char a, int b, unsigned char c){ + return __builtin_ppc_bcdshift(a,b,'\1'); +} + +// CHECK-LABEL: test_bcdshiftround_imm0 +// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdshiftround(<16 x i8> %a, i32 %b, i32 0) +// CHECK-NEXT: ret <16 x i8> [[TMP0]] +vector unsigned char test_bcdshiftround_imm0(vector unsigned char a,int b, unsigned char c){ + return __builtin_ppc_bcdshiftround(a,b,'\0'); +} + +// CHECK-LABEL: test_bcdshiftround_imm1 +// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdshiftround(<16 x i8> %a, i32 %b, i32 1) +// CHECK-NEXT: ret <16 x i8> [[TMP0]] +vector unsigned char test_bcdshiftround_imm1(vector unsigned char a,int b, unsigned char c){ + return __builtin_ppc_bcdshiftround(a,b,'\1'); +} + +// CHECK-LABEL: test_bcdtruncate_imm0 +// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdtruncate(<16 x i8> %a, i32 %b, i32 0) +// CHECK-NEXT: ret <16 x i8> [[TMP0]] +vector unsigned char test_bcdtruncate_imm0(vector unsigned char a, int b, unsigned char c){ + return __builtin_ppc_bcdtruncate(a,b,'\0'); +} + +// CHECK-LABEL: test_bcdtruncate_imm1 +// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdtruncate(<16 x i8> %a, i32 %b, i32 1) +// CHECK-NEXT: ret <16 x i8> [[TMP0]] +vector unsigned char test_bcdtruncate_imm1(vector unsigned char a, int b, unsigned char c){ + return __builtin_ppc_bcdtruncate(a,b,'\1'); +} + +// CHECK-LABEL: test_bcdunsignedtruncate +// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdunsignedtruncate(<16 x i8> %a, i32 %b) +// CHECK-NEXT: ret <16 x i8> [[TMP0]] +vector unsigned char test_bcdunsignedtruncate(vector unsigned char a, int b) { + return __builtin_ppc_bcdunsignedtruncate(a, b); +} + +// CHECK-LABEL: test_bcdunsignedshift +// CHECK: [[TMP0:%.*]] = tail call <16 x i8> @llvm.ppc.bcdunsignedshift(<16 x i8> %a, i32 %b) +// CHECK-NEXT: ret <16 x i8> [[TMP0]] +vector unsigned char test_bcdunsignedshift(vector unsigned char a, int b){ + return __builtin_ppc_bcdunsignedshift(a,b); +} \ No newline at end of file diff --git a/llvm/include/llvm/IR/IntrinsicsPowerPC.td b/llvm/include/llvm/IR/IntrinsicsPowerPC.td index 94afa94bfb1ee..524dd90290311 100644 --- a/llvm/include/llvm/IR/IntrinsicsPowerPC.td +++ b/llvm/include/llvm/IR/IntrinsicsPowerPC.td @@ -680,8 +680,33 @@ let TargetPrefix = "ppc" in { // All intrinsics start with "llvm.ppc.". def int_ppc_bcdcopysign : ClangBuiltin<"__builtin_ppc_bcdcopysign">, DefaultAttrsIntrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v16i8_ty], [IntrNoMem]>; def int_ppc_bcdsetsign : ClangBuiltin<"__builtin_ppc_bcdsetsign">, - DefaultAttrsIntrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_i32_ty], - [IntrNoMem, ImmArg<ArgIndex<1>>]>; + DefaultAttrsIntrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_i32_ty], + [IntrNoMem, ImmArg<ArgIndex<1>>]>; + + def int_ppc_bcdshift : ClangBuiltin<"__builtin_ppc_bcdshift">, + DefaultAttrsIntrinsic< + [llvm_v16i8_ty], [llvm_v16i8_ty, llvm_i32_ty, llvm_i32_ty], + [IntrNoMem, ImmArg<ArgIndex<2>>]>; + + def int_ppc_bcdshiftround : ClangBuiltin<"__builtin_ppc_bcdshiftround">, + DefaultAttrsIntrinsic< + [llvm_v16i8_ty], [llvm_v16i8_ty, llvm_i32_ty, llvm_i32_ty], + [IntrNoMem, ImmArg<ArgIndex<2>>]>; + + def int_ppc_bcdtruncate : ClangBuiltin<"__builtin_ppc_bcdtruncate">, + DefaultAttrsIntrinsic< + [llvm_v16i8_ty], [llvm_v16i8_ty, llvm_i32_ty, llvm_i32_ty], + [IntrNoMem, ImmArg<ArgIndex<2>>]>; + + def int_ppc_bcdunsignedtruncate : ClangBuiltin<"__builtin_ppc_bcdunsignedtruncate">, + DefaultAttrsIntrinsic< + [llvm_v16i8_ty], [llvm_v16i8_ty, llvm_i32_ty], + [IntrNoMem]>; + + def int_ppc_bcdunsignedshift : ClangBuiltin<"__builtin_ppc_bcdunsignedshift">, + DefaultAttrsIntrinsic< + [llvm_v16i8_ty], [llvm_v16i8_ty, llvm_i32_ty], + [IntrNoMem]>; def int_ppc_bcdadd : ClangBuiltin<"__builtin_ppc_bcdadd">, DefaultAttrsIntrinsic< `````````` </details> https://github.com/llvm/llvm-project/pull/154715 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
