Author: Simon Tatham Date: 2025-07-22T08:53:45+01:00 New Revision: 34f59d79209268eca9c63ccc7646128f2dc52fe3
URL: https://github.com/llvm/llvm-project/commit/34f59d79209268eca9c63ccc7646128f2dc52fe3 DIFF: https://github.com/llvm/llvm-project/commit/34f59d79209268eca9c63ccc7646128f2dc52fe3.diff LOG: [Clang][ARM] Fix __ARM_FEATURE_LDREX on Armv8-M (#149538) The Armv8-M architecture doesn't have the LDREXD and STREXD instructions, for exclusive load/store of a 64-bit quantity split across two registers. But the `__ARM_FEATURE_LDREX` macro was set to a value that claims it does, because the case for Armv8 was missing a check for M profile. The Armv7 case got it right, so I've just made the two cases the same. Added: Modified: clang/lib/Basic/Targets/ARM.cpp clang/test/Preprocessor/arm-acle-6.4.c Removed: ################################################################################ diff --git a/clang/lib/Basic/Targets/ARM.cpp b/clang/lib/Basic/Targets/ARM.cpp index 7ff8e51f8a7f8..29de34bbc4fe4 100644 --- a/clang/lib/Basic/Targets/ARM.cpp +++ b/clang/lib/Basic/Targets/ARM.cpp @@ -623,13 +623,15 @@ bool ARMTargetInfo::handleTargetFeatures(std::vector<std::string> &Features, LDREX = LDREX_W; break; case 7: + case 8: if (ArchProfile == llvm::ARM::ProfileKind::M) LDREX = LDREX_W | LDREX_H | LDREX_B; else LDREX = LDREX_D | LDREX_W | LDREX_H | LDREX_B; break; - case 8: case 9: + assert(ArchProfile != llvm::ARM::ProfileKind::M && + "No Armv9-M architectures defined"); LDREX = LDREX_D | LDREX_W | LDREX_H | LDREX_B; } diff --git a/clang/test/Preprocessor/arm-acle-6.4.c b/clang/test/Preprocessor/arm-acle-6.4.c index 2c8f4868263a6..48deba74c8ab2 100644 --- a/clang/test/Preprocessor/arm-acle-6.4.c +++ b/clang/test/Preprocessor/arm-acle-6.4.c @@ -188,6 +188,37 @@ // RUN: %clang --target=arm-arm-none-eabi -mcpu=cortex-m33 -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-M-DSP // RUN: %clang --target=arm-arm-none-eabi -march=armv8m.main+dsp -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-M-DSP +// RUN: %clang -target arm-none-linux-eabi -march=armv8m.base -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-V8M-BASE + +// CHECK-V8M-BASE-NOT: __ARM_ARCH_ISA_ARM +// CHECK-V8M-BASE-NOT: __ARM_FEATURE_DSP +// CHECK-V8M-BASE-NOT: __ARM_FEATURE_SIMD32 +// CHECK-V8M-BASE: __ARM_ARCH 8 +// CHECK-V8M-BASE: __ARM_ARCH_ISA_THUMB 1 +// CHECK-V8M-BASE: __ARM_ARCH_PROFILE 'M' +// CHECK-V8M-BASE: __ARM_FEATURE_CLZ 1 +// CHECK-V8M-BASE: __ARM_FEATURE_IDIV 1 +// CHECK-V8M-BASE: __ARM_FEATURE_LDREX 0x7 +// CHECK-V8M-BASE: __ARM_FEATURE_QBIT 1 +// CHECK-V8M-BASE: __ARM_FEATURE_SAT +// CHECK-V8M-BASE-NOT: __ARM_FEATURE_UNALIGNED + +// RUN: %clang -target arm-none-linux-eabi -march=armv8m.main -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-V8M-MAIN +// RUN: %clang -target arm-none-linux-eabi -march=armv8.1m.main -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-V8M-MAIN + +// CHECK-V8M-MAIN-NOT: __ARM_ARCH_ISA_ARM +// CHECK-V8M-MAIN-NOT: __ARM_FEATURE_DSP +// CHECK-V8M-MAIN-NOT: __ARM_FEATURE_SIMD32 +// CHECK-V8M-MAIN: __ARM_ARCH 8 +// CHECK-V8M-MAIN: __ARM_ARCH_ISA_THUMB 2 +// CHECK-V8M-MAIN: __ARM_ARCH_PROFILE 'M' +// CHECK-V8M-MAIN: __ARM_FEATURE_CLZ 1 +// CHECK-V8M-MAIN: __ARM_FEATURE_IDIV 1 +// CHECK-V8M-MAIN: __ARM_FEATURE_LDREX 0x7 +// CHECK-V8M-MAIN: __ARM_FEATURE_QBIT 1 +// CHECK-V8M-MAIN: __ARM_FEATURE_SAT 1 +// CHECK-V8M-MAIN: __ARM_FEATURE_UNALIGNED 1 + // CHECK-M-DSP: __ARM_FEATURE_DSP 1 // CHECK-M-DSP: __ARM_FEATURE_SIMD32 1 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
