https://github.com/Varnike updated https://github.com/llvm/llvm-project/pull/137101
>From 1b3f48acc5a409648fa0ec374c16411df754ce6d Mon Sep 17 00:00:00 2001 From: Erik Enikeev <evonatar...@gmail.com> Date: Mon, 9 Jun 2025 12:08:15 -0400 Subject: [PATCH 1/2] Added support for FENV_ACCESS pragma on hard-float ARM platforms. Also changes were made to clang/test/Parser/pragma-fp-warn.c so that for thumbv7a only the soft-float-abi target case is checked. --- clang/lib/Basic/Targets/ARM.cpp | 2 ++ clang/test/Parser/pragma-fp-warn.c | 2 +- 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/clang/lib/Basic/Targets/ARM.cpp b/clang/lib/Basic/Targets/ARM.cpp index 65d4ed1e96540..ec86d41833c9b 100644 --- a/clang/lib/Basic/Targets/ARM.cpp +++ b/clang/lib/Basic/Targets/ARM.cpp @@ -362,6 +362,8 @@ ARMTargetInfo::ARMTargetInfo(const llvm::Triple &Triple, : "\01mcount"; SoftFloatABI = llvm::is_contained(Opts.FeaturesAsWritten, "+soft-float-abi"); + if (!SoftFloatABI) + HasStrictFP = true; } StringRef ARMTargetInfo::getABI() const { return ABI; } diff --git a/clang/test/Parser/pragma-fp-warn.c b/clang/test/Parser/pragma-fp-warn.c index c52bd4e4805ab..f743cb87997dc 100644 --- a/clang/test/Parser/pragma-fp-warn.c +++ b/clang/test/Parser/pragma-fp-warn.c @@ -1,6 +1,6 @@ // RUN: %clang_cc1 -triple wasm32 -fsyntax-only -Wno-unknown-pragmas -Wignored-pragmas -verify %s -// RUN: %clang_cc1 -triple thumbv7 -fsyntax-only -Wno-unknown-pragmas -Wignored-pragmas -verify %s +// RUN: %clang_cc1 -triple thumbv7 -fsyntax-only -target-feature +soft-float-abi -Wno-unknown-pragmas -Wignored-pragmas -verify %s // RUN: %clang_cc1 -DEXPOK -triple aarch64 -fsyntax-only -Wno-unknown-pragmas -Wignored-pragmas -verify %s // RUN: %clang_cc1 -DEXPOK -triple x86_64 -fsyntax-only -Wno-unknown-pragmas -Wignored-pragmas -verify %s // RUN: %clang_cc1 -DEXPOK -triple systemz -fsyntax-only -Wno-unknown-pragmas -Wignored-pragmas -verify %s >From 0231231d5c373f2e4e5b42a59e8e1fc39388b61f Mon Sep 17 00:00:00 2001 From: Erik Enikeev <evonatar...@gmail.com> Date: Mon, 9 Jun 2025 11:11:52 -0400 Subject: [PATCH 2/2] Enable STRICT_FDIV support for ARM --- llvm/lib/Target/ARM/ARMISelLowering.cpp | 4 ++++ llvm/lib/Target/ARM/ARMInstrVFP.td | 12 ++++++------ 2 files changed, 10 insertions(+), 6 deletions(-) diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp index fb72bab03e750..c875a7ddd4430 100644 --- a/llvm/lib/Target/ARM/ARMISelLowering.cpp +++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp @@ -882,6 +882,10 @@ ARMTargetLowering::ARMTargetLowering(const TargetMachine &TM_, } if (Subtarget->hasNEON()) { + // STRICT_FDIV is legal for f32 and f64 + setOperationAction(ISD::STRICT_FDIV, MVT::f32, Legal); + setOperationAction(ISD::STRICT_FDIV, MVT::f64, Legal); + // The same with v4f32. But keep in mind that vadd, vsub, vmul are natively // supported for v4f32. setOperationAction(ISD::FSQRT, MVT::v4f32, Expand); diff --git a/llvm/lib/Target/ARM/ARMInstrVFP.td b/llvm/lib/Target/ARM/ARMInstrVFP.td index 31650e0137beb..e52c586bd8088 100644 --- a/llvm/lib/Target/ARM/ARMInstrVFP.td +++ b/llvm/lib/Target/ARM/ARMInstrVFP.td @@ -485,25 +485,25 @@ def VSUBH : AHbI<0b11100, 0b11, 1, 0, [(set (f16 HPR:$Sd), (fsub (f16 HPR:$Sn), (f16 HPR:$Sm)))]>, Sched<[WriteFPALU32]>; -let TwoOperandAliasConstraint = "$Dn = $Dd" in +let TwoOperandAliasConstraint = "$Dn = $Dd", mayRaiseFPException = 1, Uses = [FPSCR] in def VDIVD : ADbI<0b11101, 0b00, 0, 0, (outs DPR:$Dd), (ins DPR:$Dn, DPR:$Dm), IIC_fpDIV64, "vdiv", ".f64\t$Dd, $Dn, $Dm", - [(set DPR:$Dd, (fdiv DPR:$Dn, (f64 DPR:$Dm)))]>, + [(set DPR:$Dd, (any_fdiv DPR:$Dn, (f64 DPR:$Dm)))]>, Sched<[WriteFPDIV64]>; -let TwoOperandAliasConstraint = "$Sn = $Sd" in +let TwoOperandAliasConstraint = "$Sn = $Sd", mayRaiseFPException = 1, Uses = [FPSCR] in def VDIVS : ASbI<0b11101, 0b00, 0, 0, (outs SPR:$Sd), (ins SPR:$Sn, SPR:$Sm), IIC_fpDIV32, "vdiv", ".f32\t$Sd, $Sn, $Sm", - [(set SPR:$Sd, (fdiv SPR:$Sn, SPR:$Sm))]>, + [(set SPR:$Sd, (any_fdiv SPR:$Sn, SPR:$Sm))]>, Sched<[WriteFPDIV32]>; -let TwoOperandAliasConstraint = "$Sn = $Sd" in +let TwoOperandAliasConstraint = "$Sn = $Sd", mayRaiseFPException = 1, Uses = [FPSCR] in def VDIVH : AHbI<0b11101, 0b00, 0, 0, (outs HPR:$Sd), (ins HPR:$Sn, HPR:$Sm), IIC_fpDIV16, "vdiv", ".f16\t$Sd, $Sn, $Sm", - [(set (f16 HPR:$Sd), (fdiv (f16 HPR:$Sn), (f16 HPR:$Sm)))]>, + [(set (f16 HPR:$Sd), (any_fdiv (f16 HPR:$Sn), (f16 HPR:$Sm)))]>, Sched<[WriteFPDIV32]>; let TwoOperandAliasConstraint = "$Dn = $Dd" in _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits