https://github.com/topperc updated https://github.com/llvm/llvm-project/pull/148321
>From 9521bd783966635f3219ac02e3fe43ed33294546 Mon Sep 17 00:00:00 2001 From: Craig Topper <craig.top...@sifive.com> Date: Fri, 11 Jul 2025 17:42:49 -0700 Subject: [PATCH 1/2] [RISCV] Add -march=unset to cancel and ignore a previous -march. -mcpu is used to determine the ISA string if an explicit -march is not present on the command line. If there is a -march present it always has priority over -mcpu regardless of where it appears in the command line. This can cause issues if -march appears in a Makefile and a user wants to override it with an -mcpu on the command line. The user would need to provide a potentially long ISA string to -march that matches the -mcpu in order to override the MakeFile. This issue also shows up on Compiler Explorer where the rv64gc toolchain is passed -march=rv64gc before any user command line options are added. This patch adds a new option for -march, "unset" that makes the -march ignored for purposes of prioritizing over -mcpu. Now a user can write -march=unset -mcpu=<cpu_name>. This is also implemented by gcc for ARM32. An alternative would be to allow -march to take a cpu name, but that requires "-march=<cpu_name> -mcpu=<cpu_name>" or "-march=<cpu_name> -mcpu=<cpu_name>" to ensure the tune cpu also gets updated. IMHO, needing to repeat the CPU name twice isn't friendly and invites mistakes. More discussion here https://github.com/riscv-non-isa/riscv-toolchain-conventions/issues/88 I won't merge this until we reach consensus there. --- clang/lib/Driver/ToolChains/Arch/RISCV.cpp | 11 +++++++---- clang/test/Driver/riscv-cpus.c | 5 +++++ 2 files changed, 12 insertions(+), 4 deletions(-) diff --git a/clang/lib/Driver/ToolChains/Arch/RISCV.cpp b/clang/lib/Driver/ToolChains/Arch/RISCV.cpp index baa2c8c0bcfb2..76dde0da8e849 100644 --- a/clang/lib/Driver/ToolChains/Arch/RISCV.cpp +++ b/clang/lib/Driver/ToolChains/Arch/RISCV.cpp @@ -273,9 +273,12 @@ std::string riscv::getRISCVArch(const llvm::opt::ArgList &Args, // Clang does not yet support MULTILIB_REUSE, so we use `rv{XLEN}imafdc` // instead of `rv{XLEN}gc` though they are (currently) equivalent. - // 1. If `-march=` is specified, use it. - if (const Arg *A = Args.getLastArg(options::OPT_march_EQ)) - return A->getValue(); + // 1. If `-march=` is specified, use it unless the value is "unset". + if (const Arg *A = Args.getLastArg(options::OPT_march_EQ)) { + StringRef MArch = A->getValue(); + if (MArch != "unset") + return MArch.str(); + } // 2. Get march (isa string) based on `-mcpu=` if (const Arg *A = Args.getLastArg(options::OPT_mcpu_EQ)) { @@ -300,7 +303,7 @@ std::string riscv::getRISCVArch(const llvm::opt::ArgList &Args, StringRef MArch = llvm::RISCV::getMArchFromMcpu(CPU); // Bypass if target cpu's default march is empty. - if (MArch != "") + if (!MArch.empty()) return MArch.str(); } diff --git a/clang/test/Driver/riscv-cpus.c b/clang/test/Driver/riscv-cpus.c index d32d1c1a8183f..661bacce5d22f 100644 --- a/clang/test/Driver/riscv-cpus.c +++ b/clang/test/Driver/riscv-cpus.c @@ -403,6 +403,11 @@ // MCPU-MARCH: "-nostdsysteminc" "-target-cpu" "sifive-e31" "-target-feature" "+m" "-target-feature" "+c" // MCPU-MARCH: "-target-abi" "ilp32" +// march=unset erases previous march +// RUN: %clang --target=riscv32 -### -c %s 2>&1 -march=rv32imc -march=unset -mcpu=sifive-e31 | FileCheck -check-prefix=MARCH-UNSET %s +// MARCH-UNSET: "-nostdsysteminc" "-target-cpu" "sifive-e31" "-target-feature" "+m" "-target-feature" "+a" "-target-feature" "+c" +// MARCH-UNSET: "-target-abi" "ilp32" + // Check interaction between mcpu and mtune, mtune won't affect arch related // target feature, but mcpu will. // >From 07f13625e5b2b97b2e037b1560100b8556bfbd9a Mon Sep 17 00:00:00 2001 From: Craig Topper <craig.top...@sifive.com> Date: Fri, 11 Jul 2025 18:02:23 -0700 Subject: [PATCH 2/2] fixup! Add release note. --- clang/docs/ReleaseNotes.rst | 3 +++ 1 file changed, 3 insertions(+) diff --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst index e81a3d4976cf8..6891f7c72b3c7 100644 --- a/clang/docs/ReleaseNotes.rst +++ b/clang/docs/ReleaseNotes.rst @@ -1082,6 +1082,9 @@ RISC-V Support - Add support for the `__builtin_riscv_pause()` intrinsic from the `Zihintpause` extension. +- Add `-march=unset` to clear any previous `-march=` value. This ISA string will + be computed from `-mcpu` or the platform default. + CUDA/HIP Language Changes ^^^^^^^^^^^^^^^^^^^^^^^^^ _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
