https://github.com/tomershafir updated 
https://github.com/llvm/llvm-project/pull/146896

>From 10e9d8f141c0a31ecc189b3365d5d18c65c7ae4b Mon Sep 17 00:00:00 2001
From: tomershafir <tomer.shaf...@gmail.com>
Date: Thu, 3 Jul 2025 16:53:26 +0300
Subject: [PATCH 1/2] [Clang][AArch64] Remove redundant tune args to the
 backend

This change removes unnecessary tune args to the AArch64 backend. The AArch64 
backend automatically handles `tune-cpu` and adds the necessary features based 
on the models from TableGen.

It follows this fix: https://github.com/llvm/llvm-project/pull/146260 where 
updating a subtarget feature didn't fail the frontend test because both the 
toolchain and the test suffered from a coordinated error.
---
 clang/lib/Driver/ToolChains/Arch/AArch64.cpp     | 11 -----------
 .../test/Preprocessor/aarch64-target-features.c  | 16 ++++++++--------
 lld/test/MachO/icf-safe-thunks-dwarf.ll          |  4 ++--
 lld/test/MachO/icf-safe-thunks.ll                |  4 ++--
 .../CodeGen/AArch64/GlobalISel/inline-memcpy.mir |  2 +-
 .../AArch64/GlobalISel/inline-memmove.mir        |  2 +-
 .../CodeGen/AArch64/GlobalISel/inline-memset.mir |  2 +-
 .../AArch64/lr-reserved-for-ra-live-in.ll        |  2 +-
 llvm/test/CodeGen/AArch64/memsize-remarks.ll     |  4 ++--
 llvm/test/DebugInfo/debug_frame_symbol.ll        |  2 +-
 .../AddressSanitizer/calls-only-smallfn.ll       |  2 +-
 .../AddressSanitizer/calls-only.ll               |  2 +-
 .../Util/trivial-auto-var-init-crash-20210521.ll |  2 +-
 .../llvm-dwarfdump/AArch64/template_ref_ptr.ll   |  2 +-
 .../macho-gsym-callsite-info-obj.test            |  6 +++---
 15 files changed, 26 insertions(+), 37 deletions(-)

diff --git a/clang/lib/Driver/ToolChains/Arch/AArch64.cpp 
b/clang/lib/Driver/ToolChains/Arch/AArch64.cpp
index 343a18b9ca2ea..4f45c369c83db 100644
--- a/clang/lib/Driver/ToolChains/Arch/AArch64.cpp
+++ b/clang/lib/Driver/ToolChains/Arch/AArch64.cpp
@@ -163,17 +163,6 @@ getAArch64MicroArchFeaturesFromMtune(const Driver &D, 
StringRef Mtune,
   if (!DecodeAArch64Mcpu(D, MtuneLowerCase, Tune, Extensions))
     return false;
 
-  // Handle CPU name is 'native'.
-  if (MtuneLowerCase == "native")
-    MtuneLowerCase = std::string(llvm::sys::getHostCPUName());
-
-  // 'cyclone' and later have zero-cycle register moves and zeroing.
-  if (MtuneLowerCase == "cyclone" ||
-      StringRef(MtuneLowerCase).starts_with("apple")) {
-    Features.push_back("+zcm-gpr64");
-    Features.push_back("+zcz");
-  }
-
   return true;
 }
 
diff --git a/clang/test/Preprocessor/aarch64-target-features.c 
b/clang/test/Preprocessor/aarch64-target-features.c
index 6700153b79795..d7201207db572 100644
--- a/clang/test/Preprocessor/aarch64-target-features.c
+++ b/clang/test/Preprocessor/aarch64-target-features.c
@@ -316,7 +316,7 @@
 
 // ================== Check whether -mtune accepts mixed-case features.
 // RUN: %clang -target aarch64 -mtune=CYCLONE -### -c %s 2>&1 | FileCheck 
-check-prefix=CHECK-MTUNE-CYCLONE %s
-// CHECK-MTUNE-CYCLONE: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" 
"-target-feature" "+zcm-gpr64" "-target-feature" "+zcz" "-target-feature" "+v8a"
+// CHECK-MTUNE-CYCLONE: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" 
"-target-feature" "+v8a"
 
 // RUN: %clang -target aarch64 -mcpu=apple-a7 -### -c %s 2>&1 | FileCheck 
-check-prefix=CHECK-MCPU-APPLE-A7 %s
 // RUN: %clang -target aarch64 -mcpu=apple-a8 -### -c %s 2>&1 | FileCheck 
-check-prefix=CHECK-MCPU-APPLE-A7 %s
@@ -342,12 +342,12 @@
 // RUN: %clang -target aarch64 -mcpu=thunderx2t99 -### -c %s 2>&1 | FileCheck 
-check-prefix=CHECK-MCPU-THUNDERX2T99 %s
 // RUN: %clang -target aarch64 -mcpu=a64fx -### -c %s 2>&1 | FileCheck 
-check-prefix=CHECK-MCPU-A64FX %s
 // RUN: %clang -target aarch64 -mcpu=carmel -### -c %s 2>&1 | FileCheck 
-check-prefix=CHECK-MCPU-CARMEL %s
-// CHECK-MCPU-APPLE-A7: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" 
"-target-feature" "+zcm-gpr64" "-target-feature" "+zcz" "-target-feature" 
"+v8a" "-target-feature" "+aes" "-target-feature" "+fp-armv8" "-target-feature" 
"+neon" "-target-feature" "+perfmon" "-target-feature" "+sha2"
-// CHECK-MCPU-APPLE-A10: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" 
"-target-feature" "+zcm-gpr64" "-target-feature" "+zcz" "-target-feature" 
"+v8a" "-target-feature" "+aes" "-target-feature" "+crc" "-target-feature" 
"+fp-armv8" "-target-feature" "+lor" "-target-feature" "+neon" 
"-target-feature" "+pan" "-target-feature" "+perfmon" "-target-feature" "+rdm" 
"-target-feature" "+sha2" "-target-feature" "+vh"
-// CHECK-MCPU-APPLE-A11: "-cc1"{{.*}} "-triple" 
"aarch64{{.*}}"{{.*}}"-target-feature" "+zcm-gpr64" "-target-feature" "+zcz" 
"-target-feature" "+v8.2a" "-target-feature" "+aes" "-target-feature" "+crc" 
"-target-feature" "+fp-armv8" "-target-feature" "+fullfp16" "-target-feature" 
"+lse" "-target-feature" "+neon" "-target-feature" "+perfmon" "-target-feature" 
"+ras" "-target-feature" "+rdm" "-target-feature" "+sha2"
-// CHECK-MCPU-APPLE-A12: "-cc1"{{.*}} "-triple" "aarch64"{{.*}} 
"-target-feature" "+zcm-gpr64" "-target-feature" "+zcz" "-target-feature" 
"+v8.3a" "-target-feature" "+aes" "-target-feature" "+complxnum" 
"-target-feature" "+crc" "-target-feature" "+fp-armv8" "-target-feature" 
"+fullfp16" "-target-feature" "+jsconv" "-target-feature" "+lse" 
"-target-feature" "+neon" "-target-feature" "+pauth" "-target-feature" 
"+perfmon" "-target-feature" "+ras" "-target-feature" "+rcpc" "-target-feature" 
"+rdm" "-target-feature" "+sha2"
+// CHECK-MCPU-APPLE-A7: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" 
"-target-feature" "+v8a" "-target-feature" "+aes" "-target-feature" "+fp-armv8" 
"-target-feature" "+neon" "-target-feature" "+perfmon" "-target-feature" "+sha2"
+// CHECK-MCPU-APPLE-A10: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" 
"-target-feature" "+v8a" "-target-feature" "+aes" "-target-feature" "+crc" 
"-target-feature" "+fp-armv8" "-target-feature" "+lor" "-target-feature" 
"+neon" "-target-feature" "+pan" "-target-feature" "+perfmon" "-target-feature" 
"+rdm" "-target-feature" "+sha2" "-target-feature" "+vh"
+// CHECK-MCPU-APPLE-A11: "-cc1"{{.*}} "-triple" "aarch64{{.*}}"{{.*}} 
"-target-feature" "+v8.2a" "-target-feature" "+aes" "-target-feature" "+crc" 
"-target-feature" "+fp-armv8" "-target-feature" "+fullfp16" "-target-feature" 
"+lse" "-target-feature" "+neon" "-target-feature" "+perfmon" "-target-feature" 
"+ras" "-target-feature" "+rdm" "-target-feature" "+sha2"
+// CHECK-MCPU-APPLE-A12: "-cc1"{{.*}} "-triple" "aarch64"{{.*}} 
"-target-feature" "+v8.3a" "-target-feature" "+aes" "-target-feature" 
"+complxnum" "-target-feature" "+crc" "-target-feature" "+fp-armv8" 
"-target-feature" "+fullfp16" "-target-feature" "+jsconv" "-target-feature" 
"+lse" "-target-feature" "+neon" "-target-feature" "+pauth" "-target-feature" 
"+perfmon" "-target-feature" "+ras" "-target-feature" "+rcpc" "-target-feature" 
"+rdm" "-target-feature" "+sha2"
 // CHECK-MCPU-A34: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" 
"+aes" "-target-feature" "+crc" "-target-feature" "+fp-armv8" "-target-feature" 
"+neon" "-target-feature" "+perfmon" "-target-feature" "+sha2"
-// CHECK-MCPU-APPLE-A13: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" 
"-target-feature" "+zcm-gpr64" "-target-feature" "+zcz" "-target-feature" 
"+v8.4a" "-target-feature" "+aes" "-target-feature" "+complxnum" 
"-target-feature" "+crc" "-target-feature" "+dotprod" "-target-feature" 
"+fp-armv8" "-target-feature" "+fp16fml" "-target-feature" "+fullfp16" 
"-target-feature" "+jsconv" "-target-feature" "+lse" "-target-feature" "+neon" 
"-target-feature" "+pauth" "-target-feature" "+perfmon" "-target-feature" 
"+ras" "-target-feature" "+rcpc" "-target-feature" "+rdm" "-target-feature" 
"+sha2" "-target-feature" "+sha3"
+// CHECK-MCPU-APPLE-A13: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" 
"-target-feature" "+v8.4a" "-target-feature" "+aes" "-target-feature" 
"+complxnum" "-target-feature" "+crc" "-target-feature" "+dotprod" 
"-target-feature" "+fp-armv8" "-target-feature" "+fp16fml" "-target-feature" 
"+fullfp16" "-target-feature" "+jsconv" "-target-feature" "+lse" 
"-target-feature" "+neon" "-target-feature" "+pauth" "-target-feature" 
"+perfmon" "-target-feature" "+ras" "-target-feature" "+rcpc" "-target-feature" 
"+rdm" "-target-feature" "+sha2" "-target-feature" "+sha3"
 // CHECK-MCPU-A35: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" 
"+v8a" "-target-feature" "+aes" "-target-feature" "+crc" "-target-feature" 
"+fp-armv8" "-target-feature" "+neon" "-target-feature" "+perfmon" 
"-target-feature" "+sha2"
 // CHECK-MCPU-A53: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" 
"+v8a" "-target-feature" "+aes" "-target-feature" "+crc" "-target-feature" 
"+fp-armv8" "-target-feature" "+neon" "-target-feature" "+perfmon" 
"-target-feature" "+sha2"
 // CHECK-MCPU-A57: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" 
"+v8a" "-target-feature" "+aes" "-target-feature" "+crc" "-target-feature" 
"+fp-armv8" "-target-feature" "+neon" "-target-feature" "+perfmon" 
"-target-feature" "+sha2"
@@ -362,10 +362,10 @@
 // CHECK-MCPU-CARMEL: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" 
"+v8.2a" "-target-feature" "+aes" "-target-feature" "+crc" "-target-feature" 
"+fp-armv8" "-target-feature" "+fullfp16" "-target-feature" "+lse" 
"-target-feature" "+neon" "-target-feature" "+ras" "-target-feature" "+rdm" 
"-target-feature" "+sha2"
 
 // RUN: %clang -target x86_64-apple-macosx -arch arm64 -### -c %s 2>&1 | 
FileCheck --check-prefix=CHECK-ARCH-ARM64 %s
-// CHECK-ARCH-ARM64: "-target-cpu" "apple-m1" "-target-feature" "+zcm-gpr64" 
"-target-feature" "+zcz" "-target-feature" "+v8.4a" "-target-feature" "+aes" 
"-target-feature" "+altnzcv" "-target-feature" "+ccdp" "-target-feature" 
"+ccpp" "-target-feature" "+complxnum" "-target-feature" "+crc" 
"-target-feature" "+dotprod" "-target-feature" "+flagm" "-target-feature" 
"+fp-armv8" "-target-feature" "+fp16fml" "-target-feature" "+fptoint" 
"-target-feature" "+fullfp16" "-target-feature" "+jsconv" "-target-feature" 
"+lse" "-target-feature" "+neon" "-target-feature" "+pauth" "-target-feature" 
"+perfmon" "-target-feature" "+predres" "-target-feature" "+ras" 
"-target-feature" "+rcpc" "-target-feature" "+rdm" "-target-feature" "+sb" 
"-target-feature" "+sha2" "-target-feature" "+sha3" "-target-feature" 
"+specrestrict" "-target-feature" "+ssbs"
+// CHECK-ARCH-ARM64: "-target-cpu" "apple-m1" "-target-feature" "+v8.4a" 
"-target-feature" "+aes" "-target-feature" "+altnzcv" "-target-feature" "+ccdp" 
"-target-feature" "+ccpp" "-target-feature" "+complxnum" "-target-feature" 
"+crc" "-target-feature" "+dotprod" "-target-feature" "+flagm" 
"-target-feature" "+fp-armv8" "-target-feature" "+fp16fml" "-target-feature" 
"+fptoint" "-target-feature" "+fullfp16" "-target-feature" "+jsconv" 
"-target-feature" "+lse" "-target-feature" "+neon" "-target-feature" "+pauth" 
"-target-feature" "+perfmon" "-target-feature" "+predres" "-target-feature" 
"+ras" "-target-feature" "+rcpc" "-target-feature" "+rdm" "-target-feature" 
"+sb" "-target-feature" "+sha2" "-target-feature" "+sha3" "-target-feature" 
"+specrestrict" "-target-feature" "+ssbs"
 
 // RUN: %clang -target x86_64-apple-macosx -arch arm64_32 -### -c %s 2>&1 | 
FileCheck --check-prefix=CHECK-ARCH-ARM64_32 %s
-// CHECK-ARCH-ARM64_32: "-target-cpu" "apple-s4" "-target-feature" 
"+zcm-gpr64" "-target-feature" "+zcz" "-target-feature" "+v8.3a" 
"-target-feature" "+aes" "-target-feature" "+complxnum" "-target-feature" 
"+crc" "-target-feature" "+fp-armv8" "-target-feature" "+fullfp16" 
"-target-feature" "+jsconv" "-target-feature" "+lse" "-target-feature" "+neon" 
"-target-feature" "+pauth" "-target-feature" "+perfmon" "-target-feature" 
"+ras" "-target-feature" "+rcpc" "-target-feature" "+rdm" "-target-feature" 
"+sha2"
+// CHECK-ARCH-ARM64_32: "-target-cpu" "apple-s4" "-target-feature" "+v8.3a" 
"-target-feature" "+aes" "-target-feature" "+complxnum" "-target-feature" 
"+crc" "-target-feature" "+fp-armv8" "-target-feature" "+fullfp16" 
"-target-feature" "+jsconv" "-target-feature" "+lse" "-target-feature" "+neon" 
"-target-feature" "+pauth" "-target-feature" "+perfmon" "-target-feature" 
"+ras" "-target-feature" "+rcpc" "-target-feature" "+rdm" "-target-feature" 
"+sha2"
 
 // RUN: %clang -target aarch64 -march=armv8-a+fp+simd+crc+crypto -### -c %s 
2>&1 | FileCheck -check-prefix=CHECK-MARCH-1 %s
 // RUN: %clang -target aarch64 
-march=armv8-a+nofp+nosimd+nocrc+nocrypto+fp+simd+crc+crypto -### -c %s 2>&1 | 
FileCheck -check-prefix=CHECK-MARCH-1 %s
diff --git a/lld/test/MachO/icf-safe-thunks-dwarf.ll 
b/lld/test/MachO/icf-safe-thunks-dwarf.ll
index 84019d3aa1654..7fae4124f793b 100644
--- a/lld/test/MachO/icf-safe-thunks-dwarf.ll
+++ b/lld/test/MachO/icf-safe-thunks-dwarf.ll
@@ -186,7 +186,7 @@ entry:
   ret i64 add (i64 add (i64 ptrtoint (ptr @func_A to i64), i64 ptrtoint (ptr 
@func_B to i64)), i64 ptrtoint (ptr @func_C to i64)), !dbg !27
 }
 
-attributes #0 = { mustprogress nofree noinline norecurse nosync nounwind ssp 
willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" 
"no-trapping-math"="true" "stack-protector-buffer-size"="8" 
"target-cpu"="apple-m1" 
"target-features"="+aes,+altnzcv,+ccdp,+ccidx,+ccpp,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8a,+zcm-gpr64,+zcz"
 }
+attributes #0 = { mustprogress nofree noinline norecurse nosync nounwind ssp 
willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" 
"no-trapping-math"="true" "stack-protector-buffer-size"="8" 
"target-cpu"="apple-m1" 
"target-features"="+aes,+altnzcv,+ccdp,+ccidx,+ccpp,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8a"
 }
 
 !llvm.dbg.cu = !{!0}
 !llvm.module.flags = !{!6, !7, !8, !9, !10, !11}
@@ -254,7 +254,7 @@ entry:
   ret i64 add (i64 add (i64 ptrtoint (ptr @func_D to i64), i64 ptrtoint (ptr 
@func_E to i64)), i64 ptrtoint (ptr @func_F to i64)), !dbg !27
 }
 
-attributes #0 = { mustprogress nofree noinline norecurse nosync nounwind ssp 
willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" 
"no-trapping-math"="true" "stack-protector-buffer-size"="8" 
"target-cpu"="apple-m1" 
"target-features"="+aes,+altnzcv,+ccdp,+ccidx,+ccpp,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8a,+zcm-gpr64,+zcz"
 }
+attributes #0 = { mustprogress nofree noinline norecurse nosync nounwind ssp 
willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" 
"no-trapping-math"="true" "stack-protector-buffer-size"="8" 
"target-cpu"="apple-m1" 
"target-features"="+aes,+altnzcv,+ccdp,+ccidx,+ccpp,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8a"
 }
 
 !llvm.dbg.cu = !{!0}
 !llvm.module.flags = !{!6, !7, !8, !9, !10, !11}
diff --git a/lld/test/MachO/icf-safe-thunks.ll 
b/lld/test/MachO/icf-safe-thunks.ll
index b5b9b7ebeac27..12f1e81bdf3e8 100644
--- a/lld/test/MachO/icf-safe-thunks.ll
+++ b/lld/test/MachO/icf-safe-thunks.ll
@@ -244,8 +244,8 @@ define void @take_func_addr() local_unnamed_addr #0 {
   ret void
 }
 
-attributes #0 = { mustprogress nofree noinline norecurse nounwind ssp 
memory(readwrite, argmem: none) uwtable(sync) "frame-pointer"="non-leaf" 
"no-trapping-math"="true" "stack-protector-buffer-size"="8" 
"target-cpu"="apple-m1" 
"target-features"="+aes,+altnzcv,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8a,+zcm-gpr64,+zcz"
 }
-attributes #1 = { mustprogress nofree noinline norecurse nounwind ssp 
uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" 
"stack-protector-buffer-size"="8" "target-cpu"="apple-m1" 
"target-features"="+aes,+altnzcv,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8a,+zcm-gpr64,+zcz"
 }
+attributes #0 = { mustprogress nofree noinline norecurse nounwind ssp 
memory(readwrite, argmem: none) uwtable(sync) "frame-pointer"="non-leaf" 
"no-trapping-math"="true" "stack-protector-buffer-size"="8" 
"target-cpu"="apple-m1" 
"target-features"="+aes,+altnzcv,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8a"
 }
+attributes #1 = { mustprogress nofree noinline norecurse nounwind ssp 
uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" 
"stack-protector-buffer-size"="8" "target-cpu"="apple-m1" 
"target-features"="+aes,+altnzcv,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8a"
 }
 
 !llvm.module.flags = !{!0, !1, !2, !3}
 
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/inline-memcpy.mir 
b/llvm/test/CodeGen/AArch64/GlobalISel/inline-memcpy.mir
index 34c5e793307d0..b21046d6049e8 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/inline-memcpy.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/inline-memcpy.mir
@@ -56,7 +56,7 @@
   }
 
 
-  attributes #0 = { nounwind ssp uwtable 
"correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" 
"less-precise-fpmad"="false" "min-legal-vector-width"="0" "frame-pointer"="all" 
"no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" 
"no-signed-zeros-fp-math"="false" "no-trapping-math"="false" 
"stack-protector-buffer-size"="8" "target-cpu"="cyclone" 
"target-features"="+aes,+crypto,+fp-armv8,+neon,+sha2,+zcm-gpr64,+zcz" 
"unsafe-fp-math"="false" "use-soft-float"="false" }
+  attributes #0 = { nounwind ssp uwtable 
"correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" 
"less-precise-fpmad"="false" "min-legal-vector-width"="0" "frame-pointer"="all" 
"no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" 
"no-signed-zeros-fp-math"="false" "no-trapping-math"="false" 
"stack-protector-buffer-size"="8" "target-cpu"="cyclone" 
"target-features"="+aes,+crypto,+fp-armv8,+neon,+sha2" "unsafe-fp-math"="false" 
"use-soft-float"="false" }
   attributes #1 = { argmemonly nounwind }
   attributes #2 = { optsize }
   attributes #3 = { minsize }
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/inline-memmove.mir 
b/llvm/test/CodeGen/AArch64/GlobalISel/inline-memmove.mir
index f4ce702eee14b..57d031dcd53c0 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/inline-memmove.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/inline-memmove.mir
@@ -47,7 +47,7 @@
     ret void
   }
 
-  attributes #0 = { nounwind ssp uwtable 
"correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" 
"less-precise-fpmad"="false" "min-legal-vector-width"="0" "frame-pointer"="all" 
"no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" 
"no-signed-zeros-fp-math"="false" "no-trapping-math"="false" 
"stack-protector-buffer-size"="8" "target-cpu"="cyclone" 
"target-features"="+aes,+crypto,+fp-armv8,+neon,+sha2,+zcm-gpr64,+zcz" 
"unsafe-fp-math"="false" "use-soft-float"="false" }
+  attributes #0 = { nounwind ssp uwtable 
"correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" 
"less-precise-fpmad"="false" "min-legal-vector-width"="0" "frame-pointer"="all" 
"no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" 
"no-signed-zeros-fp-math"="false" "no-trapping-math"="false" 
"stack-protector-buffer-size"="8" "target-cpu"="cyclone" 
"target-features"="+aes,+crypto,+fp-armv8,+neon,+sha2" "unsafe-fp-math"="false" 
"use-soft-float"="false" }
   attributes #1 = { argmemonly nounwind }
 
 ...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/inline-memset.mir 
b/llvm/test/CodeGen/AArch64/GlobalISel/inline-memset.mir
index df8e939020c92..f8d2bf387ffc9 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/inline-memset.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/inline-memset.mir
@@ -50,7 +50,7 @@
 
   declare void @llvm.stackprotector(ptr, ptr) #2
 
-  attributes #0 = { nounwind ssp uwtable 
"correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" 
"less-precise-fpmad"="false" "min-legal-vector-width"="0" "frame-pointer"="all" 
"no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" 
"no-signed-zeros-fp-math"="false" "no-trapping-math"="false" 
"stack-protector-buffer-size"="8" "target-cpu"="cyclone" 
"target-features"="+aes,+crypto,+fp-armv8,+neon,+sha2,+zcm-gpr64,+zcz" 
"unsafe-fp-math"="false" "use-soft-float"="false" }
+  attributes #0 = { nounwind ssp uwtable 
"correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" 
"less-precise-fpmad"="false" "min-legal-vector-width"="0" "frame-pointer"="all" 
"no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" 
"no-signed-zeros-fp-math"="false" "no-trapping-math"="false" 
"stack-protector-buffer-size"="8" "target-cpu"="cyclone" 
"target-features"="+aes,+crypto,+fp-armv8,+neon,+sha2" "unsafe-fp-math"="false" 
"use-soft-float"="false" }
   attributes #1 = { argmemonly nounwind }
 
 ...
diff --git a/llvm/test/CodeGen/AArch64/lr-reserved-for-ra-live-in.ll 
b/llvm/test/CodeGen/AArch64/lr-reserved-for-ra-live-in.ll
index 0b50f55de4d3b..29427146e8a43 100644
--- a/llvm/test/CodeGen/AArch64/lr-reserved-for-ra-live-in.ll
+++ b/llvm/test/CodeGen/AArch64/lr-reserved-for-ra-live-in.ll
@@ -53,5 +53,5 @@ bb2:                                              ; preds = 
%bb1, %bb
   ret i32 %phi
 }
 
-attributes #1 = { minsize nounwind 
"target-features"="+aes,+crc,+fp-armv8,+fullfp16,+lse,+neon,+ras,+rcpc,+rdm,+reserve-lr-for-ra,+sha2,+v8.1a,+v8.2a,+v8.3a,+v8a,+zcm-gpr64,+zcz"
 }
+attributes #1 = { minsize nounwind 
"target-features"="+aes,+crc,+fp-armv8,+fullfp16,+lse,+neon,+ras,+rcpc,+rdm,+reserve-lr-for-ra,+sha2,+v8.1a,+v8.2a,+v8.3a,+v8a"
 }
 
diff --git a/llvm/test/CodeGen/AArch64/memsize-remarks.ll 
b/llvm/test/CodeGen/AArch64/memsize-remarks.ll
index 2518b8199a2c1..f256389c7349e 100644
--- a/llvm/test/CodeGen/AArch64/memsize-remarks.ll
+++ b/llvm/test/CodeGen/AArch64/memsize-remarks.ll
@@ -315,8 +315,8 @@ bb:
   ret void
 }
 
-attributes #0 = { noinline nounwind ssp uwtable "frame-pointer"="non-leaf" 
"min-legal-vector-width"="0" "no-trapping-math"="true" 
"stack-protector-buffer-size"="8" "target-cpu"="apple-a7" 
"target-features"="+aes,+crypto,+fp-armv8,+neon,+sha2,+zcm-gpr64,+zcz" }
-attributes #1 = { nounwind "frame-pointer"="non-leaf" 
"no-trapping-math"="true" "stack-protector-buffer-size"="8" 
"target-cpu"="apple-a7" 
"target-features"="+aes,+crypto,+fp-armv8,+neon,+sha2,+zcm-gpr64,+zcz" }
+attributes #0 = { noinline nounwind ssp uwtable "frame-pointer"="non-leaf" 
"min-legal-vector-width"="0" "no-trapping-math"="true" 
"stack-protector-buffer-size"="8" "target-cpu"="apple-a7" 
"target-features"="+aes,+crypto,+fp-armv8,+neon,+sha2" }
+attributes #1 = { nounwind "frame-pointer"="non-leaf" 
"no-trapping-math"="true" "stack-protector-buffer-size"="8" 
"target-cpu"="apple-a7" "target-features"="+aes,+crypto,+fp-armv8,+neon,+sha2" }
 attributes #2 = { nofree nosync nounwind readnone speculatable willreturn }
 attributes #3 = { argmemonly nofree nosync nounwind willreturn }
 attributes #4 = { nounwind }
diff --git a/llvm/test/DebugInfo/debug_frame_symbol.ll 
b/llvm/test/DebugInfo/debug_frame_symbol.ll
index 33cb37723e043..0789ee371fdac 100644
--- a/llvm/test/DebugInfo/debug_frame_symbol.ll
+++ b/llvm/test/DebugInfo/debug_frame_symbol.ll
@@ -22,7 +22,7 @@ entry:
   ret void, !dbg !12
 }
 
-attributes #0 = { noinline nounwind optnone ssp "frame-pointer"="non-leaf" 
"no-builtins" "no-trapping-math"="true" "stack-protector-buffer-size"="8" 
"target-cpu"="apple-m1" 
"target-features"="+aes,+crc,+dotprod,+fp-armv8,+fp16fml,+fullfp16,+lse,+neon,+ras,+rcpc,+rdm,+sha2,+sha3,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8a,+zcm-gpr64,+zcz"
 }
+attributes #0 = { noinline nounwind optnone ssp "frame-pointer"="non-leaf" 
"no-builtins" "no-trapping-math"="true" "stack-protector-buffer-size"="8" 
"target-cpu"="apple-m1" 
"target-features"="+aes,+crc,+dotprod,+fp-armv8,+fp16fml,+fullfp16,+lse,+neon,+ras,+rcpc,+rdm,+sha2,+sha3,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8a"
 }
 
 !llvm.dbg.cu = !{!0}
 !llvm.module.flags = !{!2, !3, !4, !5, !6}
diff --git a/llvm/test/Instrumentation/AddressSanitizer/calls-only-smallfn.ll 
b/llvm/test/Instrumentation/AddressSanitizer/calls-only-smallfn.ll
index c3906aed1a397..0859a7ebb4b08 100644
--- a/llvm/test/Instrumentation/AddressSanitizer/calls-only-smallfn.ll
+++ b/llvm/test/Instrumentation/AddressSanitizer/calls-only-smallfn.ll
@@ -24,5 +24,5 @@ entry:
   store i8 2, ptr %arrayidx1, align 1
   ret void
 }
-attributes #0 = { noinline nounwind optnone sanitize_address ssp uwtable(sync) 
"frame-pointer"="non-leaf" "min-legal-vector-width"="0" 
"no-trapping-math"="true" "stack-protector-buffer-size"="8" 
"target-cpu"="apple-m1" 
"target-features"="+aes,+crc,+crypto,+dotprod,+fp-armv8,+fp16fml,+fullfp16,+lse,+neon,+ras,+rcpc,+rdm,+sha2,+sha3,+sm4,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8a,+zcm-gpr64,+zcz"
 }
+attributes #0 = { noinline nounwind optnone sanitize_address ssp uwtable(sync) 
"frame-pointer"="non-leaf" "min-legal-vector-width"="0" 
"no-trapping-math"="true" "stack-protector-buffer-size"="8" 
"target-cpu"="apple-m1" 
"target-features"="+aes,+crc,+crypto,+dotprod,+fp-armv8,+fp16fml,+fullfp16,+lse,+neon,+ras,+rcpc,+rdm,+sha2,+sha3,+sm4,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8a"
 }
 
diff --git a/llvm/test/Instrumentation/AddressSanitizer/calls-only.ll 
b/llvm/test/Instrumentation/AddressSanitizer/calls-only.ll
index 1f4769b315876..5f122ad3bdb84 100644
--- a/llvm/test/Instrumentation/AddressSanitizer/calls-only.ll
+++ b/llvm/test/Instrumentation/AddressSanitizer/calls-only.ll
@@ -51,5 +51,5 @@ entry:
 ; CHECK-NOT:  store i64 -723401728380766731, ptr %126, align 1
   ret void
 }
-attributes #0 = { noinline nounwind optnone sanitize_address ssp uwtable(sync) 
"frame-pointer"="non-leaf" "min-legal-vector-width"="0" 
"no-trapping-math"="true" "stack-protector-buffer-size"="8" 
"target-cpu"="apple-m1" 
"target-features"="+aes,+crc,+crypto,+dotprod,+fp-armv8,+fp16fml,+fullfp16,+lse,+neon,+ras,+rcpc,+rdm,+sha2,+sha3,+sm4,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8a,+zcm-gpr64,+zcz"
 }
+attributes #0 = { noinline nounwind optnone sanitize_address ssp uwtable(sync) 
"frame-pointer"="non-leaf" "min-legal-vector-width"="0" 
"no-trapping-math"="true" "stack-protector-buffer-size"="8" 
"target-cpu"="apple-m1" 
"target-features"="+aes,+crc,+crypto,+dotprod,+fp-armv8,+fp16fml,+fullfp16,+lse,+neon,+ras,+rcpc,+rdm,+sha2,+sha3,+sm4,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8a"
 }
 
diff --git a/llvm/test/Transforms/Util/trivial-auto-var-init-crash-20210521.ll 
b/llvm/test/Transforms/Util/trivial-auto-var-init-crash-20210521.ll
index 111a4ec355db2..38752ac4ff571 100644
--- a/llvm/test/Transforms/Util/trivial-auto-var-init-crash-20210521.ll
+++ b/llvm/test/Transforms/Util/trivial-auto-var-init-crash-20210521.ll
@@ -23,7 +23,7 @@ bb:
 declare void @llvm.dbg.value(metadata, metadata, metadata) #2
 
 attributes #0 = { argmemonly nofree nosync nounwind willreturn }
-attributes #1 = { 
"target-features"="+aes,+crypto,+fp-armv8,+neon,+sha2,+zcm-gpr64,+zcz" }
+attributes #1 = { "target-features"="+aes,+crypto,+fp-armv8,+neon,+sha2" }
 attributes #2 = { nofree nosync nounwind readnone speculatable willreturn }
 attributes #3 = { nounwind }
 
diff --git a/llvm/test/tools/llvm-dwarfdump/AArch64/template_ref_ptr.ll 
b/llvm/test/tools/llvm-dwarfdump/AArch64/template_ref_ptr.ll
index e0984837c5c18..9a2d0a52d9757 100644
--- a/llvm/test/tools/llvm-dwarfdump/AArch64/template_ref_ptr.ll
+++ b/llvm/test/tools/llvm-dwarfdump/AArch64/template_ref_ptr.ll
@@ -31,7 +31,7 @@ entry:
   ret i32 0, !dbg !31
 }
 
-attributes #0 = { mustprogress noinline norecurse nounwind optnone ssp 
uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" 
"stack-protector-buffer-size"="8" "target-cpu"="apple-m1" 
"target-features"="+aes,+altnzcv,+ccdp,+complxnum,+crc,+dotprod,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8a,+zcm-gpr64,+zcz"
 }
+attributes #0 = { mustprogress noinline norecurse nounwind optnone ssp 
uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" 
"stack-protector-buffer-size"="8" "target-cpu"="apple-m1" 
"target-features"="+aes,+altnzcv,+ccdp,+complxnum,+crc,+dotprod,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8a"
 }
 
 !llvm.module.flags = !{!18, !19, !20, !21, !22, !23, !24}
 !llvm.dbg.cu = !{!2}
diff --git 
a/llvm/test/tools/llvm-gsymutil/ARM_AArch64/macho-gsym-callsite-info-obj.test 
b/llvm/test/tools/llvm-gsymutil/ARM_AArch64/macho-gsym-callsite-info-obj.test
index 2f83629406174..6023b99702e20 100644
--- 
a/llvm/test/tools/llvm-gsymutil/ARM_AArch64/macho-gsym-callsite-info-obj.test
+++ 
b/llvm/test/tools/llvm-gsymutil/ARM_AArch64/macho-gsym-callsite-info-obj.test
@@ -167,9 +167,9 @@ entry:
   ret i32 0, !dbg !60
 }
 
-attributes #0 = { minsize mustprogress nofree noinline norecurse nounwind 
optsize ssp memory(readwrite, argmem: none) "frame-pointer"="non-leaf" 
"no-trapping-math"="true" "stack-protector-buffer-size"="8" 
"target-cpu"="apple-m1" 
"target-features"="+aes,+altnzcv,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8a,+zcm-gpr64,+zcz"
 }
-attributes #1 = { minsize mustprogress noinline nounwind optsize ssp 
"frame-pointer"="non-leaf" "no-trapping-math"="true" 
"stack-protector-buffer-size"="8" "target-cpu"="apple-m1" 
"target-features"="+aes,+altnzcv,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8a,+zcm-gpr64,+zcz"
 }
-attributes #2 = { minsize mustprogress norecurse nounwind optsize ssp 
"frame-pointer"="non-leaf" "no-trapping-math"="true" 
"stack-protector-buffer-size"="8" "target-cpu"="apple-m1" 
"target-features"="+aes,+altnzcv,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8a,+zcm-gpr64,+zcz"
 }
+attributes #0 = { minsize mustprogress nofree noinline norecurse nounwind 
optsize ssp memory(readwrite, argmem: none) "frame-pointer"="non-leaf" 
"no-trapping-math"="true" "stack-protector-buffer-size"="8" 
"target-cpu"="apple-m1" 
"target-features"="+aes,+altnzcv,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8a"
 }
+attributes #1 = { minsize mustprogress noinline nounwind optsize ssp 
"frame-pointer"="non-leaf" "no-trapping-math"="true" 
"stack-protector-buffer-size"="8" "target-cpu"="apple-m1" 
"target-features"="+aes,+altnzcv,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8a"
 }
+attributes #2 = { minsize mustprogress norecurse nounwind optsize ssp 
"frame-pointer"="non-leaf" "no-trapping-math"="true" 
"stack-protector-buffer-size"="8" "target-cpu"="apple-m1" 
"target-features"="+aes,+altnzcv,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8a"
 }
 attributes #3 = { minsize optsize }
 attributes #4 = { minsize nounwind optsize }
 

>From 583ce2071145c8d1b9ca10d0df470340c3ace6c4 Mon Sep 17 00:00:00 2001
From: tomershafir <tomer.shaf...@gmail.com>
Date: Fri, 4 Jul 2025 13:00:24 +0300
Subject: [PATCH 2/2] [Clang][AArch64] Simplify getAArch64MicroArchFeatures*

---
 clang/lib/Driver/ToolChains/Arch/AArch64.cpp | 13 +++++--------
 1 file changed, 5 insertions(+), 8 deletions(-)

diff --git a/clang/lib/Driver/ToolChains/Arch/AArch64.cpp 
b/clang/lib/Driver/ToolChains/Arch/AArch64.cpp
index 4f45c369c83db..0f27c4a4212f4 100644
--- a/clang/lib/Driver/ToolChains/Arch/AArch64.cpp
+++ b/clang/lib/Driver/ToolChains/Arch/AArch64.cpp
@@ -156,28 +156,25 @@ static bool
 getAArch64MicroArchFeaturesFromMtune(const Driver &D, StringRef Mtune,
                                      const ArgList &Args,
                                      std::vector<StringRef> &Features) {
-  std::string MtuneLowerCase = Mtune.lower();
   // Check CPU name is valid, but ignore any extensions on it.
+  std::string MtuneLowerCase = Mtune.lower();
   llvm::AArch64::ExtensionSet Extensions;
   StringRef Tune;
-  if (!DecodeAArch64Mcpu(D, MtuneLowerCase, Tune, Extensions))
-    return false;
-
-  return true;
+  return !DecodeAArch64Mcpu(D, MtuneLowerCase, Tune, Extensions);
 }
 
 static bool
 getAArch64MicroArchFeaturesFromMcpu(const Driver &D, StringRef Mcpu,
                                     const ArgList &Args,
                                     std::vector<StringRef> &Features) {
-  StringRef CPU;
   // Check CPU name is valid, but ignore any extensions on it.
-  llvm::AArch64::ExtensionSet DecodedFeature;
   std::string McpuLowerCase = Mcpu.lower();
+  llvm::AArch64::ExtensionSet DecodedFeature;
+  StringRef CPU;
   if (!DecodeAArch64Mcpu(D, McpuLowerCase, CPU, DecodedFeature))
     return false;
 
-  return getAArch64MicroArchFeaturesFromMtune(D, CPU, Args, Features);
+  return getAArch64MicroArchFeaturesFromMtune(D, Mcpu, Args, Features);
 }
 
 void aarch64::getAArch64TargetFeatures(const Driver &D,

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