djtodoro wrote: > How are we going to verify the correctness? Does qemu support big-endian > riscv64?
Good question. We have an initial support for it developed internally inside MIPS, for both qemu and Linux kernel, but team from Codethink is trying to upstream similar effort already, so please check it here https://gitlab.com/CodethinkLabs/riscv_bigendian. I am not sure how we merged Big Endian support for RISC-V in GNU GCC, but we should have agreed on convention first I think (effort initiated at https://github.com/riscv-non-isa/riscv-elf-psabi-doc/pull/470.) https://github.com/llvm/llvm-project/pull/146534 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
