llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT--> @llvm/pr-subscribers-clang Author: None (Ami-zhang) <details> <summary>Changes</summary> This patch makes determining alignment and width of BitInt to be target ABI specific and makes it consistent with [Procedure Call Standard for the LoongArch™ Architecture] for LoongArch target (https://github.com/loongson/la-abi-specs/blob/release/lapcs.adoc). --- Full diff: https://github.com/llvm/llvm-project/pull/145297.diff 3 Files Affected: - (modified) clang/lib/Basic/Targets/LoongArch.h (+1) - (added) clang/test/CodeGen/LoongArch/bitint-large.c (+36) - (modified) clang/test/CodeGen/ext-int-cc.c (+6-6) ``````````diff diff --git a/clang/lib/Basic/Targets/LoongArch.h b/clang/lib/Basic/Targets/LoongArch.h index 4c7b53abfef9b..36c5b17b65fe0 100644 --- a/clang/lib/Basic/Targets/LoongArch.h +++ b/clang/lib/Basic/Targets/LoongArch.h @@ -56,6 +56,7 @@ class LLVM_LIBRARY_VISIBILITY LoongArchTargetInfo : public TargetInfo { SuitableAlign = 128; WCharType = SignedInt; WIntType = UnsignedInt; + BitIntMaxAlign = 128; } bool setCPU(const std::string &Name) override { diff --git a/clang/test/CodeGen/LoongArch/bitint-large.c b/clang/test/CodeGen/LoongArch/bitint-large.c new file mode 100644 index 0000000000000..8dfbc62d46799 --- /dev/null +++ b/clang/test/CodeGen/LoongArch/bitint-large.c @@ -0,0 +1,36 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 5 +// RUN: %clang_cc1 -triple loongarch64 -fexperimental-max-bitint-width=1024 -emit-llvm %s -o - | FileCheck %s + +void pass_large_BitInt(_BitInt(129)); + +// CHECK-LABEL: define dso_local void @example_BitInt( +// CHECK-SAME: ) #[[ATTR0:[0-9]+]] { +// CHECK-NEXT: [[ENTRY:.*:]] +// CHECK-NEXT: [[L:%.*]] = alloca i256, align 16 +// CHECK-NEXT: [[BYVAL_TEMP:%.*]] = alloca i256, align 16 +// CHECK-NEXT: store i256 0, ptr [[L]], align 16 +// CHECK-NEXT: [[TMP0:%.*]] = load i256, ptr [[L]], align 16 +// CHECK-NEXT: [[LOADEDV:%.*]] = trunc i256 [[TMP0]] to i129 +// CHECK-NEXT: [[STOREDV:%.*]] = sext i129 [[LOADEDV]] to i256 +// CHECK-NEXT: store i256 [[STOREDV]], ptr [[BYVAL_TEMP]], align 16 +// CHECK-NEXT: call void @pass_large_BitInt(ptr noundef [[BYVAL_TEMP]]) +// CHECK-NEXT: ret void +// +void example_BitInt(void) { + _BitInt(129) l = {0}; + pass_large_BitInt(l); +} + +// CHECK-LABEL: define dso_local void @return_large_BitInt( +// CHECK-SAME: ptr dead_on_unwind noalias writable sret(i256) align 16 [[AGG_RESULT:%.*]]) #[[ATTR0]] { +// CHECK-NEXT: [[ENTRY:.*:]] +// CHECK-NEXT: [[RESULT_PTR:%.*]] = alloca ptr, align 8 +// CHECK-NEXT: store ptr [[AGG_RESULT]], ptr [[RESULT_PTR]], align 8 +// CHECK-NEXT: store i256 0, ptr [[AGG_RESULT]], align 16 +// CHECK-NEXT: [[TMP0:%.*]] = load i256, ptr [[AGG_RESULT]], align 16 +// CHECK-NEXT: [[LOADEDV:%.*]] = trunc i256 [[TMP0]] to i129 +// CHECK-NEXT: [[STOREDV:%.*]] = sext i129 [[LOADEDV]] to i256 +// CHECK-NEXT: store i256 [[STOREDV]], ptr [[AGG_RESULT]], align 16 +// CHECK-NEXT: ret void +// +_BitInt(129) return_large_BitInt(void) { return 0; } diff --git a/clang/test/CodeGen/ext-int-cc.c b/clang/test/CodeGen/ext-int-cc.c index 14efd54e24ffb..55d4c438eedad 100644 --- a/clang/test/CodeGen/ext-int-cc.c +++ b/clang/test/CodeGen/ext-int-cc.c @@ -27,8 +27,8 @@ // RUN: %clang_cc1 -no-enable-noundef-analysis -triple arm64_32-apple-ios -O3 -disable-llvm-passes -fexperimental-max-bitint-width=1024 -emit-llvm -o - %s | FileCheck %s --check-prefixes=AARCH64 // RUN: %clang_cc1 -no-enable-noundef-analysis -triple arm64_32-apple-ios -target-abi darwinpcs -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=AARCH64DARWIN // RUN: %clang_cc1 -no-enable-noundef-analysis -triple arm -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=ARM -// RUN: %clang_cc1 -no-enable-noundef-analysis -triple loongarch64 -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=LA64 -// RUN: %clang_cc1 -no-enable-noundef-analysis -triple loongarch32 -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=LA32 +// RUN: %clang_cc1 -no-enable-noundef-analysis -triple loongarch64 -O3 -disable-llvm-passes -fexperimental-max-bitint-width=1024 -emit-llvm -o - %s | FileCheck %s --check-prefixes=LA64 +// RUN: %clang_cc1 -no-enable-noundef-analysis -triple loongarch32 -O3 -disable-llvm-passes -fexperimental-max-bitint-width=1024 -emit-llvm -o - %s | FileCheck %s --check-prefixes=LA32 // Make sure 128 and 64 bit versions are passed like integers. void ParamPassing(_BitInt(128) b, _BitInt(64) c) {} @@ -158,8 +158,8 @@ void ParamPassing4(_BitInt(129) a) {} // PPC32-NOT: define{{.*}} void @ParamPassing4(ptr byval(i129) align 8 %{{.+}}) // AARCH64DARWIN-NOT: define{{.*}} void @ParamPassing4(ptr byval(i129) align 8 %{{.+}}) // ARM-NOT: define{{.*}} arm_aapcscc void @ParamPassing4(ptr byval(i129) align 8 %{{.+}}) -// LA64-NOT: define{{.*}} void @ParamPassing4(ptr %{{.+}}) -// LA32-NOT: define{{.*}} void @ParamPassing4(ptr %{{.+}}) +// LA64: define{{.*}} void @ParamPassing4(ptr %{{.+}}) +// LA32: define{{.*}} void @ParamPassing4(ptr %{{.+}}) #endif _BitInt(63) ReturnPassing(void) { return 0; } @@ -317,8 +317,8 @@ _BitInt(129) ReturnPassing5(void) { return 0; } // PPC32-NOT: define{{.*}} void @ReturnPassing5(ptr dead_on_unwind noalias writable sret // AARCH64DARWIN-NOT: define{{.*}} void @ReturnPassing5(ptr dead_on_unwind noalias writable sret // ARM-NOT: define{{.*}} arm_aapcscc void @ReturnPassing5(ptr dead_on_unwind noalias writable sret -// LA64-NOT: define{{.*}} void @ReturnPassing5(ptr dead_on_unwind noalias writable sret -// LA32-NOT: define{{.*}} void @ReturnPassing5(ptr dead_on_unwind noalias writable sret +// LA64: define{{.*}} void @ReturnPassing5(ptr dead_on_unwind noalias writable sret +// LA32: define{{.*}} void @ReturnPassing5(ptr dead_on_unwind noalias writable sret // SparcV9 is odd in that it has a return-size limit of 256, not 128 or 64 // like other platforms, so test to make sure this behavior will still work. `````````` </details> https://github.com/llvm/llvm-project/pull/145297 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
