llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT--> @llvm/pr-subscribers-clang @llvm/pr-subscribers-clang-codegen Author: Alex Voicu (AlexVlx) <details> <summary>Changes</summary> The `supportsLibCall` predicate is used to select whether some math builtins get expanded in the FE or they get lowered into libcalls. The default implementation unconditionally returns true, which is problematic for AMDGCN-flavoured SPIRV, as AMDGPU does not support any libcalls at the moment. This change overrides the predicate in order to reflect this and correctly do the expected FE expansion when targeting AMDGCN-flavoured SPIRV. --- Patch is 70.83 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/143814.diff 2 Files Affected: - (modified) clang/lib/CodeGen/Targets/SPIR.cpp (+4) - (modified) clang/test/CodeGen/logb_scalbn.c (+873) ``````````diff diff --git a/clang/lib/CodeGen/Targets/SPIR.cpp b/clang/lib/CodeGen/Targets/SPIR.cpp index 2f1e43cdc8cc3..ebf983c15282b 100644 --- a/clang/lib/CodeGen/Targets/SPIR.cpp +++ b/clang/lib/CodeGen/Targets/SPIR.cpp @@ -75,6 +75,10 @@ class SPIRVTargetCodeGenInfo : public CommonSPIRTargetCodeGenInfo { SyncScope Scope, llvm::AtomicOrdering Ordering, llvm::LLVMContext &Ctx) const override; + bool supportsLibCall() const override { + return + getABIInfo().getTarget().getTriple().getVendor() != llvm::Triple::AMD; + } }; inline StringRef mapClangSyncScopeToLLVM(SyncScope Scope) { diff --git a/clang/test/CodeGen/logb_scalbn.c b/clang/test/CodeGen/logb_scalbn.c index be5e68b5fd4b0..52c52bcb292be 100644 --- a/clang/test/CodeGen/logb_scalbn.c +++ b/clang/test/CodeGen/logb_scalbn.c @@ -4,6 +4,11 @@ // RUN: %clang -cc1 -triple amdgcn-amd-amdhsa -o - -ffp-exception-behavior=strict -emit-llvm %s | FileCheck %s -check-prefixes=STRICT // RUN: %clang -cc1 -triple amdgcn-amd-amdhsa -o - -ffp-exception-behavior=maytrap -emit-llvm %s | FileCheck %s -check-prefixes=MAYTRAP // RUN: %clang -cc1 -triple amdgcn-amd-amdhsa -o - -fmath-errno -emit-llvm %s | FileCheck %s -check-prefixes=ERRNO +// RUN: %clang -cc1 -triple spirv64-amd-amdhsa -o - -emit-llvm %s | FileCheck %s -check-prefixes=AMDGCNSPIRV-DEFAULT +// RUN: %clang -cc1 -triple spirv64-amd-amdhsa -o - -ffp-exception-behavior=ignore -emit-llvm %s | FileCheck %s -check-prefixes=AMDGCNSPIRV-IGNORE +// RUN: %clang -cc1 -triple spirv64-amd-amdhsa -o - -ffp-exception-behavior=strict -emit-llvm %s | FileCheck %s -check-prefixes=AMDGCNSPIRV-STRICT +// RUN: %clang -cc1 -triple spirv64-amd-amdhsa -o - -ffp-exception-behavior=maytrap -emit-llvm %s | FileCheck %s -check-prefixes=AMDGCNSPIRV-MAYTRAP +// RUN: %clang -cc1 -triple spirv64-amd-amdhsa -o - -fmath-errno -emit-llvm %s | FileCheck %s -check-prefixes=AMDGCNSPIRV-ERRNO // DEFAULT-LABEL: define dso_local void @test_logbf( // DEFAULT-SAME: ) #[[ATTR0:[0-9]+]] { @@ -78,6 +83,79 @@ // ERRNO-NEXT: store float [[CALL]], ptr [[D1_ASCAST]], align 4 // ERRNO-NEXT: ret void // +// AMDGCNSPIRV-DEFAULT-LABEL: define spir_func void @test_logbf( +// AMDGCNSPIRV-DEFAULT-SAME: ) addrspace(4) #[[ATTR0:[0-9]+]] { +// AMDGCNSPIRV-DEFAULT-NEXT: [[ENTRY:.*:]] +// AMDGCNSPIRV-DEFAULT-NEXT: [[D1:%.*]] = alloca float, align 4 +// AMDGCNSPIRV-DEFAULT-NEXT: [[D1_ASCAST:%.*]] = addrspacecast ptr [[D1]] to ptr addrspace(4) +// AMDGCNSPIRV-DEFAULT-NEXT: [[TMP0:%.*]] = call addrspace(4) { float, i32 } @llvm.frexp.f32.i32(float 0x40301999A0000000) +// AMDGCNSPIRV-DEFAULT-NEXT: [[TMP1:%.*]] = extractvalue { float, i32 } [[TMP0]], 1 +// AMDGCNSPIRV-DEFAULT-NEXT: [[TMP2:%.*]] = add nsw i32 [[TMP1]], -1 +// AMDGCNSPIRV-DEFAULT-NEXT: [[TMP3:%.*]] = sitofp i32 [[TMP2]] to float +// AMDGCNSPIRV-DEFAULT-NEXT: [[TMP4:%.*]] = call addrspace(4) float @llvm.fabs.f32(float 0x40301999A0000000) +// AMDGCNSPIRV-DEFAULT-NEXT: [[TMP5:%.*]] = fcmp one float [[TMP4]], 0x7FF0000000000000 +// AMDGCNSPIRV-DEFAULT-NEXT: [[TMP6:%.*]] = select i1 [[TMP5]], float [[TMP3]], float [[TMP4]] +// AMDGCNSPIRV-DEFAULT-NEXT: [[TMP7:%.*]] = select i1 false, float 0xFFF0000000000000, float [[TMP6]] +// AMDGCNSPIRV-DEFAULT-NEXT: store float [[TMP7]], ptr addrspace(4) [[D1_ASCAST]], align 4 +// AMDGCNSPIRV-DEFAULT-NEXT: ret void +// +// AMDGCNSPIRV-IGNORE-LABEL: define spir_func void @test_logbf( +// AMDGCNSPIRV-IGNORE-SAME: ) addrspace(4) #[[ATTR0:[0-9]+]] { +// AMDGCNSPIRV-IGNORE-NEXT: [[ENTRY:.*:]] +// AMDGCNSPIRV-IGNORE-NEXT: [[D1:%.*]] = alloca float, align 4 +// AMDGCNSPIRV-IGNORE-NEXT: [[D1_ASCAST:%.*]] = addrspacecast ptr [[D1]] to ptr addrspace(4) +// AMDGCNSPIRV-IGNORE-NEXT: [[TMP0:%.*]] = call addrspace(4) { float, i32 } @llvm.frexp.f32.i32(float 0x40301999A0000000) +// AMDGCNSPIRV-IGNORE-NEXT: [[TMP1:%.*]] = extractvalue { float, i32 } [[TMP0]], 1 +// AMDGCNSPIRV-IGNORE-NEXT: [[TMP2:%.*]] = add nsw i32 [[TMP1]], -1 +// AMDGCNSPIRV-IGNORE-NEXT: [[TMP3:%.*]] = sitofp i32 [[TMP2]] to float +// AMDGCNSPIRV-IGNORE-NEXT: [[TMP4:%.*]] = call addrspace(4) float @llvm.fabs.f32(float 0x40301999A0000000) +// AMDGCNSPIRV-IGNORE-NEXT: [[TMP5:%.*]] = fcmp one float [[TMP4]], 0x7FF0000000000000 +// AMDGCNSPIRV-IGNORE-NEXT: [[TMP6:%.*]] = select i1 [[TMP5]], float [[TMP3]], float [[TMP4]] +// AMDGCNSPIRV-IGNORE-NEXT: [[TMP7:%.*]] = select i1 false, float 0xFFF0000000000000, float [[TMP6]] +// AMDGCNSPIRV-IGNORE-NEXT: store float [[TMP7]], ptr addrspace(4) [[D1_ASCAST]], align 4 +// AMDGCNSPIRV-IGNORE-NEXT: ret void +// +// AMDGCNSPIRV-STRICT-LABEL: define spir_func void @test_logbf( +// AMDGCNSPIRV-STRICT-SAME: ) addrspace(4) #[[ATTR0:[0-9]+]] { +// AMDGCNSPIRV-STRICT-NEXT: [[ENTRY:.*:]] +// AMDGCNSPIRV-STRICT-NEXT: [[D1:%.*]] = alloca float, align 4 +// AMDGCNSPIRV-STRICT-NEXT: [[D1_ASCAST:%.*]] = addrspacecast ptr [[D1]] to ptr addrspace(4) +// AMDGCNSPIRV-STRICT-NEXT: [[TMP0:%.*]] = call addrspace(4) { float, i32 } @llvm.frexp.f32.i32(float 0x40301999A0000000) +// AMDGCNSPIRV-STRICT-NEXT: [[TMP1:%.*]] = extractvalue { float, i32 } [[TMP0]], 1 +// AMDGCNSPIRV-STRICT-NEXT: [[TMP2:%.*]] = add nsw i32 [[TMP1]], -1 +// AMDGCNSPIRV-STRICT-NEXT: [[TMP3:%.*]] = sitofp i32 [[TMP2]] to float +// AMDGCNSPIRV-STRICT-NEXT: [[TMP4:%.*]] = call addrspace(4) float @llvm.fabs.f32(float 0x40301999A0000000) +// AMDGCNSPIRV-STRICT-NEXT: [[TMP5:%.*]] = fcmp one float [[TMP4]], 0x7FF0000000000000 +// AMDGCNSPIRV-STRICT-NEXT: [[TMP6:%.*]] = select i1 [[TMP5]], float [[TMP3]], float [[TMP4]] +// AMDGCNSPIRV-STRICT-NEXT: [[TMP7:%.*]] = select i1 false, float 0xFFF0000000000000, float [[TMP6]] +// AMDGCNSPIRV-STRICT-NEXT: store float [[TMP7]], ptr addrspace(4) [[D1_ASCAST]], align 4 +// AMDGCNSPIRV-STRICT-NEXT: ret void +// +// AMDGCNSPIRV-MAYTRAP-LABEL: define spir_func void @test_logbf( +// AMDGCNSPIRV-MAYTRAP-SAME: ) addrspace(4) #[[ATTR0:[0-9]+]] { +// AMDGCNSPIRV-MAYTRAP-NEXT: [[ENTRY:.*:]] +// AMDGCNSPIRV-MAYTRAP-NEXT: [[D1:%.*]] = alloca float, align 4 +// AMDGCNSPIRV-MAYTRAP-NEXT: [[D1_ASCAST:%.*]] = addrspacecast ptr [[D1]] to ptr addrspace(4) +// AMDGCNSPIRV-MAYTRAP-NEXT: [[TMP0:%.*]] = call addrspace(4) { float, i32 } @llvm.frexp.f32.i32(float 0x40301999A0000000) +// AMDGCNSPIRV-MAYTRAP-NEXT: [[TMP1:%.*]] = extractvalue { float, i32 } [[TMP0]], 1 +// AMDGCNSPIRV-MAYTRAP-NEXT: [[TMP2:%.*]] = add nsw i32 [[TMP1]], -1 +// AMDGCNSPIRV-MAYTRAP-NEXT: [[TMP3:%.*]] = sitofp i32 [[TMP2]] to float +// AMDGCNSPIRV-MAYTRAP-NEXT: [[TMP4:%.*]] = call addrspace(4) float @llvm.fabs.f32(float 0x40301999A0000000) +// AMDGCNSPIRV-MAYTRAP-NEXT: [[TMP5:%.*]] = fcmp one float [[TMP4]], 0x7FF0000000000000 +// AMDGCNSPIRV-MAYTRAP-NEXT: [[TMP6:%.*]] = select i1 [[TMP5]], float [[TMP3]], float [[TMP4]] +// AMDGCNSPIRV-MAYTRAP-NEXT: [[TMP7:%.*]] = select i1 false, float 0xFFF0000000000000, float [[TMP6]] +// AMDGCNSPIRV-MAYTRAP-NEXT: store float [[TMP7]], ptr addrspace(4) [[D1_ASCAST]], align 4 +// AMDGCNSPIRV-MAYTRAP-NEXT: ret void +// +// AMDGCNSPIRV-ERRNO-LABEL: define spir_func void @test_logbf( +// AMDGCNSPIRV-ERRNO-SAME: ) addrspace(4) #[[ATTR0:[0-9]+]] { +// AMDGCNSPIRV-ERRNO-NEXT: [[ENTRY:.*:]] +// AMDGCNSPIRV-ERRNO-NEXT: [[D1:%.*]] = alloca float, align 4 +// AMDGCNSPIRV-ERRNO-NEXT: [[D1_ASCAST:%.*]] = addrspacecast ptr [[D1]] to ptr addrspace(4) +// AMDGCNSPIRV-ERRNO-NEXT: [[CALL:%.*]] = call spir_func addrspace(4) float @logbf(float noundef 0x40301999A0000000) #[[ATTR2:[0-9]+]] +// AMDGCNSPIRV-ERRNO-NEXT: store float [[CALL]], ptr addrspace(4) [[D1_ASCAST]], align 4 +// AMDGCNSPIRV-ERRNO-NEXT: ret void +// void test_logbf() { float D1 = __builtin_logbf(16.1f); } @@ -182,6 +260,107 @@ void test_logbf() { // ERRNO-NEXT: store float [[CALL]], ptr [[D1_ASCAST]], align 4 // ERRNO-NEXT: ret void // +// AMDGCNSPIRV-DEFAULT-LABEL: define spir_func void @test_logbf_var( +// AMDGCNSPIRV-DEFAULT-SAME: float noundef [[A:%.*]]) addrspace(4) #[[ATTR0]] { +// AMDGCNSPIRV-DEFAULT-NEXT: [[ENTRY:.*:]] +// AMDGCNSPIRV-DEFAULT-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 +// AMDGCNSPIRV-DEFAULT-NEXT: [[D1:%.*]] = alloca float, align 4 +// AMDGCNSPIRV-DEFAULT-NEXT: [[A_ADDR_ASCAST:%.*]] = addrspacecast ptr [[A_ADDR]] to ptr addrspace(4) +// AMDGCNSPIRV-DEFAULT-NEXT: [[D1_ASCAST:%.*]] = addrspacecast ptr [[D1]] to ptr addrspace(4) +// AMDGCNSPIRV-DEFAULT-NEXT: store float [[A]], ptr addrspace(4) [[A_ADDR_ASCAST]], align 4 +// AMDGCNSPIRV-DEFAULT-NEXT: [[TMP0:%.*]] = load float, ptr addrspace(4) [[A_ADDR_ASCAST]], align 4 +// AMDGCNSPIRV-DEFAULT-NEXT: [[TMP1:%.*]] = call addrspace(4) { float, i32 } @llvm.frexp.f32.i32(float [[TMP0]]) +// AMDGCNSPIRV-DEFAULT-NEXT: [[TMP2:%.*]] = extractvalue { float, i32 } [[TMP1]], 1 +// AMDGCNSPIRV-DEFAULT-NEXT: [[TMP3:%.*]] = add nsw i32 [[TMP2]], -1 +// AMDGCNSPIRV-DEFAULT-NEXT: [[TMP4:%.*]] = sitofp i32 [[TMP3]] to float +// AMDGCNSPIRV-DEFAULT-NEXT: [[TMP5:%.*]] = load float, ptr addrspace(4) [[A_ADDR_ASCAST]], align 4 +// AMDGCNSPIRV-DEFAULT-NEXT: [[TMP6:%.*]] = call addrspace(4) float @llvm.fabs.f32(float [[TMP5]]) +// AMDGCNSPIRV-DEFAULT-NEXT: [[TMP7:%.*]] = fcmp one float [[TMP6]], 0x7FF0000000000000 +// AMDGCNSPIRV-DEFAULT-NEXT: [[TMP8:%.*]] = select i1 [[TMP7]], float [[TMP4]], float [[TMP6]] +// AMDGCNSPIRV-DEFAULT-NEXT: [[TMP9:%.*]] = fcmp oeq float [[TMP0]], 0.000000e+00 +// AMDGCNSPIRV-DEFAULT-NEXT: [[TMP10:%.*]] = select i1 [[TMP9]], float 0xFFF0000000000000, float [[TMP8]] +// AMDGCNSPIRV-DEFAULT-NEXT: store float [[TMP10]], ptr addrspace(4) [[D1_ASCAST]], align 4 +// AMDGCNSPIRV-DEFAULT-NEXT: ret void +// +// AMDGCNSPIRV-IGNORE-LABEL: define spir_func void @test_logbf_var( +// AMDGCNSPIRV-IGNORE-SAME: float noundef [[A:%.*]]) addrspace(4) #[[ATTR0]] { +// AMDGCNSPIRV-IGNORE-NEXT: [[ENTRY:.*:]] +// AMDGCNSPIRV-IGNORE-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 +// AMDGCNSPIRV-IGNORE-NEXT: [[D1:%.*]] = alloca float, align 4 +// AMDGCNSPIRV-IGNORE-NEXT: [[A_ADDR_ASCAST:%.*]] = addrspacecast ptr [[A_ADDR]] to ptr addrspace(4) +// AMDGCNSPIRV-IGNORE-NEXT: [[D1_ASCAST:%.*]] = addrspacecast ptr [[D1]] to ptr addrspace(4) +// AMDGCNSPIRV-IGNORE-NEXT: store float [[A]], ptr addrspace(4) [[A_ADDR_ASCAST]], align 4 +// AMDGCNSPIRV-IGNORE-NEXT: [[TMP0:%.*]] = load float, ptr addrspace(4) [[A_ADDR_ASCAST]], align 4 +// AMDGCNSPIRV-IGNORE-NEXT: [[TMP1:%.*]] = call addrspace(4) { float, i32 } @llvm.frexp.f32.i32(float [[TMP0]]) +// AMDGCNSPIRV-IGNORE-NEXT: [[TMP2:%.*]] = extractvalue { float, i32 } [[TMP1]], 1 +// AMDGCNSPIRV-IGNORE-NEXT: [[TMP3:%.*]] = add nsw i32 [[TMP2]], -1 +// AMDGCNSPIRV-IGNORE-NEXT: [[TMP4:%.*]] = sitofp i32 [[TMP3]] to float +// AMDGCNSPIRV-IGNORE-NEXT: [[TMP5:%.*]] = load float, ptr addrspace(4) [[A_ADDR_ASCAST]], align 4 +// AMDGCNSPIRV-IGNORE-NEXT: [[TMP6:%.*]] = call addrspace(4) float @llvm.fabs.f32(float [[TMP5]]) +// AMDGCNSPIRV-IGNORE-NEXT: [[TMP7:%.*]] = fcmp one float [[TMP6]], 0x7FF0000000000000 +// AMDGCNSPIRV-IGNORE-NEXT: [[TMP8:%.*]] = select i1 [[TMP7]], float [[TMP4]], float [[TMP6]] +// AMDGCNSPIRV-IGNORE-NEXT: [[TMP9:%.*]] = fcmp oeq float [[TMP0]], 0.000000e+00 +// AMDGCNSPIRV-IGNORE-NEXT: [[TMP10:%.*]] = select i1 [[TMP9]], float 0xFFF0000000000000, float [[TMP8]] +// AMDGCNSPIRV-IGNORE-NEXT: store float [[TMP10]], ptr addrspace(4) [[D1_ASCAST]], align 4 +// AMDGCNSPIRV-IGNORE-NEXT: ret void +// +// AMDGCNSPIRV-STRICT-LABEL: define spir_func void @test_logbf_var( +// AMDGCNSPIRV-STRICT-SAME: float noundef [[A:%.*]]) addrspace(4) #[[ATTR0]] { +// AMDGCNSPIRV-STRICT-NEXT: [[ENTRY:.*:]] +// AMDGCNSPIRV-STRICT-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 +// AMDGCNSPIRV-STRICT-NEXT: [[D1:%.*]] = alloca float, align 4 +// AMDGCNSPIRV-STRICT-NEXT: [[A_ADDR_ASCAST:%.*]] = addrspacecast ptr [[A_ADDR]] to ptr addrspace(4) +// AMDGCNSPIRV-STRICT-NEXT: [[D1_ASCAST:%.*]] = addrspacecast ptr [[D1]] to ptr addrspace(4) +// AMDGCNSPIRV-STRICT-NEXT: store float [[A]], ptr addrspace(4) [[A_ADDR_ASCAST]], align 4 +// AMDGCNSPIRV-STRICT-NEXT: [[TMP0:%.*]] = load float, ptr addrspace(4) [[A_ADDR_ASCAST]], align 4 +// AMDGCNSPIRV-STRICT-NEXT: [[TMP1:%.*]] = call addrspace(4) { float, i32 } @llvm.frexp.f32.i32(float [[TMP0]]) +// AMDGCNSPIRV-STRICT-NEXT: [[TMP2:%.*]] = extractvalue { float, i32 } [[TMP1]], 1 +// AMDGCNSPIRV-STRICT-NEXT: [[TMP3:%.*]] = add nsw i32 [[TMP2]], -1 +// AMDGCNSPIRV-STRICT-NEXT: [[TMP4:%.*]] = sitofp i32 [[TMP3]] to float +// AMDGCNSPIRV-STRICT-NEXT: [[TMP5:%.*]] = load float, ptr addrspace(4) [[A_ADDR_ASCAST]], align 4 +// AMDGCNSPIRV-STRICT-NEXT: [[TMP6:%.*]] = call addrspace(4) float @llvm.fabs.f32(float [[TMP5]]) +// AMDGCNSPIRV-STRICT-NEXT: [[TMP7:%.*]] = fcmp one float [[TMP6]], 0x7FF0000000000000 +// AMDGCNSPIRV-STRICT-NEXT: [[TMP8:%.*]] = select i1 [[TMP7]], float [[TMP4]], float [[TMP6]] +// AMDGCNSPIRV-STRICT-NEXT: [[TMP9:%.*]] = fcmp oeq float [[TMP0]], 0.000000e+00 +// AMDGCNSPIRV-STRICT-NEXT: [[TMP10:%.*]] = select i1 [[TMP9]], float 0xFFF0000000000000, float [[TMP8]] +// AMDGCNSPIRV-STRICT-NEXT: store float [[TMP10]], ptr addrspace(4) [[D1_ASCAST]], align 4 +// AMDGCNSPIRV-STRICT-NEXT: ret void +// +// AMDGCNSPIRV-MAYTRAP-LABEL: define spir_func void @test_logbf_var( +// AMDGCNSPIRV-MAYTRAP-SAME: float noundef [[A:%.*]]) addrspace(4) #[[ATTR0]] { +// AMDGCNSPIRV-MAYTRAP-NEXT: [[ENTRY:.*:]] +// AMDGCNSPIRV-MAYTRAP-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 +// AMDGCNSPIRV-MAYTRAP-NEXT: [[D1:%.*]] = alloca float, align 4 +// AMDGCNSPIRV-MAYTRAP-NEXT: [[A_ADDR_ASCAST:%.*]] = addrspacecast ptr [[A_ADDR]] to ptr addrspace(4) +// AMDGCNSPIRV-MAYTRAP-NEXT: [[D1_ASCAST:%.*]] = addrspacecast ptr [[D1]] to ptr addrspace(4) +// AMDGCNSPIRV-MAYTRAP-NEXT: store float [[A]], ptr addrspace(4) [[A_ADDR_ASCAST]], align 4 +// AMDGCNSPIRV-MAYTRAP-NEXT: [[TMP0:%.*]] = load float, ptr addrspace(4) [[A_ADDR_ASCAST]], align 4 +// AMDGCNSPIRV-MAYTRAP-NEXT: [[TMP1:%.*]] = call addrspace(4) { float, i32 } @llvm.frexp.f32.i32(float [[TMP0]]) +// AMDGCNSPIRV-MAYTRAP-NEXT: [[TMP2:%.*]] = extractvalue { float, i32 } [[TMP1]], 1 +// AMDGCNSPIRV-MAYTRAP-NEXT: [[TMP3:%.*]] = add nsw i32 [[TMP2]], -1 +// AMDGCNSPIRV-MAYTRAP-NEXT: [[TMP4:%.*]] = sitofp i32 [[TMP3]] to float +// AMDGCNSPIRV-MAYTRAP-NEXT: [[TMP5:%.*]] = load float, ptr addrspace(4) [[A_ADDR_ASCAST]], align 4 +// AMDGCNSPIRV-MAYTRAP-NEXT: [[TMP6:%.*]] = call addrspace(4) float @llvm.fabs.f32(float [[TMP5]]) +// AMDGCNSPIRV-MAYTRAP-NEXT: [[TMP7:%.*]] = fcmp one float [[TMP6]], 0x7FF0000000000000 +// AMDGCNSPIRV-MAYTRAP-NEXT: [[TMP8:%.*]] = select i1 [[TMP7]], float [[TMP4]], float [[TMP6]] +// AMDGCNSPIRV-MAYTRAP-NEXT: [[TMP9:%.*]] = fcmp oeq float [[TMP0]], 0.000000e+00 +// AMDGCNSPIRV-MAYTRAP-NEXT: [[TMP10:%.*]] = select i1 [[TMP9]], float 0xFFF0000000000000, float [[TMP8]] +// AMDGCNSPIRV-MAYTRAP-NEXT: store float [[TMP10]], ptr addrspace(4) [[D1_ASCAST]], align 4 +// AMDGCNSPIRV-MAYTRAP-NEXT: ret void +// +// AMDGCNSPIRV-ERRNO-LABEL: define spir_func void @test_logbf_var( +// AMDGCNSPIRV-ERRNO-SAME: float noundef [[A:%.*]]) addrspace(4) #[[ATTR0]] { +// AMDGCNSPIRV-ERRNO-NEXT: [[ENTRY:.*:]] +// AMDGCNSPIRV-ERRNO-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 +// AMDGCNSPIRV-ERRNO-NEXT: [[D1:%.*]] = alloca float, align 4 +// AMDGCNSPIRV-ERRNO-NEXT: [[A_ADDR_ASCAST:%.*]] = addrspacecast ptr [[A_ADDR]] to ptr addrspace(4) +// AMDGCNSPIRV-ERRNO-NEXT: [[D1_ASCAST:%.*]] = addrspacecast ptr [[D1]] to ptr addrspace(4) +// AMDGCNSPIRV-ERRNO-NEXT: store float [[A]], ptr addrspace(4) [[A_ADDR_ASCAST]], align 4 +// AMDGCNSPIRV-ERRNO-NEXT: [[TMP0:%.*]] = load float, ptr addrspace(4) [[A_ADDR_ASCAST]], align 4 +// AMDGCNSPIRV-ERRNO-NEXT: [[CALL:%.*]] = call spir_func addrspace(4) float @logbf(float noundef [[TMP0]]) #[[ATTR2]] +// AMDGCNSPIRV-ERRNO-NEXT: store float [[CALL]], ptr addrspace(4) [[D1_ASCAST]], align 4 +// AMDGCNSPIRV-ERRNO-NEXT: ret void +// void test_logbf_var(float a) { float D1 = __builtin_logbf(a); } @@ -273,6 +452,79 @@ void test_logbf_var(float a) { // ERRNO-NEXT: store double [[CALL]], ptr [[D1_ASCAST]], align 8 // ERRNO-NEXT: ret void // +// AMDGCNSPIRV-DEFAULT-LABEL: define spir_func void @test_logb( +// AMDGCNSPIRV-DEFAULT-SAME: ) addrspace(4) #[[ATTR0]] { +// AMDGCNSPIRV-DEFAULT-NEXT: [[ENTRY:.*:]] +// AMDGCNSPIRV-DEFAULT-NEXT: [[D1:%.*]] = alloca double, align 8 +// AMDGCNSPIRV-DEFAULT-NEXT: [[D1_ASCAST:%.*]] = addrspacecast ptr [[D1]] to ptr addrspace(4) +// AMDGCNSPIRV-DEFAULT-NEXT: [[TMP0:%.*]] = call addrspace(4) { double, i32 } @llvm.frexp.f64.i32(double 1.510000e+01) +// AMDGCNSPIRV-DEFAULT-NEXT: [[TMP1:%.*]] = extractvalue { double, i32 } [[TMP0]], 1 +// AMDGCNSPIRV-DEFAULT-NEXT: [[TMP2:%.*]] = add nsw i32 [[TMP1]], -1 +// AMDGCNSPIRV-DEFAULT-NEXT: [[TMP3:%.*]] = sitofp i32 [[TMP2]] to double +// AMDGCNSPIRV-DEFAULT-NEXT: [[TMP4:%.*]] = call addrspace(4) double @llvm.fabs.f64(double 1.510000e+01) +// AMDGCNSPIRV-DEFAULT-NEXT: [[TMP5:%.*]] = fcmp one double [[TMP4]], 0x7FF0000000000000 +// AMDGCNSPIRV-DEFAULT-NEXT: [[TMP6:%.*]] = select i1 [[TMP5]], double [[TMP3]], double [[TMP4]] +// AMDGCNSPIRV-DEFAULT-NEXT: [[TMP7:%.*]] = select i1 false, double 0xFFF0000000000000, double [[TMP6]] +// AMDGCNSPIRV-DEFAULT-NEXT: store double [[TMP7]], ptr addrspace(4) [[D1_ASCAST]], align 8 +// AMDGCNSPIRV-DEFAULT-NEXT: ret void +// +// AMDGCNSPIRV-IGNORE-LABEL: define spir_func void @test_logb( +// AMDGCNSPIRV-IGNORE-SAME: ) addrspace(4) #[[ATTR0]] { +// AMDGCNSPIRV-IGNORE-NEXT: [[ENTRY:.*:]] +// AMDGCNSPIRV-IGNORE-NEXT: [[D1:%.*]] = alloca double, align 8 +// AMDGCNSPIRV-IGNORE-NEXT: [[D1_ASCAST:%.*]] = addrspacecast ptr [[D1]] to ptr addrspace(4) +// AMDGCNSPIRV-IGNORE-NEXT: [[TMP0:%.*]] = call addrspace(4) { double, i32 } @llvm.frexp.f64.i32(double 1.510000e+01) +// AMDGCNSPIRV-IGNORE-NEXT: [[TMP1:%.*]] = extractvalue { double, i32 } [[TMP0]], 1 +// AMDGCNSPIRV-IGNORE-NEXT: [[TMP2:%.*]] = add nsw i32 [[TMP1]], -1 +// AMDGCNSPIRV-IGNORE-NEXT: [[TMP3:%.*]] = sitofp i32 [[TMP2]] to double +// AMDGCNSPIRV-IGNORE-NEXT: [[TMP4:%.*]] = call addrspace(4) double @llvm.fabs.f64(double 1.510000e+01) +// AMDGCNSPIRV-IGNORE-NEXT: [[TMP5:%.*]] = fcmp one double [[TMP4]], 0x7FF0000000000000 +// AMDGCNSPIRV-IGNORE-NEXT: [[TMP6:%.*]] = select i1 [[TMP5]], double [[TMP3]], double [[TMP4]] +// AMDGCNSPIRV-IGNORE-NEXT: [[TMP7:%.*]] = select i1 false, double 0xFFF0000000000000, double [[TMP6]] +// AMDGCNSPIRV-IGNORE-NEXT: store double [[TMP7]], ptr addrspace(4) [[D1_ASCAST]], align 8 +// AMDGCNSPIRV-IGNORE-NEXT: ret void +// +// AMDGCNSPIRV-STRICT-LABEL: define spir_func void @test_logb( +// AMDGCNSPIRV-STRICT-SAME: ) addrspace(4) #[[ATTR0]] { +// AMDGCNSPIRV-STRICT-NEXT: [[ENTRY:.*:]] +// AMDGCNSPIRV-STRICT-NEXT: [[D1:%.*]] = alloca double, align 8 +// AMDGCNSPIRV-STRICT-NEXT: [[D1_ASCAST:%.*]] = addrspacecast ptr [[D1]] to ptr addrspace(4) +// AMDGCNSPIRV-STRICT-NEXT: [[TMP0:%.*]] = call addrspace(4) { double, i32 } @llvm.frexp.f64.i32(double 1.510000e+01) +// AMDGCNSPIRV-STRICT-NEXT: [[TMP1:%.*]] = extractvalue { double, i32 } [[TMP0]], 1 +// AMDGCNSPIRV-STRICT-NEXT: [[TMP2:%.*]] = add nsw i32 [[TMP1]], -1 +// AMDGCNSPIRV-STRICT-NEXT: [[TMP3:%.*]] = sitofp i32 [[TMP2]] to double +// AMDGCNSPIRV-STRICT-NEXT: [[TMP4:%.*]] = call addrspace(4) double @llvm.fabs.f64(double 1.510000e+01) +// AMDGCNSPIRV-STRICT-NEXT: [[TMP5:%.*]] = fcmp one double [[TMP4]], 0x7FF0000000000000 +// AMDGCNSPIRV-STRICT-NEXT: [[TMP6:%.*]] = select i1 [[TMP5]], double [[TMP3]], double [[TMP4]] +// AMDGCNSPIRV-STRICT-NEXT: [[TMP7:%.*]] = select i1 false, double 0xFFF0000000000000, double [[TMP6]] +// AMDGCNSPIRV-STRICT-NEXT: store double [[TMP7]], ptr addrspace(4) [[D1_ASCAST]], align 8 +// AMDGCNSPIRV-STRICT-NEXT: ret void +// +// AMDGCNSPIRV-MAYTRAP-LABEL: define spir_func void @test_logb( +// AMDGCNSPIRV-MAYTRAP-SAME: ) addrspace(4) #[[ATTR0]] { +// AMDGCNSPIRV-MAYTRAP-NEXT: [[ENTRY:.*:]] +// AMDGCNSPIRV-MAYTRAP-NEXT: [[D1:%.*]] = alloca double... [truncated] `````````` </details> https://github.com/llvm/llvm-project/pull/143814 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
