llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT--> @llvm/pr-subscribers-lld @llvm/pr-subscribers-llvm-transforms Author: Muhammad Bashir (youngbash88) <details> <summary>Changes</summary> Fixes https://github.com/llvm/llvm-project/issues/140149 --- Patch is 21.09 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/140373.diff 21 Files Affected: - (modified) clang/test/AST/ast-dump-using-template.cpp (+2-2) - (modified) clang/test/CodeGen/PowerPC/ppc-tmmintrin.c (+1-1) - (modified) clang/test/CodeGen/X86/avx-builtins.c (+2-2) - (modified) clang/test/CodeGen/paren-list-agg-init.cpp (+1-1) - (modified) clang/test/CodeGenCXX/microsoft-abi-throw.cpp (+1-1) - (modified) clang/test/CodeGenOpenCL/builtins-amdgcn-vi.cl (+1-1) - (modified) clang/test/Driver/baremetal-sysroot.cpp (+1-1) - (modified) clang/test/Driver/baremetal.cpp (+2-2) - (modified) clang/test/ExtractAPI/objc_property.m (+1-1) - (modified) clang/test/SemaOpenACC/set-construct-ast.cpp (+1-1) - (modified) lld/test/ELF/aarch64-thunk-bti.s (+1-1) - (modified) llvm/test/Analysis/CostModel/SystemZ/i128-cmp-ext-conv.ll (+1-1) - (modified) llvm/test/CodeGen/AArch64/fpimm.ll (+1-1) - (modified) llvm/test/CodeGen/ARM/shifter_operand.ll (+1-1) - (modified) llvm/test/CodeGen/ARM/sxt_rot.ll (+1-1) - (modified) llvm/test/CodeGen/Thumb2/LowOverheadLoops/branch-targets.ll (+3-3) - (modified) llvm/test/Transforms/CallSiteSplitting/callsite-split.ll (+1-1) - (modified) llvm/test/Transforms/Coroutines/coro-debug-coro-frame.ll (+1-1) - (modified) llvm/test/Transforms/LoopVectorize/AArch64/nontemporal-load-store.ll (+11-11) - (modified) llvm/test/tools/llvm-cov/Inputs/binary-formats.canonical.json (+1-1) - (modified) polly/test/CodeGen/scalar-references-used-in-scop-compute.ll (+2-2) ``````````diff diff --git a/clang/test/AST/ast-dump-using-template.cpp b/clang/test/AST/ast-dump-using-template.cpp index 75db5eb5a9d1c..2c9584966e843 100644 --- a/clang/test/AST/ast-dump-using-template.cpp +++ b/clang/test/AST/ast-dump-using-template.cpp @@ -22,7 +22,7 @@ using A = S<T>; // CHECK-NEXT: `-ElaboratedType {{.*}} 'S<T>' sugar dependent // CHECK-NEXT: `-TemplateSpecializationType {{.*}} 'S<T>' dependent // CHECK-NEXT: |-name: 'S':'ns::S' qualified -// CHECk-NEXT: | |-UsingShadowDecl {{.+}} ClassTemplate {{.+}} 'S' +// CHECK-NEXT: | |-UsingShadowDecl {{.+}} ClassTemplate {{.+}} 'S' // TemplateName in TemplateArgument. template <template <typename> class T> class X {}; @@ -55,4 +55,4 @@ using D = decltype(DeducedTemplateSpecializationT2); // CHECK-NEXT: `-ElaboratedType {{.*}} 'S2<int>' sugar // CHECK-NEXT: `-DeducedTemplateSpecializationType {{.*}} 'S2<int>' sugar // CHECK-NEXT: |-name: 'S2':'ns::S2' qualified -//CHECk-NEXT: | |-UsingShadowDecl {{.+}} ClassTemplate {{.+}} 'S2' +// CHECK-NEXT: | |-UsingShadowDecl {{.+}} ClassTemplate {{.+}} 'S2' diff --git a/clang/test/CodeGen/PowerPC/ppc-tmmintrin.c b/clang/test/CodeGen/PowerPC/ppc-tmmintrin.c index 40d3839dcf026..fafdf4ed91e2e 100644 --- a/clang/test/CodeGen/PowerPC/ppc-tmmintrin.c +++ b/clang/test/CodeGen/PowerPC/ppc-tmmintrin.c @@ -71,7 +71,7 @@ test_alignr() { // CHECK-BE: call <16 x i8> @vec_sld(unsigned char vector[16], unsigned char vector[16], unsigned int) // CHECK-LE: call <16 x i8> @vec_reve(unsigned char vector[16]) // CHECK-LE: call <16 x i8> @vec_reve(unsigned char vector[16]) -// CHECk-LE: call <16 x i8> @vec_sld(unsigned char vector[16], unsigned char vector[16], unsigned int) +// CHECK-LE: call <16 x i8> @vec_sld(unsigned char vector[16], unsigned char vector[16], unsigned int) // CHECK-LE: call <16 x i8> @vec_reve(unsigned char vector[16]) // CHECK: store <16 x i8> zeroinitializer, ptr %{{[0-9a-zA-Z_.]+}}, align 16 // CHECK: store <2 x i64> zeroinitializer, ptr %{{[0-9a-zA-Z_.]+}}, align 16 diff --git a/clang/test/CodeGen/X86/avx-builtins.c b/clang/test/CodeGen/X86/avx-builtins.c index cf7c61d871502..ed39862377197 100644 --- a/clang/test/CodeGen/X86/avx-builtins.c +++ b/clang/test/CodeGen/X86/avx-builtins.c @@ -1833,14 +1833,14 @@ void test_mm256_storeu_pd(double* A, __m256d B) { void test_mm256_storeu_ps(float* A, __m256 B) { // CHECK-LABEL: test_mm256_storeu_ps // CHECK: store <8 x float> %{{.*}}, ptr %{{.*}}, align 1{{$}} - // CHECk-NEXT: ret void + // CHECK-NEXT: ret void _mm256_storeu_ps(A, B); } void test_mm256_storeu_si256(__m256i* A, __m256i B) { // CHECK-LABEL: test_mm256_storeu_si256 // CHECK: store <4 x i64> %{{.*}}, ptr %{{.*}}, align 1{{$}} - // CHECk-NEXT: ret void + // CHECK-NEXT: ret void _mm256_storeu_si256(A, B); } diff --git a/clang/test/CodeGen/paren-list-agg-init.cpp b/clang/test/CodeGen/paren-list-agg-init.cpp index 235352382332a..849901ed06e3e 100644 --- a/clang/test/CodeGen/paren-list-agg-init.cpp +++ b/clang/test/CodeGen/paren-list-agg-init.cpp @@ -377,7 +377,7 @@ void foo18() { // CHECK-NEXT: [[A:%.*a.*]] = getelementptr inbounds nuw [[STRUCT_G]], ptr [[G]], i32 0, i32 0 // CHECK-NEXT: store i32 2, ptr [[A]], align 4 // CHECK-NEXT: [[F:%.*]] = getelementptr inbounds i8, ptr [[G]], i64 4 -// CHECk-NEXT: call void @{{.*F.*}}(ptr noundef nonnull align 1 dereferenceable(1)) [[F]], ie32 noundef 1) +// CHECK-NEXT: call void @{{.*F.*}}(ptr noundef nonnull align 1 dereferenceable(1)) [[F]], ie32 noundef 1) // CHECK: ret void void foo19() { G g(2); diff --git a/clang/test/CodeGenCXX/microsoft-abi-throw.cpp b/clang/test/CodeGenCXX/microsoft-abi-throw.cpp index 10a58b21fc101..0b28772e20d1e 100644 --- a/clang/test/CodeGenCXX/microsoft-abi-throw.cpp +++ b/clang/test/CodeGenCXX/microsoft-abi-throw.cpp @@ -14,7 +14,7 @@ // CHECK-DAG: @"_TI5?AUY@@" = linkonce_odr unnamed_addr constant %eh.ThrowInfo { i32 0, ptr @"??_DY@@QAEXXZ", ptr null, ptr @"_CTA5?AUY@@" }, section ".xdata", comdat // CHECK-DAG: @"_CT??_R0?AUDefault@@@8??_ODefault@@QAEXAAU0@@Z1" = linkonce_odr unnamed_addr constant %eh.CatchableType { i32 0, ptr @"??_R0?AUDefault@@@8", i32 0, i32 -1, i32 0, i32 1, ptr @"??_ODefault@@QAEXAAU0@@Z" }, section ".xdata", comdat // CHECK-DAG: @"_CT??_R0?AUDeletedCopy@@@81" = linkonce_odr unnamed_addr constant %eh.CatchableType { i32 0, ptr @"??_R0?AUDeletedCopy@@@8", i32 0, i32 -1, i32 0, i32 1, ptr null }, section ".xdata", comdat -// CHECk-DAG: @"_CT??_R0?AUMoveOnly@@@84" = linkonce_odr unnamed_addr constant %eh.CatchableType { i32 0, ptr @"??_R0?AUMoveOnly@@@8", i32 0, i321-1, i32 0, i32 4, ptr null }, section ".xdata", comda +// CHECK-DAG: @"_CT??_R0?AUMoveOnly@@@84" = linkonce_odr unnamed_addr constant %eh.CatchableType { i32 0, ptr @"??_R0?AUMoveOnly@@@8", i32 0, i321-1, i32 0, i32 4, ptr null }, section ".xdata", comda // CHECK-DAG: @"_CT??_R0?AUVariadic@@@8??_OVariadic@@QAEXAAU0@@Z1" = linkonce_odr unnamed_addr constant %eh.CatchableType { i32 0, ptr @"??_R0?AUVariadic@@@8", i32 0, i32 -1, i32 0, i32 1, ptr @"??_OVariadic@@QAEXAAU0@@Z" }, section ".xdata", comdat // CHECK-DAG: @"_CT??_R0?AUTemplateWithDefault@@@8??$?_OH@TemplateWithDefault@@QAEXAAU0@@Z1" = linkonce_odr unnamed_addr constant %eh.CatchableType { i32 0, ptr @"??_R0?AUTemplateWithDefault@@@8", i32 0, i32 -1, i32 0, i32 1, ptr @"??$?_OH@TemplateWithDefault@@QAEXAAU0@@Z" }, section ".xdata", comdat // CHECK-DAG: @"_CTA2$$T" = linkonce_odr unnamed_addr constant %eh.CatchableTypeArray.2 { i32 2, [2 x ptr] [ptr @"_CT??_R0$$T@84", ptr @"_CT??_R0PAX@84"] }, section ".xdata", comdat diff --git a/clang/test/CodeGenOpenCL/builtins-amdgcn-vi.cl b/clang/test/CodeGenOpenCL/builtins-amdgcn-vi.cl index 269f20e2f53fe..5f202baa8a592 100644 --- a/clang/test/CodeGenOpenCL/builtins-amdgcn-vi.cl +++ b/clang/test/CodeGenOpenCL/builtins-amdgcn-vi.cl @@ -169,7 +169,7 @@ void test_update_dpp_int(global int* out, int arg1, int arg2) // CHECK-LABEL: @test_update_dpp_long // CHECK: %0 = tail call{{.*}} i64 @llvm.amdgcn.update.dpp.i64(i64 %x, i64 %x, i32 257, i32 15, i32 15, i1 false) -// CHECk-NEXT: store i64 %0, +// CHECK-NEXT: store i64 %0, void test_update_dpp_long(long x, global long *p) { *p = __builtin_amdgcn_update_dpp(x, x, 0x101, 0xf, 0xf, 0); } diff --git a/clang/test/Driver/baremetal-sysroot.cpp b/clang/test/Driver/baremetal-sysroot.cpp index 5cbb7ac69a7ac..5d5b336a01b0b 100644 --- a/clang/test/Driver/baremetal-sysroot.cpp +++ b/clang/test/Driver/baremetal-sysroot.cpp @@ -14,7 +14,7 @@ // RUN: | FileCheck --check-prefix=CHECK-V6M-C %s // CHECK-V6M-C: "{{.*}}clang{{.*}}" "-cc1" "-triple" "thumbv6m-unknown-none-eabi" // CHECK-V6M-C-SAME: "-internal-isystem" "{{.*}}/baremetal_default_sysroot{{[/\\]+}}bin{{[/\\]+}}..{{[/\\]+}}lib{{[/\\]+}}clang-runtimes{{[/\\]+}}armv6m-none-eabi{{[/\\]+}}include{{[/\\]+}}c++{{[/\\]+}}v1" -// CHECk-V6M-C-SAME: "-internal-isystem" "{{.*}}/baremetal_default_sysroot{{[/\\]+}}bin{{[/\\]+}}..{{[/\\]+}}lib{{[/\\]+}}clang-runtimes{{[/\\]+}}armv6m-none-eabi{{[/\\]+}}include" +// CHECK-V6M-C-SAME: "-internal-isystem" "{{.*}}/baremetal_default_sysroot{{[/\\]+}}bin{{[/\\]+}}..{{[/\\]+}}lib{{[/\\]+}}clang-runtimes{{[/\\]+}}armv6m-none-eabi{{[/\\]+}}include" // CHECK-V6M-C-SAME: "-x" "c++" "{{.*}}baremetal-sysroot.cpp" // CHECK-V6M-C-NEXT: "{{[^"]*}}ld{{(\.(lld|bfd|gold))?}}{{(\.exe)?}}" "{{.*}}.o" "-Bstatic" // CHECK-V6M-C-SAME: "-L{{.*}}/baremetal_default_sysroot{{[/\\]+}}bin{{[/\\]+}}..{{[/\\]+}}lib{{[/\\]+}}clang-runtimes{{[/\\]+}}armv6m-none-eabi{{[/\\]+}}lib" diff --git a/clang/test/Driver/baremetal.cpp b/clang/test/Driver/baremetal.cpp index 6d6255ef5970f..a80aa9b437117 100644 --- a/clang/test/Driver/baremetal.cpp +++ b/clang/test/Driver/baremetal.cpp @@ -203,7 +203,7 @@ // CHECK-RV64-SAME: "-resource-dir" "[[RESOURCE_DIR:[^"]+]]" // CHECK-RV64-SAME: "-isysroot" "[[SYSROOT:[^"]*]]" // CHECK-RV64-SAME: "-internal-isystem" "[[SYSROOT]]{{[/\\]+}}include{{[/\\]+}}c++{{[/\\]+}}v1" -// CHECk-RV64-SAME: "-internal-isystem" "[[SYSROOT]]{{[/\\]+}}include" +// CHECK-RV64-SAME: "-internal-isystem" "[[SYSROOT]]{{[/\\]+}}include" // CHECK-RV64-SAME: "-x" "c++" "{{.*}}baremetal.cpp" // CHECK-RV64-NEXT: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic" // CHECK-RV64-SAME: "-Lsome{{[/\\]+}}directory{{[/\\]+}}user{{[/\\]+}}asked{{[/\\]+}}for" @@ -337,7 +337,7 @@ // CHECK-RV64FD-SAME: "-resource-dir" "[[RESOURCE_DIR:[^"]+]]" // CHECK-RV64FD-SAME: "-isysroot" "[[SYSROOT:[^"]*]]" // CHECK-RV64FD-SAME: "-internal-isystem" "[[SYSROOT]]{{[/\\]+}}rv64imafdc{{[/\\]+}}lp64d{{[/\\]+}}include{{[/\\]+}}c++{{[/\\]+}}v1" -// CHECk-RV64FD-SAME: "-internal-isystem" "[[SYSROOT]]{{[/\\]+}}rv64imafdc{{[/\\]+}}lp64d{{[/\\]+}}include" +// CHECK-RV64FD-SAME: "-internal-isystem" "[[SYSROOT]]{{[/\\]+}}rv64imafdc{{[/\\]+}}lp64d{{[/\\]+}}include" // CHECK-RV64FD-SAME: "-x" "c++" "{{.*}}baremetal.cpp" // CHECK-RV64FD-NEXT: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic" // CHECK-RV64FD-SAME: "-L[[SYSROOT:[^"]+]]{{[/\\]+}}rv64imafdc{{[/\\]+}}lp64d{{[/\\]+}}lib" diff --git a/clang/test/ExtractAPI/objc_property.m b/clang/test/ExtractAPI/objc_property.m index f05584c885d91..68869295f8c04 100644 --- a/clang/test/ExtractAPI/objc_property.m +++ b/clang/test/ExtractAPI/objc_property.m @@ -11,7 +11,7 @@ @protocol Protocol @interface Interface @property(class) int myInterfaceTypeProp; -// CHECk-DAG: "!testRelLabel": "memberOf $ c:objc(cs)Interface(cpy)myInterfaceTypeProp $ c:objc(cs)Interface" +// CHECK-DAG: "!testRelLabel": "memberOf $ c:objc(cs)Interface(cpy)myInterfaceTypeProp $ c:objc(cs)Interface" @property int myInterfaceInstanceProp; // CHECK-DAG: "!testRelLabel": "memberOf $ c:objc(cs)Interface(py)myInterfaceInstanceProp $ c:objc(cs)Interface" @end diff --git a/clang/test/SemaOpenACC/set-construct-ast.cpp b/clang/test/SemaOpenACC/set-construct-ast.cpp index 69a750fb0284b..f5b5afb70a8d8 100644 --- a/clang/test/SemaOpenACC/set-construct-ast.cpp +++ b/clang/test/SemaOpenACC/set-construct-ast.cpp @@ -84,7 +84,7 @@ void TemplFunc(T t) { // CHECK-NEXT: ImplicitCastExpr {{.*}}'unsigned int' // CHECK-NEXT: CXXMemberCallExpr{{.*}}'unsigned int' // CHECK-NEXT: MemberExpr{{.*}}.operator unsigned int - // CHECk-NEXT: DeclRefExpr{{.*}}'t' 'SomeStruct' + // CHECK-NEXT: DeclRefExpr{{.*}}'t' 'SomeStruct' } struct SomeStruct{ diff --git a/lld/test/ELF/aarch64-thunk-bti.s b/lld/test/ELF/aarch64-thunk-bti.s index 0672ad75d8094..5689a0bb6a55b 100644 --- a/lld/test/ELF/aarch64-thunk-bti.s +++ b/lld/test/ELF/aarch64-thunk-bti.s @@ -176,7 +176,7 @@ pacibsp_target: pacibsp ret -// CHECk-PADS-LABEL: <bti_c_target>: +// CHECK-PADS-LABEL: <bti_c_target>: // CHECK-PADS: 18001000: bti c // CHECK-PADS-NEXT: ret diff --git a/llvm/test/Analysis/CostModel/SystemZ/i128-cmp-ext-conv.ll b/llvm/test/Analysis/CostModel/SystemZ/i128-cmp-ext-conv.ll index ba86c9ab1d702..e444bbf1bc29d 100644 --- a/llvm/test/Analysis/CostModel/SystemZ/i128-cmp-ext-conv.ll +++ b/llvm/test/Analysis/CostModel/SystemZ/i128-cmp-ext-conv.ll @@ -52,7 +52,7 @@ define i128 @fun3_cmp64(i64 %val1, i64 %val2, ; CHECK-LABEL: 'fun3_cmp64' ; CHECK: Cost Model: Found an estimated cost of 1 for instruction: %cmp = icmp slt i64 %val1, %val2 ; CHECK: Cost Model: Found an estimated cost of 1 for instruction: %add = add i128 %val3, %val4 -; CHECk: Cost Model: Found an estimated cost of 4 for instruction: %sel = select i1 %cmp, i128 %val3, i128 %add +; CHECK: Cost Model: Found an estimated cost of 4 for instruction: %sel = select i1 %cmp, i128 %val3, i128 %add %cmp = icmp slt i64 %val1, %val2 %add = add i128 %val3, %val4 %sel = select i1 %cmp, i128 %val3, i128 %add diff --git a/llvm/test/CodeGen/AArch64/fpimm.ll b/llvm/test/CodeGen/AArch64/fpimm.ll index b92bb4245c7f3..e2944243338f5 100644 --- a/llvm/test/CodeGen/AArch64/fpimm.ll +++ b/llvm/test/CodeGen/AArch64/fpimm.ll @@ -38,7 +38,7 @@ define void @check_double() { ; 64-bit ORR followed by MOVK. ; CHECK-DAG: mov [[XFP0:x[0-9]+]], #1082331758844 ; CHECK-DAG: movk [[XFP0]], #64764, lsl #16 -; CHECk-DAG: fmov {{d[0-9]+}}, [[XFP0]] +; CHECK-DAG: fmov {{d[0-9]+}}, [[XFP0]] %newval3 = fadd double %val, 0xFCFCFC00FC store volatile double %newval3, ptr @varf64 diff --git a/llvm/test/CodeGen/ARM/shifter_operand.ll b/llvm/test/CodeGen/ARM/shifter_operand.ll index bf2e8aa911c64..835c8b744ae98 100644 --- a/llvm/test/CodeGen/ARM/shifter_operand.ll +++ b/llvm/test/CodeGen/ARM/shifter_operand.ll @@ -121,7 +121,7 @@ define i32 @test_orr_extract_from_mul_1(i32 %x, i32 %y) { ; CHECK-THUMB-NEXT: orrs r0, r1 ; CHECK-THUMB-NEXT: bx lr entry: -; CHECk-THUMB: orrs r0, r1 +; CHECK-THUMB: orrs r0, r1 %mul = mul i32 %y, 63767 %or = or i32 %mul, %x ret i32 %or diff --git a/llvm/test/CodeGen/ARM/sxt_rot.ll b/llvm/test/CodeGen/ARM/sxt_rot.ll index e9649c7a7fd9a..013d0563246d7 100644 --- a/llvm/test/CodeGen/ARM/sxt_rot.ll +++ b/llvm/test/CodeGen/ARM/sxt_rot.ll @@ -22,7 +22,7 @@ define signext i8 @test1(i32 %A) { ; CHECK-V7: @ %bb.0: ; CHECK-V7-NEXT: sbfx r0, r0, #8, #8 ; CHECK-V7-NEXT: bx lr -; CHECk-V7: sbfx r0, r0, #8, #8 +; CHECK-V7: sbfx r0, r0, #8, #8 %B = lshr i32 %A, 8 %C = shl i32 %A, 24 %D = or i32 %B, %C diff --git a/llvm/test/CodeGen/Thumb2/LowOverheadLoops/branch-targets.ll b/llvm/test/CodeGen/Thumb2/LowOverheadLoops/branch-targets.ll index 165e73c2e8827..680d9e02a5c5c 100644 --- a/llvm/test/CodeGen/Thumb2/LowOverheadLoops/branch-targets.ll +++ b/llvm/test/CodeGen/Thumb2/LowOverheadLoops/branch-targets.ll @@ -406,7 +406,7 @@ for.cond.cleanup: ; CHECK-MID: tB %bb.1 ; CHECK-MID: bb.1.while.body: ; CHECK-MID: renamable $lr = t2LoopEndDec killed renamable $lr, %bb.1 -; CHECk-MID: tB %bb.2 +; CHECK-MID: tB %bb.2 ; CHECK-MID: bb.2.while.end: define void @check_negated_xor_wls(ptr nocapture %a, ptr nocapture readonly %b, i32 %N) { entry: @@ -440,7 +440,7 @@ while.end: ; CHECK-MID: tB %bb.1 ; CHECK-MID: bb.1.while.body: ; CHECK-MID: renamable $lr = t2LoopEndDec killed renamable $lr, %bb.1 -; CHECk-MID: tB %bb.2 +; CHECK-MID: tB %bb.2 ; CHECK-MID: bb.2.while.end: define void @check_negated_cmp_wls(ptr nocapture %a, ptr nocapture readonly %b, i32 %N) { entry: @@ -474,7 +474,7 @@ while.end: ; CHECK-MID: tB %bb.1 ; CHECK-MID: bb.1.while.body: ; CHECK-MID: renamable $lr = t2LoopEndDec killed renamable $lr, %bb.1 -; CHECk-MID: tB %bb.2 +; CHECK-MID: tB %bb.2 ; CHECK-MID: bb.2.while.end: define void @check_negated_reordered_wls(ptr nocapture %a, ptr nocapture readonly %b, i32 %N) { entry: diff --git a/llvm/test/Transforms/CallSiteSplitting/callsite-split.ll b/llvm/test/Transforms/CallSiteSplitting/callsite-split.ll index 256261d0dd11f..ea8abfb554d12 100644 --- a/llvm/test/Transforms/CallSiteSplitting/callsite-split.ll +++ b/llvm/test/Transforms/CallSiteSplitting/callsite-split.ll @@ -72,7 +72,7 @@ declare void @dummy1(ptr, ptr, ptr, ptr, ptr, ptr) ;CHECK: call void @dummy4() ;CHECK-LABEL: NextCond.split: ;CHECK: call void @dummy3() -;CheCK-LABEL: CallSiteBB: +;CHECK-LABEL: CallSiteBB: ;CHECK: call void @foo(i1 %tobool1) define void @caller2(i1 %c, ptr %a_elt, ptr %b_elt, ptr %c_elt) { entry: diff --git a/llvm/test/Transforms/Coroutines/coro-debug-coro-frame.ll b/llvm/test/Transforms/Coroutines/coro-debug-coro-frame.ll index df4f356fb6954..dff064ec084c9 100644 --- a/llvm/test/Transforms/Coroutines/coro-debug-coro-frame.ll +++ b/llvm/test/Transforms/Coroutines/coro-debug-coro-frame.ll @@ -37,7 +37,7 @@ ; CHECK-DAG: ![[UNALIGNED_UNKNOWN]] = !DIDerivedType(tag: DW_TAG_member, name: "_6",{{.*}}baseType: ![[UNALIGNED_UNKNOWN_BASE:[0-9]+]], size: 9 ; CHECK-DAG: ![[UNALIGNED_UNKNOWN_BASE]] = !DICompositeType(tag: DW_TAG_array_type, baseType: ![[UNKNOWN_TYPE_BASE]], size: 16,{{.*}} elements: ![[UNALIGNED_UNKNOWN_ELEMENTS:[0-9]+]]) ; CHECK-DAG: ![[UNALIGNED_UNKNOWN_ELEMENTS]] = !{![[UNALIGNED_UNKNOWN_SUBRANGE:[0-9]+]]} -; CHECk-DAG: ![[UNALIGNED_UNKNOWN_SUBRANGE]] = !DISubrange(count: 2, lowerBound: 0) +; CHECK-DAG: ![[UNALIGNED_UNKNOWN_SUBRANGE]] = !DISubrange(count: 2, lowerBound: 0) ; CHECK-DAG: ![[STRUCT]] = !DIDerivedType(tag: DW_TAG_member, name: "struct_big_structure_7", scope: ![[FRAME_TYPE]], file: ![[FILE]], line: [[CORO_FRAME_LINE]], baseType: ![[STRUCT_BASE:[0-9]+]] ; CHECK-DAG: ![[STRUCT_BASE]] = !DICompositeType(tag: DW_TAG_structure_type, name: "struct_big_structure"{{.*}}, align: 64, flags: DIFlagArtificial, elements: ![[STRUCT_ELEMENTS:[0-9]+]] ; CHECK-DAG: ![[STRUCT_ELEMENTS]] = !{![[MEM_TYPE:[0-9]+]]} diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/nontemporal-load-store.ll b/llvm/test/Transforms/LoopVectorize/AArch64/nontemporal-load-store.ll index 75f03c7b1a699..c7edf9bdfaf6b 100644 --- a/llvm/test/Transforms/LoopVectorize/AArch64/nontemporal-load-store.ll +++ b/llvm/test/Transforms/LoopVectorize/AArch64/nontemporal-load-store.ll @@ -259,7 +259,7 @@ for.cond.cleanup: ; preds = %for.body define i4 @test_i4_load(ptr %ddst) { ; CHECK-LABEL: define i4 @test_i4_load ; CHECK-NOT: vector.body: -; CHECk: ret i4 %{{.*}} +; CHECK: ret i4 %{{.*}} ; entry: br label %for.body @@ -282,7 +282,7 @@ define i8 @test_load_i8(ptr %ddst) { ; CHECK-LABEL: @test_load_i8( ; CHECK: vector.body: ; CHECK: load <4 x i8>, ptr {{.*}}, align 1, !nontemporal !0 -; CHECk: ret i8 %{{.*}} +; CHECK: ret i8 %{{.*}} ; entry: br label %for.body @@ -305,7 +305,7 @@ define half @test_half_load(ptr %ddst) { ; CHECK-LABEL: @test_half_load ; CHECK-LABEL: vector.body: ; CHECK: load <4 x half>, ptr {{.*}}, align 2, !nontemporal !0 -; CHECk: ret half %{{.*}} +; CHECK: ret half %{{.*}} ; entry: br label %for.body @@ -328,7 +328,7 @@ define i16 @test_i16_load(ptr %ddst) { ; CHECK-LABEL: @test_i16_load ; CHECK-LABEL: vector.body: ; CHECK: load <4 x i16>, ptr {{.*}}, align 2, !nontemporal !0 -; CHECk: ret i16 %{{.*}} +; CHECK: ret i16 %{{.*}} ; entry: br label %for.body @@ -351,7 +351,7 @@ define i32 @test_i32_load(ptr %ddst) { ; CHECK-LABEL: @test_i32_load ; CHECK-LABEL: vector.body: ; CHECK: load <4 x i32>, ptr {{.*}}, align 4, !nontemporal !0 -; CHECk: ret i32 %{{.*}} +; CHECK: ret i32 %{{.*}} ; entry: br label %for.body @@ -373,7 +373,7 @@ for.cond.cleanup: ; preds = %for.body define i33 @test_i33_load(ptr %ddst) { ; CHECK-LABEL: @test_i33_load ; CHECK-NOT: vector.body: -; CHECk: ret i33 %{{.*}} +; CHECK: ret i33 %{{.*}} ; entry: br label %for.body @@ -395,7 +395,7 @@ for.cond.cleanup: ; preds = %for.body define i40 @test_i40_load(ptr %ddst) { ; CHECK-LABEL: @test_i40_load ; CHECK-NOT: vector.body: -; CHECk: ret i40 %{{.*}} +; CHECK: ret i40 %{{.*}} ; entry: br label %for.body @@ -418,7 +418,7 @@ define i64 @test_i64_load(ptr %ddst) { ; CHECK-LABEL: @test_i64_load ; CHECK-LABEL: vector.body: ; CHECK: load <4 x i64>, ptr {{.*}}, align 4, !nontemporal !0 -; CHECk: ret i64 %{{.*}} +; CHECK: ret i64 %{{.*}} ; entry: br label %for.body @@ -441,7 +441,7 @@ define double @test_double_load(ptr %ddst) { ; CHECK-LABEL: @test_double_load ; CHECK-LABEL: vector.body: ; CHECK: load <4 x double>, ptr {{.*}}, align 4, !nontemporal !0 -; CHECk: ret double %{{.*}} +; CHECK: ret double %{{.*}} ; entry: br label %for.body @@ -464,7 +464,7 @@ define i128 @test_i128_load(ptr %ddst) { ; CHECK-LABEL: @test_i128_load ; CHECK-LABEL: vector.body: ; CHECK: load <4 x i128>, ptr {{.*}}, align 4, !nontemporal !0 -; CHECk: ret i128 %{{.*}} +; CHECK: ret i128 %{{.*}} ; entry: br label %for.body @@ -486,7 +486,7 @@ for.cond.cleanup: ; preds = %for.body define i256 @test_256_load(ptr %ddst) { ; CHECK-LABEL: @test_256_load ; CHECK-NOT: vector.body: -; CHECk: ret i256 %{{.*}} +; CHECK: ret i256 %{{.*}} ; entry: br label %for.body diff --git a/llvm/test/tools/llvm-cov/Inputs/binary-formats.canonical.json b/llvm/test/tools/llvm-cov/Inputs/binary-formats.canonical.json index ce13fc2ff6e34..33c517da91b5e 100644 --- a/llvm/test/tools/llvm-cov/Inputs/binary-formats.canonical.json +++ b/llvm/test/tools/llvm-cov/Inputs/binary-formats.canonical.json @@ -29,7 +29,7 @@ CHECK-SAME: {"branches":{"count":0,"covered":0,"notcovered":0,"percent":0}, CHECK-SAME: "functions":{"count":1,"covered":1,"percent":100}, CHECK-SAME: "instantiations":{"count":1,"covered":1,"percent":100}, CHECK-SAME: "li... [truncated] `````````` </details> https://github.com/llvm/llvm-project/pull/140373 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
