================
@@ -156,13 +192,121 @@ void sw5(int a) {
// OGCG: [[SW_EPILOG]]:
// OGCG: ret void
+void sw6(int a) {
+ switch (a) {
+ case 0:
+ case 1:
+ case 2:
+ break;
+ case 3:
+ case 4:
+ case 5:
+ break;
+ }
+}
+
+// CIR: cir.func @_Z3sw6i
+// CIR: cir.switch (%1 : !s32i) {
+// CIR-NEXT: cir.case(equal, [#cir.int<0> : !s32i]) {
+// CIR-NEXT: cir.yield
+// CIR-NEXT: }
+// CIR-NEXT: cir.case(equal, [#cir.int<1> : !s32i]) {
+// CIR-NEXT: cir.yield
+// CIR-NEXT: }
+// CIR-NEXT: cir.case(equal, [#cir.int<2> : !s32i]) {
+// CIR-NEXT: cir.break
+// CIR-NEXT: }
+// CIR-NEXT: cir.case(equal, [#cir.int<3> : !s32i]) {
+// CIR-NEXT: cir.yield
+// CIR-NEXT: }
+// CIR-NEXT: cir.case(equal, [#cir.int<4> : !s32i]) {
+// CIR-NEXT: cir.yield
+// CIR-NEXT: }
+// CIR-NEXT: cir.case(equal, [#cir.int<5> : !s32i]) {
+// CIR-NEXT: cir.break
+// CIR-NEXT: }
+
+
+// OGCG: define dso_local void @_Z3sw6i
+// OGCG: entry:
+// OGCG: %[[A_ADDR:.*]] = alloca i32, align 4
+// OGCG: store i32 %a, ptr %[[A_ADDR]], align 4
+// OGCG: %[[A_VAL:.*]] = load i32, ptr %[[A_ADDR]], align 4
+// OGCG: switch i32 %[[A_VAL]], label %[[EPILOG:.*]] [
+// OGCG: i32 0, label %[[BB0:.*]]
+// OGCG: i32 1, label %[[BB0]]
+// OGCG: i32 2, label %[[BB0]]
+// OGCG: i32 3, label %[[BB1:.*]]
+// OGCG: i32 4, label %[[BB1]]
+// OGCG: i32 5, label %[[BB1]]
+// OGCG: ]
+// OGCG: [[BB0]]:
+// OGCG: br label %[[EPILOG]]
+// OGCG: [[BB1]]:
+// OGCG: br label %[[EPILOG]]
+// OGCG: [[EPILOG]]:
+// OGCG: ret void
+
+void sw7(int a) {
+ switch (a) {
+ case 0:
+ case 1:
+ case 2:
+ int x;
+ case 3:
+ case 4:
+ case 5:
+ break;
+ }
+}
+
+// CIR: cir.func @_Z3sw7i
+// CIR: cir.case(equal, [#cir.int<0> : !s32i]) {
+// CIR-NEXT: cir.yield
+// CIR-NEXT: }
+// CIR-NEXT: cir.case(equal, [#cir.int<1> : !s32i]) {
+// CIR-NEXT: cir.yield
+// CIR-NEXT: }
+// CIR-NEXT: cir.case(equal, [#cir.int<2> : !s32i]) {
+// CIR-NEXT: cir.yield
+// CIR-NEXT: }
+// CIR-NEXT: cir.case(equal, [#cir.int<3> : !s32i]) {
----------------
Andres-Salamanca wrote:
DONE
https://github.com/llvm/llvm-project/pull/138003
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