https://github.com/wangpc-pp updated 
https://github.com/llvm/llvm-project/pull/136842

>From 723976e74398e12252a599e3aabb05ec8f2515ab Mon Sep 17 00:00:00 2001
From: Pengcheng Wang <wangpengcheng...@bytedance.com>
Date: Wed, 23 Apr 2025 18:19:41 +0800
Subject: [PATCH 1/4] [RISCV] Allow `Zicsr`/`Zifencei` to duplicate with `g`

This matches GCC and we supported it in LLVM 17/18.

Fixes #136803
---
 clang/docs/ReleaseNotes.rst                      |  2 ++
 llvm/lib/TargetParser/RISCVISAInfo.cpp           | 14 +++++++++++---
 llvm/unittests/TargetParser/RISCVISAInfoTest.cpp |  8 ++++++++
 3 files changed, 21 insertions(+), 3 deletions(-)

diff --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst
index 5ccd346a93b4f..632d8396ed3b6 100644
--- a/clang/docs/ReleaseNotes.rst
+++ b/clang/docs/ReleaseNotes.rst
@@ -632,6 +632,8 @@ RISC-V Support
   Qualcomm's `Xqciint` extension to save and restore some GPRs in interrupt
   service routines.
 
+- `Zicsr` / `Zifencei` are allowed to duplicate with `g` in `-march`.
+
 CUDA/HIP Language Changes
 ^^^^^^^^^^^^^^^^^^^^^^^^^
 
diff --git a/llvm/lib/TargetParser/RISCVISAInfo.cpp 
b/llvm/lib/TargetParser/RISCVISAInfo.cpp
index ff0174210f87f..3217762f0b93a 100644
--- a/llvm/lib/TargetParser/RISCVISAInfo.cpp
+++ b/llvm/lib/TargetParser/RISCVISAInfo.cpp
@@ -45,9 +45,8 @@ struct RISCVProfile {
 
 } // end anonymous namespace
 
-static const char *RISCVGImplications[] = {
-  "i", "m", "a", "f", "d", "zicsr", "zifencei"
-};
+static const char *RISCVGImplications[] = {"i", "m", "a", "f", "d"};
+static const char *RISCVGImplicationsZi[] = {"zicsr", "zifencei"};
 
 #define GET_SUPPORTED_EXTENSIONS
 #include "llvm/TargetParser/RISCVTargetParserDef.inc"
@@ -717,6 +716,15 @@ RISCVISAInfo::parseArchString(StringRef Arch, bool 
EnableExperimentalExtension,
     } while (!Ext.empty());
   }
 
+  // We add Zicsr/Zifenci as final to allow duplicated "zicsr"/"zifencei".
+  if (Baseline == 'g') {
+    for (const char *Ext : RISCVGImplicationsZi) {
+      auto Version = findDefaultVersion(Ext);
+      assert(Version && "Default extension version not found?");
+      ISAInfo->Exts[std::string(Ext)] = {Version->Major, Version->Minor};
+    }
+  }
+
   return RISCVISAInfo::postProcessAndChecking(std::move(ISAInfo));
 }
 
diff --git a/llvm/unittests/TargetParser/RISCVISAInfoTest.cpp 
b/llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
index 43896fede57d8..0bea138560895 100644
--- a/llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
+++ b/llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
@@ -512,6 +512,14 @@ TEST(ParseArchString, RejectsDoubleOrTrailingUnderscore) {
 }
 
 TEST(ParseArchString, RejectsDuplicateExtensionNames) {
+  // Zicsr/Zifencei are allowed to duplicate with "g".
+  ASSERT_THAT_EXPECTED(RISCVISAInfo::parseArchString("rv64g_zicsr", true),
+                       Succeeded());
+  ASSERT_THAT_EXPECTED(RISCVISAInfo::parseArchString("rv64g_zifencei", true),
+                       Succeeded());
+  ASSERT_THAT_EXPECTED(
+      RISCVISAInfo::parseArchString("rv64g_zicsr_zifencei", true), 
Succeeded());
+
   EXPECT_EQ(toString(RISCVISAInfo::parseArchString("rv64ii", 
true).takeError()),
             "invalid standard user-level extension 'i'");
   EXPECT_EQ(toString(RISCVISAInfo::parseArchString("rv32ee", 
true).takeError()),

>From bc1b1b8e5b4b9d44a10bbed878fb2d12b7ed5b77 Mon Sep 17 00:00:00 2001
From: Pengcheng Wang <wangpengcheng...@bytedance.com>
Date: Wed, 23 Apr 2025 21:37:06 +0800
Subject: [PATCH 2/4] Apply suggestions

---
 clang/docs/ReleaseNotes.rst            | 2 +-
 llvm/lib/TargetParser/RISCVISAInfo.cpp | 3 ++-
 2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst
index 632d8396ed3b6..a4ae31c912161 100644
--- a/clang/docs/ReleaseNotes.rst
+++ b/clang/docs/ReleaseNotes.rst
@@ -632,7 +632,7 @@ RISC-V Support
   Qualcomm's `Xqciint` extension to save and restore some GPRs in interrupt
   service routines.
 
-- `Zicsr` / `Zifencei` are allowed to duplicate with `g` in `-march`.
+- `Zicsr` / `Zifencei` are allowed to be duplicated in the presence of `g` in 
`-march`.
 
 CUDA/HIP Language Changes
 ^^^^^^^^^^^^^^^^^^^^^^^^^
diff --git a/llvm/lib/TargetParser/RISCVISAInfo.cpp 
b/llvm/lib/TargetParser/RISCVISAInfo.cpp
index 3217762f0b93a..8b6ae71320b4f 100644
--- a/llvm/lib/TargetParser/RISCVISAInfo.cpp
+++ b/llvm/lib/TargetParser/RISCVISAInfo.cpp
@@ -716,7 +716,8 @@ RISCVISAInfo::parseArchString(StringRef Arch, bool 
EnableExperimentalExtension,
     } while (!Ext.empty());
   }
 
-  // We add Zicsr/Zifenci as final to allow duplicated "zicsr"/"zifencei".
+  // We add Zicsr/Zifenci as final to allow duplicated "zicsr"/"zifencei" like
+  // "rv64g_zicsr_zifencei".
   if (Baseline == 'g') {
     for (const char *Ext : RISCVGImplicationsZi) {
       auto Version = findDefaultVersion(Ext);

>From ddd46bf4f4553970a572a09f897af6830694605e Mon Sep 17 00:00:00 2001
From: Pengcheng Wang <wangpengcheng...@bytedance.com>
Date: Wed, 23 Apr 2025 21:38:48 +0800
Subject: [PATCH 3/4] Remove release notes temporarily

---
 clang/docs/ReleaseNotes.rst | 2 --
 1 file changed, 2 deletions(-)

diff --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst
index a4ae31c912161..5ccd346a93b4f 100644
--- a/clang/docs/ReleaseNotes.rst
+++ b/clang/docs/ReleaseNotes.rst
@@ -632,8 +632,6 @@ RISC-V Support
   Qualcomm's `Xqciint` extension to save and restore some GPRs in interrupt
   service routines.
 
-- `Zicsr` / `Zifencei` are allowed to be duplicated in the presence of `g` in 
`-march`.
-
 CUDA/HIP Language Changes
 ^^^^^^^^^^^^^^^^^^^^^^^^^
 

>From 792283185c4b033dee003d324ff649e260f5e362 Mon Sep 17 00:00:00 2001
From: Pengcheng Wang <wangpengcheng...@bytedance.com>
Date: Wed, 23 Apr 2025 23:20:34 +0800
Subject: [PATCH 4/4] Skip if existed

---
 llvm/lib/TargetParser/RISCVISAInfo.cpp | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/llvm/lib/TargetParser/RISCVISAInfo.cpp 
b/llvm/lib/TargetParser/RISCVISAInfo.cpp
index 8b6ae71320b4f..ad7bdcd112459 100644
--- a/llvm/lib/TargetParser/RISCVISAInfo.cpp
+++ b/llvm/lib/TargetParser/RISCVISAInfo.cpp
@@ -720,6 +720,9 @@ RISCVISAInfo::parseArchString(StringRef Arch, bool 
EnableExperimentalExtension,
   // "rv64g_zicsr_zifencei".
   if (Baseline == 'g') {
     for (const char *Ext : RISCVGImplicationsZi) {
+      if (ISAInfo->Exts.count(Ext))
+        continue;
+
       auto Version = findDefaultVersion(Ext);
       assert(Version && "Default extension version not found?");
       ISAInfo->Exts[std::string(Ext)] = {Version->Major, Version->Minor};

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