================
@@ -2040,6 +2043,8 @@ void AMDGPUCodeGenPassBuilder::addIRPasses(AddIRPass
&addPass) const {
// but EarlyCSE can do neither of them.
if (isPassEnabled(EnableScalarIRPasses))
addEarlyCSEOrGVNPass(addPass);
+
+ addPass(AMDGPUTargetVerifierPass());
----------------
jofrn wrote:
Oh, I didn't use it yet within the AMDGPU target. I'll add it in.
https://github.com/llvm/llvm-project/pull/123609
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