llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT--> @llvm/pr-subscribers-clang Author: Ben Shi (benshi001) <details> <summary>Changes</summary> Allow the value 64 to be round up to 0 for constraint 'I'. --- Full diff: https://github.com/llvm/llvm-project/pull/136534.diff 3 Files Affected: - (modified) clang/lib/Basic/Targets/AVR.h (+1-1) - (modified) clang/test/CodeGen/avr/avr-inline-asm-constraints.c (+2) - (modified) clang/test/CodeGen/avr/avr-unsupported-inline-asm-constraints.c (+1) ``````````diff diff --git a/clang/lib/Basic/Targets/AVR.h b/clang/lib/Basic/Targets/AVR.h index 2117ab58e6f30..b2f2711c35435 100644 --- a/clang/lib/Basic/Targets/AVR.h +++ b/clang/lib/Basic/Targets/AVR.h @@ -124,7 +124,7 @@ class LLVM_LIBRARY_VISIBILITY AVRTargetInfo : public TargetInfo { Info.setAllowsRegister(); return true; case 'I': // 6-bit positive integer constant - Info.setRequiresImmediate(0, 63); + Info.setRequiresImmediate(0, 64); return true; case 'J': // 6-bit negative integer constant Info.setRequiresImmediate(-63, 0); diff --git a/clang/test/CodeGen/avr/avr-inline-asm-constraints.c b/clang/test/CodeGen/avr/avr-inline-asm-constraints.c index 3a956de8db48f..c8d83b4848312 100644 --- a/clang/test/CodeGen/avr/avr-inline-asm-constraints.c +++ b/clang/test/CodeGen/avr/avr-inline-asm-constraints.c @@ -71,6 +71,8 @@ void z() { void I() { // CHECK: call addrspace(0) void asm sideeffect "subi r30, $0", "I"(i16 50) asm("subi r30, %0" :: "I"(50)); + // CHECK: call addrspace(0) void asm sideeffect "subi r30, $0", "I"(i16 64) + asm("subi r30, %0" :: "I"(64)); } void J() { diff --git a/clang/test/CodeGen/avr/avr-unsupported-inline-asm-constraints.c b/clang/test/CodeGen/avr/avr-unsupported-inline-asm-constraints.c index 29f0b69285fa8..52b8d1cb044ca 100644 --- a/clang/test/CodeGen/avr/avr-unsupported-inline-asm-constraints.c +++ b/clang/test/CodeGen/avr/avr-unsupported-inline-asm-constraints.c @@ -6,4 +6,5 @@ int foo(void) { __asm__ volatile("foo %0, 1" : : "fo" (val)); // expected-error {{invalid input constraint 'fo' in asm}} __asm__ volatile("foo %0, 1" : : "Nd" (val)); // expected-error {{invalid input constraint 'Nd' in asm}} __asm__ volatile("subi r30, %0" : : "G" (1)); // expected-error {{value '1' out of range for constraint 'G'}} + __asm__ volatile("out %0, r20" : : "I" (65)); // expected-error {{value '65' out of range for constraint 'I'}} } `````````` </details> https://github.com/llvm/llvm-project/pull/136534 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
