JonPsson1 wrote:

> This is about whether we can (and should) implement a fp->u32 conversion via 
> fp->s64->u32.

Thanks for explaining - I updated the comment just a little bit so it is - at 
least to me - a bit easier to follow.

> I see that the LowerOperationWrapper still emits i128 operations. (E.g. you 
> expand a f16->i128 into a f16->f32 and f32->i128) But that routine is called 
> because of the illegal input type i128, so I understand it must not leave any 
> operations with the illegal type; rather, it should complete the expansion 
> fully.

My understanding is that the TypeLegalizer calls here for *all* i128 
operands/results, even though generally it is doing most of the work. The 
target is allowed to do custom lowerings, but it doesn't have to. New nodes 
will be revisited if returned in Results.

> This is annoying since for legal i128 we do the expansion in LowerOperation 
> while for illegal i128 we do it in LowerOperationWrapper..

I followed your example of calling LowerOperationWrapper instead to avoid the 
code duplication - looks better.

> Why can't you still do the promotion via the Promote action for i32? Then you 
> wouldn't have to duplicate the common-code case

You are right, that is unnecessary. I must have gotten carried away with 
"extending all f16:s", not realizing that common code actually does this in 
this case.

> Ah, this implementation is quite inefficient. There should be no extend/trunc 
> libcalls needed at all: the sign bit in f16 is in the same place as f32 or 
> f64, so the actual CPSDR instruction should simply work on f16 too.

Added new opcodes for half per what was previously done for float and double. 
Special handling needed to remove the fpround for f128 as it would otherwise be 
lowered to a libcall. (The fpround for f128 could be removed for float and 
double as well, but there are currently no tests for this).


https://github.com/llvm/llvm-project/pull/109164
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