[clang] [Clang][AArch64] Add fp8 variants for untyped NEON intrinsics (PR #128019)

[via cfe-commits]

https://github.com/Lukacma updated 
https://github.com/llvm/llvm-project/pull/128019

>From c331c4c260b6432b6ae96723f78c16b189e9297a Mon Sep 17 00:00:00 2001
From: Marian Lukac <marian.lu...@arm.com>
Date: Thu, 20 Feb 2025 15:35:45 +0000
Subject: [PATCH] [Clang][AArch64] Add fp8 variants for untyped NEON intrinsics

This patch adds fp8 variants to existing intrinsics, whose operation
doesn't depend on arguments being a specific type.
---
 clang/include/clang/Basic/arm_neon.td         |   74 +-
 clang/lib/AST/Type.cpp                        |    5 +
 clang/lib/CodeGen/CGCall.cpp                  |    9 +
 clang/lib/CodeGen/TargetBuiltins/ARM.cpp      |   20 +
 clang/lib/Sema/SemaInit.cpp                   |    2 +
 .../fp8-intrinsics/acle_neon_fp8_untyped.c    | 1114 +++++++++++++++++
 6 files changed, 1220 insertions(+), 4 deletions(-)
 create mode 100644 
clang/test/CodeGen/AArch64/fp8-intrinsics/acle_neon_fp8_untyped.c

diff --git a/clang/include/clang/Basic/arm_neon.td 
b/clang/include/clang/Basic/arm_neon.td
index ab0051efe5159..90f0e90e4a7f8 100644
--- a/clang/include/clang/Basic/arm_neon.td
+++ b/clang/include/clang/Basic/arm_neon.td
@@ -2090,17 +2090,17 @@ let ArchGuard = "defined(__aarch64__) || 
defined(__arm64ec__)", TargetGuard = "r
 
 // Lookup table read with 2-bit/4-bit indices
 let ArchGuard = "defined(__aarch64__)", TargetGuard = "lut" in {
-  def VLUTI2_B    : SInst<"vluti2_lane", "Q.(qU)I", "cUcPcQcQUcQPc",
+  def VLUTI2_B    : SInst<"vluti2_lane", "Q.(qU)I", "cUcPcmQcQUcQPcQm",
                          [ImmCheck<2, ImmCheck0_1>]>;
-  def VLUTI2_B_Q  : SInst<"vluti2_laneq", "Q.(QU)I", "cUcPcQcQUcQPc",
+  def VLUTI2_B_Q  : SInst<"vluti2_laneq", "Q.(QU)I", "cUcPcmQcQUcQPcQm",
                          [ImmCheck<2, ImmCheck0_3>]>;
   def VLUTI2_H    : SInst<"vluti2_lane", "Q.(<qU)I", "sUsPshQsQUsQPsQh",
                          [ImmCheck<2, ImmCheck0_3>]>;
   def VLUTI2_H_Q  : SInst<"vluti2_laneq", "Q.(<QU)I", "sUsPshQsQUsQPsQh",
                          [ImmCheck<2, ImmCheck0_7>]>;
-  def VLUTI4_B    : SInst<"vluti4_lane", "..(qU)I", "QcQUcQPc",
+  def VLUTI4_B    : SInst<"vluti4_lane", "..(qU)I", "QcQUcQPcQm",
                          [ImmCheck<2, ImmCheck0_0>]>;
-  def VLUTI4_B_Q  : SInst<"vluti4_laneq", "..UI", "QcQUcQPc",
+  def VLUTI4_B_Q  : SInst<"vluti4_laneq", "..UI", "QcQUcQPcQm",
                          [ImmCheck<2, ImmCheck0_1>]>;
   def VLUTI4_H_X2 : SInst<"vluti4_lane_x2", ".2(<qU)I", "QsQUsQPsQh",
                           [ImmCheck<3, ImmCheck0_1>]>;
@@ -2194,4 +2194,70 @@ let ArchGuard = "defined(__aarch64__)", TargetGuard = 
"fp8,neon" in {
   // fscale
   def FSCALE_V128 : WInst<"vscale", "..(.S)", "QdQfQh">;
   def FSCALE_V64 : WInst<"vscale", "(.q)(.q)(.qS)", "fh">;
+}
+
+//FP8 versions of untyped intrinsics
+let ArchGuard = "defined(__aarch64__)" in {
+  def VGET_LANE_MF8 : IInst<"vget_lane", "1.I", "mQm", [ImmCheck<1, 
ImmCheckLaneIndex, 0>]>;
+  def SPLAT_MF8 : WInst<"splat_lane", ".(!q)I", "mQm", [ImmCheck<1, 
ImmCheckLaneIndex, 0>]>;
+  def SPLATQ_MF8 : WInst<"splat_laneq", ".(!Q)I", "mQm", [ImmCheck<1, 
ImmCheckLaneIndex, 0>]>;
+  def VSET_LANE_MF8 : IInst<"vset_lane", ".1.I", "mQm", [ImmCheck<2, 
ImmCheckLaneIndex, 1>]>;
+  def VCREATE_MF8 : NoTestOpInst<"vcreate", ".(IU>)", "m", OP_CAST> { let 
BigEndianSafe = 1; }
+  let InstName = "vmov" in {
+    def VDUP_N_MF8 : WOpInst<"vdup_n", ".1", "mQm", OP_DUP>;
+    def VMOV_N_MF8 : WOpInst<"vmov_n", ".1", "mQm", OP_DUP>;
+  }
+  let InstName = "" in
+    def VDUP_LANE_MF8: WOpInst<"vdup_lane", ".qI", "mQm", OP_DUP_LN>;
+  def VCOMBINE_MF8 : NoTestOpInst<"vcombine", "Q..", "m", OP_CONC>;
+  let InstName = "vmov" in {
+    def VGET_HIGH_MF8 : NoTestOpInst<"vget_high", ".Q", "m", OP_HI>;
+    def VGET_LOW_MF8 : NoTestOpInst<"vget_low", ".Q", "m", OP_LO>;
+  }
+  let InstName = "vtbl" in {
+    def VTBL1_MF8 : WInst<"vtbl1", "..p", "m">;
+    def VTBL2_MF8 : WInst<"vtbl2", ".2p", "m">;
+    def VTBL3_MF8 : WInst<"vtbl3", ".3p", "m">;
+    def VTBL4_MF8 : WInst<"vtbl4", ".4p", "m">;
+  }
+  let InstName = "vtbx" in {
+    def VTBX1_MF8 : WInst<"vtbx1", "...p", "m">;
+    def VTBX2_MF8 : WInst<"vtbx2", "..2p", "m">;
+    def VTBX3_MF8 : WInst<"vtbx3", "..3p", "m">;
+    def VTBX4_MF8 : WInst<"vtbx4", "..4p", "m">;
+  }
+  def VEXT_MF8 : WInst<"vext", "...I", "mQm", [ImmCheck<2, ImmCheckLaneIndex, 
0>]>;
+  def VREV64_MF8 : WOpInst<"vrev64", "..", "mQm", OP_REV64>;
+  def VREV32_MF8 : WOpInst<"vrev32", "..", "mQm", OP_REV32>;
+  def VREV16_MF8 : WOpInst<"vrev16", "..", "mQm", OP_REV16>;
+  let isHiddenLInst = 1 in 
+  def VBSL_MF8 : SInst<"vbsl", ".U..", "mQm">;
+  def VTRN_MF8 : WInst<"vtrn", "2..", "mQm">;
+  def VZIP_MF8 : WInst<"vzip", "2..", "mQm">;
+  def VUZP_MF8 : WInst<"vuzp", "2..", "mQm">;
+  def COPY_LANE_MF8 : IOpInst<"vcopy_lane", "..I.I", "m", OP_COPY_LN>;
+  def COPYQ_LANE_MF8 : IOpInst<"vcopy_lane", "..IqI", "Qm", OP_COPY_LN>;
+  def COPY_LANEQ_MF8 : IOpInst<"vcopy_laneq", "..IQI", "m", OP_COPY_LN>;
+  def COPYQ_LANEQ_MF8 : IOpInst<"vcopy_laneq", "..I.I", "Qm", OP_COPY_LN>;
+  def VDUP_LANE2_MF8 : WOpInst<"vdup_laneq", ".QI", "mQm", OP_DUP_LN>;
+  def VTRN1_MF8 : SOpInst<"vtrn1", "...", "mQm", OP_TRN1>;
+  def VZIP1_MF8 : SOpInst<"vzip1", "...", "mQm", OP_ZIP1>;
+  def VUZP1_MF8 : SOpInst<"vuzp1", "...", "mQm", OP_UZP1>;
+  def VTRN2_MF8 : SOpInst<"vtrn2", "...", "mQm", OP_TRN2>;
+  def VZIP2_MF8 : SOpInst<"vzip2", "...", "mQm", OP_ZIP2>;
+  def VUZP2_MF8 : SOpInst<"vuzp2", "...", "mQm", OP_UZP2>;
+  let InstName = "vtbl" in {
+    def VQTBL1_A64_MF8 : WInst<"vqtbl1", ".QU", "mQm">;
+    def VQTBL2_A64_MF8 : WInst<"vqtbl2", ".(2Q)U", "mQm">;
+    def VQTBL3_A64_MF8 : WInst<"vqtbl3", ".(3Q)U", "mQm">;
+    def VQTBL4_A64_MF8 : WInst<"vqtbl4", ".(4Q)U", "mQm">;
+  }
+  let InstName = "vtbx" in {
+    def VQTBX1_A64_MF8 : WInst<"vqtbx1", "..QU", "mQm">;
+    def VQTBX2_A64_MF8 : WInst<"vqtbx2", "..(2Q)U", "mQm">;
+    def VQTBX3_A64_MF8 : WInst<"vqtbx3", "..(3Q)U", "mQm">;
+    def VQTBX4_A64_MF8 : WInst<"vqtbx4", "..(4Q)U", "mQm">;
+  }
+  def SCALAR_VDUP_LANE_MF8 : IInst<"vdup_lane", "1.I", "Sm", [ImmCheck<1, 
ImmCheckLaneIndex, 0>]>;
+  def SCALAR_VDUP_LANEQ_MF8 : IInst<"vdup_laneq", "1QI", "Sm", [ImmCheck<1, 
ImmCheckLaneIndex, 0>]>;
 }
\ No newline at end of file
diff --git a/clang/lib/AST/Type.cpp b/clang/lib/AST/Type.cpp
index 08798219c0b83..1404cb5b8007f 100644
--- a/clang/lib/AST/Type.cpp
+++ b/clang/lib/AST/Type.cpp
@@ -2782,6 +2782,11 @@ static bool isTriviallyCopyableTypeImpl(const QualType 
&type,
   if (CanonicalType->isScalarType() || CanonicalType->isVectorType())
     return true;
 
+  // Mfloat8 type is a special case as it not scalar, but is still trivially
+  // copyable.
+  if (CanonicalType->isMFloat8Type())
+    return true;
+
   if (const auto *RT = CanonicalType->getAs<RecordType>()) {
     if (const auto *ClassDecl = dyn_cast<CXXRecordDecl>(RT->getDecl())) {
       if (IsCopyConstructible) {
diff --git a/clang/lib/CodeGen/CGCall.cpp b/clang/lib/CodeGen/CGCall.cpp
index 3cefa3b0c585c..77a955285aa30 100644
--- a/clang/lib/CodeGen/CGCall.cpp
+++ b/clang/lib/CodeGen/CGCall.cpp
@@ -5464,6 +5464,15 @@ RValue CodeGenFunction::EmitCall(const CGFunctionInfo 
&CallInfo,
           Builder.CreateStore(errorValue, swiftErrorTemp);
         }
 
+        // Mfloat8 type is loaded as scalar type, but is treated as single
+        // vector type for other operations. We need to bitcast it to the 
vector
+        // type here.
+        if (auto *EltTy =
+                dyn_cast<llvm::FixedVectorType>(ArgInfo.getCoerceToType());
+            EltTy && EltTy->getNumElements() == 1 &&
+            V->getType() == EltTy->getScalarType())
+          V = Builder.CreateBitCast(V, EltTy);
+
         // We might have to widen integers, but we should never truncate.
         if (ArgInfo.getCoerceToType() != V->getType() &&
             V->getType()->isIntegerTy())
diff --git a/clang/lib/CodeGen/TargetBuiltins/ARM.cpp 
b/clang/lib/CodeGen/TargetBuiltins/ARM.cpp
index afe25b5418424..b8b9b4c903632 100644
--- a/clang/lib/CodeGen/TargetBuiltins/ARM.cpp
+++ b/clang/lib/CodeGen/TargetBuiltins/ARM.cpp
@@ -2623,22 +2623,26 @@ static bool HasExtraNeonArgument(unsigned BuiltinID) {
   case NEON::BI__builtin_neon_vget_lane_bf16:
   case NEON::BI__builtin_neon_vget_lane_i32:
   case NEON::BI__builtin_neon_vget_lane_i64:
+  case NEON::BI__builtin_neon_vget_lane_mf8:
   case NEON::BI__builtin_neon_vget_lane_f32:
   case NEON::BI__builtin_neon_vgetq_lane_i8:
   case NEON::BI__builtin_neon_vgetq_lane_i16:
   case NEON::BI__builtin_neon_vgetq_lane_bf16:
   case NEON::BI__builtin_neon_vgetq_lane_i32:
   case NEON::BI__builtin_neon_vgetq_lane_i64:
+  case NEON::BI__builtin_neon_vgetq_lane_mf8:
   case NEON::BI__builtin_neon_vgetq_lane_f32:
   case NEON::BI__builtin_neon_vduph_lane_bf16:
   case NEON::BI__builtin_neon_vduph_laneq_bf16:
   case NEON::BI__builtin_neon_vset_lane_i8:
+  case NEON::BI__builtin_neon_vset_lane_mf8:
   case NEON::BI__builtin_neon_vset_lane_i16:
   case NEON::BI__builtin_neon_vset_lane_bf16:
   case NEON::BI__builtin_neon_vset_lane_i32:
   case NEON::BI__builtin_neon_vset_lane_i64:
   case NEON::BI__builtin_neon_vset_lane_f32:
   case NEON::BI__builtin_neon_vsetq_lane_i8:
+  case NEON::BI__builtin_neon_vsetq_lane_mf8:
   case NEON::BI__builtin_neon_vsetq_lane_i16:
   case NEON::BI__builtin_neon_vsetq_lane_bf16:
   case NEON::BI__builtin_neon_vsetq_lane_i32:
@@ -6161,6 +6165,10 @@ Value *CodeGenFunction::EmitAArch64BuiltinExpr(unsigned 
BuiltinID,
         Builder.CreateBitCast(Ops[1], llvm::FixedVectorType::get(DoubleTy, 1));
     Ops.push_back(EmitScalarExpr(E->getArg(2)));
     return Builder.CreateInsertElement(Ops[1], Ops[0], Ops[2], "vset_lane");
+  case NEON::BI__builtin_neon_vset_lane_mf8:
+  case NEON::BI__builtin_neon_vsetq_lane_mf8:
+    Ops.push_back(EmitScalarExpr(E->getArg(2)));
+    return Builder.CreateInsertElement(Ops[1], Ops[0], Ops[2], "vset_lane");
   case NEON::BI__builtin_neon_vsetq_lane_f64:
     // The vector type needs a cast for the v2f64 variant.
     Ops[1] =
@@ -6180,6 +6188,12 @@ Value *CodeGenFunction::EmitAArch64BuiltinExpr(unsigned 
BuiltinID,
         Builder.CreateBitCast(Ops[0], llvm::FixedVectorType::get(Int8Ty, 16));
     return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)),
                                         "vgetq_lane");
+  case NEON::BI__builtin_neon_vget_lane_mf8:
+  case NEON::BI__builtin_neon_vdupb_lane_mf8:
+  case NEON::BI__builtin_neon_vgetq_lane_mf8:
+  case NEON::BI__builtin_neon_vdupb_laneq_mf8:
+    return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)),
+                                        "vget_lane");
   case NEON::BI__builtin_neon_vget_lane_i16:
   case NEON::BI__builtin_neon_vduph_lane_i16:
     Ops[0] =
@@ -7629,6 +7643,7 @@ Value *CodeGenFunction::EmitAArch64BuiltinExpr(unsigned 
BuiltinID,
     return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vuqadd");
   }
 
+  case NEON::BI__builtin_neon_vluti2_laneq_mf8:
   case NEON::BI__builtin_neon_vluti2_laneq_bf16:
   case NEON::BI__builtin_neon_vluti2_laneq_f16:
   case NEON::BI__builtin_neon_vluti2_laneq_p16:
@@ -7644,6 +7659,7 @@ Value *CodeGenFunction::EmitAArch64BuiltinExpr(unsigned 
BuiltinID,
                                              /*isQuad*/ false));
     return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vluti2_laneq");
   }
+  case NEON::BI__builtin_neon_vluti2q_laneq_mf8:
   case NEON::BI__builtin_neon_vluti2q_laneq_bf16:
   case NEON::BI__builtin_neon_vluti2q_laneq_f16:
   case NEON::BI__builtin_neon_vluti2q_laneq_p16:
@@ -7659,6 +7675,7 @@ Value *CodeGenFunction::EmitAArch64BuiltinExpr(unsigned 
BuiltinID,
                                              /*isQuad*/ true));
     return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vluti2_laneq");
   }
+  case NEON::BI__builtin_neon_vluti2_lane_mf8:
   case NEON::BI__builtin_neon_vluti2_lane_bf16:
   case NEON::BI__builtin_neon_vluti2_lane_f16:
   case NEON::BI__builtin_neon_vluti2_lane_p16:
@@ -7674,6 +7691,7 @@ Value *CodeGenFunction::EmitAArch64BuiltinExpr(unsigned 
BuiltinID,
                                              /*isQuad*/ false));
     return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vluti2_lane");
   }
+  case NEON::BI__builtin_neon_vluti2q_lane_mf8:
   case NEON::BI__builtin_neon_vluti2q_lane_bf16:
   case NEON::BI__builtin_neon_vluti2q_lane_f16:
   case NEON::BI__builtin_neon_vluti2q_lane_p16:
@@ -7689,12 +7707,14 @@ Value *CodeGenFunction::EmitAArch64BuiltinExpr(unsigned 
BuiltinID,
                                              /*isQuad*/ true));
     return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vluti2_lane");
   }
+  case NEON::BI__builtin_neon_vluti4q_lane_mf8:
   case NEON::BI__builtin_neon_vluti4q_lane_p8:
   case NEON::BI__builtin_neon_vluti4q_lane_s8:
   case NEON::BI__builtin_neon_vluti4q_lane_u8: {
     Int = Intrinsic::aarch64_neon_vluti4q_lane;
     return EmitNeonCall(CGM.getIntrinsic(Int, Ty), Ops, "vluti4q_lane");
   }
+  case NEON::BI__builtin_neon_vluti4q_laneq_mf8:
   case NEON::BI__builtin_neon_vluti4q_laneq_p8:
   case NEON::BI__builtin_neon_vluti4q_laneq_s8:
   case NEON::BI__builtin_neon_vluti4q_laneq_u8: {
diff --git a/clang/lib/Sema/SemaInit.cpp b/clang/lib/Sema/SemaInit.cpp
index 9814c3f456f0d..890e9c3df7f62 100644
--- a/clang/lib/Sema/SemaInit.cpp
+++ b/clang/lib/Sema/SemaInit.cpp
@@ -1944,6 +1944,8 @@ void InitListChecker::CheckVectorType(const 
InitializedEntity &Entity,
         typeCode = "s";
       else if (elementType->isUnsignedIntegerType())
         typeCode = "u";
+      else if (elementType->isMFloat8Type())
+        typeCode = "mf";
       else
         llvm_unreachable("Invalid element type!");
 
diff --git a/clang/test/CodeGen/AArch64/fp8-intrinsics/acle_neon_fp8_untyped.c 
b/clang/test/CodeGen/AArch64/fp8-intrinsics/acle_neon_fp8_untyped.c
new file mode 100644
index 0000000000000..fec1a93bdd5e9
--- /dev/null
+++ b/clang/test/CodeGen/AArch64/fp8-intrinsics/acle_neon_fp8_untyped.c
@@ -0,0 +1,1114 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py 
UTC_ARGS: --version 5
+#include <arm_neon.h>
+
+// RUN: %clang_cc1  -triple aarch64-none-linux-gnu -target-feature +neon 
-target-feature +lut -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt 
-S -p mem2reg,sroa | FileCheck %s
+
+// REQUIRES: aarch64-registered-target
+
+// CHECK-LABEL: define dso_local <8 x i8> @test_vset_lane_mf8(
+// CHECK-SAME: <1 x i8> [[A:%.*]], <8 x i8> [[B:%.*]]) #[[ATTR0:[0-9]+]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <1 x i8> [[A]] to i8
+// CHECK-NEXT:    [[VSET_LANE:%.*]] = insertelement <8 x i8> [[B]], i8 
[[TMP0]], i32 7
+// CHECK-NEXT:    ret <8 x i8> [[VSET_LANE]]
+//
+mfloat8x8_t test_vset_lane_mf8(mfloat8_t a, mfloat8x8_t b) {
+  return vset_lane_mf8(a, b, 7);
+}
+
+// CHECK-LABEL: define dso_local <16 x i8> @test_vsetq_lane_mf8(
+// CHECK-SAME: <1 x i8> [[A:%.*]], <16 x i8> [[B:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <1 x i8> [[A]] to i8
+// CHECK-NEXT:    [[VSET_LANE:%.*]] = insertelement <16 x i8> [[B]], i8 
[[TMP0]], i32 15
+// CHECK-NEXT:    ret <16 x i8> [[VSET_LANE]]
+//
+mfloat8x16_t test_vsetq_lane_mf8(mfloat8_t a, mfloat8x16_t b) {
+  return vsetq_lane_mf8(a, b, 15);
+}
+
+
+// CHECK-LABEL: define dso_local <1 x i8> @test_vget_lane_mf8(
+// CHECK-SAME: <8 x i8> [[A:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[VGET_LANE:%.*]] = extractelement <8 x i8> [[A]], i32 7
+// CHECK-NEXT:    [[TMP0:%.*]] = bitcast i8 [[VGET_LANE]] to <1 x i8>
+// CHECK-NEXT:    ret <1 x i8> [[TMP0]]
+//
+mfloat8_t test_vget_lane_mf8(mfloat8x8_t a) {
+  return vget_lane_mf8(a, 7);
+}
+
+// CHECK-LABEL: define dso_local <1 x i8> @test_vdupb_lane_mf8(
+// CHECK-SAME: <8 x i8> [[A:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[VGET_LANE:%.*]] = extractelement <8 x i8> [[A]], i32 7
+// CHECK-NEXT:    [[TMP0:%.*]] = bitcast i8 [[VGET_LANE]] to <1 x i8>
+// CHECK-NEXT:    ret <1 x i8> [[TMP0]]
+//
+mfloat8_t test_vdupb_lane_mf8(mfloat8x8_t a) {
+  return vdupb_lane_mf8(a, 7);
+}
+
+// CHECK-LABEL: define dso_local <1 x i8> @test_vgetq_lane_mf8(
+// CHECK-SAME: <16 x i8> [[A:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[VGET_LANE:%.*]] = extractelement <16 x i8> [[A]], i32 15
+// CHECK-NEXT:    [[TMP0:%.*]] = bitcast i8 [[VGET_LANE]] to <1 x i8>
+// CHECK-NEXT:    ret <1 x i8> [[TMP0]]
+//
+mfloat8_t test_vgetq_lane_mf8(mfloat8x16_t a) {
+  return vgetq_lane_mf8(a, 15);
+}
+
+// CHECK-LABEL: define dso_local <1 x i8> @test_vdupb_laneq_mf8(
+// CHECK-SAME: <16 x i8> [[A:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[VGET_LANE:%.*]] = extractelement <16 x i8> [[A]], i32 15
+// CHECK-NEXT:    [[TMP0:%.*]] = bitcast i8 [[VGET_LANE]] to <1 x i8>
+// CHECK-NEXT:    ret <1 x i8> [[TMP0]]
+//
+mfloat8_t test_vdupb_laneq_mf8(mfloat8x16_t a) {
+  return vdupb_laneq_mf8(a, 15);
+}
+
+// CHECK-LABEL: define dso_local <8 x i8> @test_vcreate_mf8(
+// CHECK-SAME: i64 noundef [[A:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[TMP0:%.*]] = bitcast i64 [[A]] to <8 x i8>
+// CHECK-NEXT:    ret <8 x i8> [[TMP0]]
+//
+mfloat8x8_t test_vcreate_mf8(uint64_t a) {
+  return vcreate_mf8(a);
+}
+
+
+// CHECK-LABEL: define dso_local <8 x i8> @test_vdup_n_mf8(
+// CHECK-SAME: <1 x i8> [[A:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <1 x i8> [[A]] to i8
+// CHECK-NEXT:    [[TMP1:%.*]] = bitcast i8 [[TMP0]] to <1 x i8>
+// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <1 x i8> [[TMP1]] to i8
+// CHECK-NEXT:    [[VECINIT_I:%.*]] = insertelement <8 x i8> poison, i8 
[[TMP2]], i32 0
+// CHECK-NEXT:    [[VECINIT1_I:%.*]] = insertelement <8 x i8> [[VECINIT_I]], 
i8 [[TMP2]], i32 1
+// CHECK-NEXT:    [[VECINIT2_I:%.*]] = insertelement <8 x i8> [[VECINIT1_I]], 
i8 [[TMP2]], i32 2
+// CHECK-NEXT:    [[VECINIT3_I:%.*]] = insertelement <8 x i8> [[VECINIT2_I]], 
i8 [[TMP2]], i32 3
+// CHECK-NEXT:    [[VECINIT4_I:%.*]] = insertelement <8 x i8> [[VECINIT3_I]], 
i8 [[TMP2]], i32 4
+// CHECK-NEXT:    [[VECINIT5_I:%.*]] = insertelement <8 x i8> [[VECINIT4_I]], 
i8 [[TMP2]], i32 5
+// CHECK-NEXT:    [[VECINIT6_I:%.*]] = insertelement <8 x i8> [[VECINIT5_I]], 
i8 [[TMP2]], i32 6
+// CHECK-NEXT:    [[VECINIT7_I:%.*]] = insertelement <8 x i8> [[VECINIT6_I]], 
i8 [[TMP2]], i32 7
+// CHECK-NEXT:    ret <8 x i8> [[VECINIT7_I]]
+//
+mfloat8x8_t test_vdup_n_mf8(mfloat8_t a) {
+  return vdup_n_mf8(a);
+}
+
+// CHECK-LABEL: define dso_local <16 x i8> @test_vdupq_n_mf8(
+// CHECK-SAME: <1 x i8> [[A:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <1 x i8> [[A]] to i8
+// CHECK-NEXT:    [[TMP1:%.*]] = bitcast i8 [[TMP0]] to <1 x i8>
+// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <1 x i8> [[TMP1]] to i8
+// CHECK-NEXT:    [[VECINIT_I:%.*]] = insertelement <16 x i8> poison, i8 
[[TMP2]], i32 0
+// CHECK-NEXT:    [[VECINIT1_I:%.*]] = insertelement <16 x i8> [[VECINIT_I]], 
i8 [[TMP2]], i32 1
+// CHECK-NEXT:    [[VECINIT2_I:%.*]] = insertelement <16 x i8> [[VECINIT1_I]], 
i8 [[TMP2]], i32 2
+// CHECK-NEXT:    [[VECINIT3_I:%.*]] = insertelement <16 x i8> [[VECINIT2_I]], 
i8 [[TMP2]], i32 3
+// CHECK-NEXT:    [[VECINIT4_I:%.*]] = insertelement <16 x i8> [[VECINIT3_I]], 
i8 [[TMP2]], i32 4
+// CHECK-NEXT:    [[VECINIT5_I:%.*]] = insertelement <16 x i8> [[VECINIT4_I]], 
i8 [[TMP2]], i32 5
+// CHECK-NEXT:    [[VECINIT6_I:%.*]] = insertelement <16 x i8> [[VECINIT5_I]], 
i8 [[TMP2]], i32 6
+// CHECK-NEXT:    [[VECINIT7_I:%.*]] = insertelement <16 x i8> [[VECINIT6_I]], 
i8 [[TMP2]], i32 7
+// CHECK-NEXT:    [[VECINIT8_I:%.*]] = insertelement <16 x i8> [[VECINIT7_I]], 
i8 [[TMP2]], i32 8
+// CHECK-NEXT:    [[VECINIT9_I:%.*]] = insertelement <16 x i8> [[VECINIT8_I]], 
i8 [[TMP2]], i32 9
+// CHECK-NEXT:    [[VECINIT10_I:%.*]] = insertelement <16 x i8> 
[[VECINIT9_I]], i8 [[TMP2]], i32 10
+// CHECK-NEXT:    [[VECINIT11_I:%.*]] = insertelement <16 x i8> 
[[VECINIT10_I]], i8 [[TMP2]], i32 11
+// CHECK-NEXT:    [[VECINIT12_I:%.*]] = insertelement <16 x i8> 
[[VECINIT11_I]], i8 [[TMP2]], i32 12
+// CHECK-NEXT:    [[VECINIT13_I:%.*]] = insertelement <16 x i8> 
[[VECINIT12_I]], i8 [[TMP2]], i32 13
+// CHECK-NEXT:    [[VECINIT14_I:%.*]] = insertelement <16 x i8> 
[[VECINIT13_I]], i8 [[TMP2]], i32 14
+// CHECK-NEXT:    [[VECINIT15_I:%.*]] = insertelement <16 x i8> 
[[VECINIT14_I]], i8 [[TMP2]], i32 15
+// CHECK-NEXT:    ret <16 x i8> [[VECINIT15_I]]
+//
+mfloat8x16_t test_vdupq_n_mf8(mfloat8_t a) {
+  return vdupq_n_mf8(a);
+}
+
+// CHECK-LABEL: define dso_local <8 x i8> @test_vmov_n_mf8(
+// CHECK-SAME: <1 x i8> [[A:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <1 x i8> [[A]] to i8
+// CHECK-NEXT:    [[TMP1:%.*]] = bitcast i8 [[TMP0]] to <1 x i8>
+// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <1 x i8> [[TMP1]] to i8
+// CHECK-NEXT:    [[VECINIT_I:%.*]] = insertelement <8 x i8> poison, i8 
[[TMP2]], i32 0
+// CHECK-NEXT:    [[VECINIT1_I:%.*]] = insertelement <8 x i8> [[VECINIT_I]], 
i8 [[TMP2]], i32 1
+// CHECK-NEXT:    [[VECINIT2_I:%.*]] = insertelement <8 x i8> [[VECINIT1_I]], 
i8 [[TMP2]], i32 2
+// CHECK-NEXT:    [[VECINIT3_I:%.*]] = insertelement <8 x i8> [[VECINIT2_I]], 
i8 [[TMP2]], i32 3
+// CHECK-NEXT:    [[VECINIT4_I:%.*]] = insertelement <8 x i8> [[VECINIT3_I]], 
i8 [[TMP2]], i32 4
+// CHECK-NEXT:    [[VECINIT5_I:%.*]] = insertelement <8 x i8> [[VECINIT4_I]], 
i8 [[TMP2]], i32 5
+// CHECK-NEXT:    [[VECINIT6_I:%.*]] = insertelement <8 x i8> [[VECINIT5_I]], 
i8 [[TMP2]], i32 6
+// CHECK-NEXT:    [[VECINIT7_I:%.*]] = insertelement <8 x i8> [[VECINIT6_I]], 
i8 [[TMP2]], i32 7
+// CHECK-NEXT:    ret <8 x i8> [[VECINIT7_I]]
+//
+mfloat8x8_t test_vmov_n_mf8(mfloat8_t a) {
+  return vmov_n_mf8(a);
+}
+
+// CHECK-LABEL: define dso_local <16 x i8> @test_vmovq_n_mf8(
+// CHECK-SAME: <1 x i8> [[A:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[TMP0:%.*]] = bitcast <1 x i8> [[A]] to i8
+// CHECK-NEXT:    [[TMP1:%.*]] = bitcast i8 [[TMP0]] to <1 x i8>
+// CHECK-NEXT:    [[TMP2:%.*]] = bitcast <1 x i8> [[TMP1]] to i8
+// CHECK-NEXT:    [[VECINIT_I:%.*]] = insertelement <16 x i8> poison, i8 
[[TMP2]], i32 0
+// CHECK-NEXT:    [[VECINIT1_I:%.*]] = insertelement <16 x i8> [[VECINIT_I]], 
i8 [[TMP2]], i32 1
+// CHECK-NEXT:    [[VECINIT2_I:%.*]] = insertelement <16 x i8> [[VECINIT1_I]], 
i8 [[TMP2]], i32 2
+// CHECK-NEXT:    [[VECINIT3_I:%.*]] = insertelement <16 x i8> [[VECINIT2_I]], 
i8 [[TMP2]], i32 3
+// CHECK-NEXT:    [[VECINIT4_I:%.*]] = insertelement <16 x i8> [[VECINIT3_I]], 
i8 [[TMP2]], i32 4
+// CHECK-NEXT:    [[VECINIT5_I:%.*]] = insertelement <16 x i8> [[VECINIT4_I]], 
i8 [[TMP2]], i32 5
+// CHECK-NEXT:    [[VECINIT6_I:%.*]] = insertelement <16 x i8> [[VECINIT5_I]], 
i8 [[TMP2]], i32 6
+// CHECK-NEXT:    [[VECINIT7_I:%.*]] = insertelement <16 x i8> [[VECINIT6_I]], 
i8 [[TMP2]], i32 7
+// CHECK-NEXT:    [[VECINIT8_I:%.*]] = insertelement <16 x i8> [[VECINIT7_I]], 
i8 [[TMP2]], i32 8
+// CHECK-NEXT:    [[VECINIT9_I:%.*]] = insertelement <16 x i8> [[VECINIT8_I]], 
i8 [[TMP2]], i32 9
+// CHECK-NEXT:    [[VECINIT10_I:%.*]] = insertelement <16 x i8> 
[[VECINIT9_I]], i8 [[TMP2]], i32 10
+// CHECK-NEXT:    [[VECINIT11_I:%.*]] = insertelement <16 x i8> 
[[VECINIT10_I]], i8 [[TMP2]], i32 11
+// CHECK-NEXT:    [[VECINIT12_I:%.*]] = insertelement <16 x i8> 
[[VECINIT11_I]], i8 [[TMP2]], i32 12
+// CHECK-NEXT:    [[VECINIT13_I:%.*]] = insertelement <16 x i8> 
[[VECINIT12_I]], i8 [[TMP2]], i32 13
+// CHECK-NEXT:    [[VECINIT14_I:%.*]] = insertelement <16 x i8> 
[[VECINIT13_I]], i8 [[TMP2]], i32 14
+// CHECK-NEXT:    [[VECINIT15_I:%.*]] = insertelement <16 x i8> 
[[VECINIT14_I]], i8 [[TMP2]], i32 15
+// CHECK-NEXT:    ret <16 x i8> [[VECINIT15_I]]
+//
+mfloat8x16_t test_vmovq_n_mf8(mfloat8_t a) {
+  return vmovq_n_mf8(a);
+}
+
+// CHECK-LABEL: define dso_local <16 x i8> @test_vcombine_mf8(
+// CHECK-SAME: <8 x i8> [[A:%.*]], <8 x i8> [[B:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[SHUFFLE_I:%.*]] = shufflevector <8 x i8> [[A]], <8 x i8> 
[[B]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 
8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
+// CHECK-NEXT:    ret <16 x i8> [[SHUFFLE_I]]
+//
+mfloat8x16_t test_vcombine_mf8(mfloat8x8_t a, mfloat8x8_t b) {
+  return vcombine_mf8(a, b);
+}
+
+// CHECK-LABEL: define dso_local <8 x i8> @test_vget_high_mf8(
+// CHECK-SAME: <16 x i8> [[A:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[SHUFFLE_I:%.*]] = shufflevector <16 x i8> [[A]], <16 x i8> 
[[A]], <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
+// CHECK-NEXT:    ret <8 x i8> [[SHUFFLE_I]]
+//
+mfloat8x8_t test_vget_high_mf8(mfloat8x16_t a) {
+  return vget_high_mf8(a);
+}
+
+// CHECK-LABEL: define dso_local <8 x i8> @test_vget_low_mf8(
+// CHECK-SAME: <16 x i8> [[A:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[SHUFFLE_I:%.*]] = shufflevector <16 x i8> [[A]], <16 x i8> 
[[A]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
+// CHECK-NEXT:    ret <8 x i8> [[SHUFFLE_I]]
+//
+mfloat8x8_t test_vget_low_mf8(mfloat8x16_t a) {
+  return vget_low_mf8(a);
+}
+
+// CHECK-LABEL: define dso_local <8 x i8> @test_vtbl1_mf8(
+// CHECK-SAME: <8 x i8> [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[VTBL1_I:%.*]] = shufflevector <8 x i8> [[A]], <8 x i8> 
zeroinitializer, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, 
i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
+// CHECK-NEXT:    [[VTBL11_I:%.*]] = call <8 x i8> 
@llvm.aarch64.neon.tbl1.v8i8(<16 x i8> [[VTBL1_I]], <8 x i8> [[B]])
+// CHECK-NEXT:    ret <8 x i8> [[VTBL11_I]]
+//
+mfloat8x8_t test_vtbl1_mf8(mfloat8x8_t a, uint8x8_t b) {
+  return vtbl1_mf8(a, b);
+}
+
+// CHECK-LABEL: define dso_local <8 x i8> @test_vtbl2_mf8(
+// CHECK-SAME: [2 x <8 x i8>] alignstack(8) [[A_COERCE:%.*]], <8 x i8> noundef 
[[B:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[A_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <8 x i8>] 
[[A_COERCE]], 0
+// CHECK-NEXT:    [[A_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <8 x i8>] 
[[A_COERCE]], 1
+// CHECK-NEXT:    [[DOTFCA_0_INSERT:%.*]] = insertvalue [2 x <8 x i8>] poison, 
<8 x i8> [[A_COERCE_FCA_0_EXTRACT]], 0
+// CHECK-NEXT:    [[DOTFCA_1_INSERT:%.*]] = insertvalue [2 x <8 x i8>] 
[[DOTFCA_0_INSERT]], <8 x i8> [[A_COERCE_FCA_1_EXTRACT]], 1
+// CHECK-NEXT:    [[DOTFCA_1_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <8 
x i8>] [[DOTFCA_1_INSERT]], 0
+// CHECK-NEXT:    [[DOTFCA_1_INSERT_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <8 
x i8>] [[DOTFCA_1_INSERT]], 1
+// CHECK-NEXT:    [[VTBL1_I:%.*]] = shufflevector <8 x i8> 
[[DOTFCA_1_INSERT_FCA_0_EXTRACT]], <8 x i8> [[DOTFCA_1_INSERT_FCA_1_EXTRACT]], 
<16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 
9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
+// CHECK-NEXT:    [[VTBL13_I:%.*]] = call <8 x i8> 
@llvm.aarch64.neon.tbl1.v8i8(<16 x i8> [[VTBL1_I]], <8 x i8> [[B]])
+// CHECK-NEXT:    ret <8 x i8> [[VTBL13_I]]
+//
+mfloat8x8_t test_vtbl2_mf8(mfloat8x8x2_t a, uint8x8_t b) {
+  return vtbl2_mf8(a, b);
+}
+
+// CHECK-LABEL: define dso_local <8 x i8> @test_vtbl3_mf8(
+// CHECK-SAME: [3 x <8 x i8>] alignstack(8) [[A_COERCE:%.*]], <8 x i8> noundef 
[[B:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[A_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <8 x i8>] 
[[A_COERCE]], 0
+// CHECK-NEXT:    [[A_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <8 x i8>] 
[[A_COERCE]], 1
+// CHECK-NEXT:    [[A_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <8 x i8>] 
[[A_COERCE]], 2
+// CHECK-NEXT:    [[DOTFCA_0_INSERT:%.*]] = insertvalue [3 x <8 x i8>] poison, 
<8 x i8> [[A_COERCE_FCA_0_EXTRACT]], 0
+// CHECK-NEXT:    [[DOTFCA_1_INSERT:%.*]] = insertvalue [3 x <8 x i8>] 
[[DOTFCA_0_INSERT]], <8 x i8> [[A_COERCE_FCA_1_EXTRACT]], 1
+// CHECK-NEXT:    [[DOTFCA_2_INSERT:%.*]] = insertvalue [3 x <8 x i8>] 
[[DOTFCA_1_INSERT]], <8 x i8> [[A_COERCE_FCA_2_EXTRACT]], 2
+// CHECK-NEXT:    [[DOTFCA_2_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <8 
x i8>] [[DOTFCA_2_INSERT]], 0
+// CHECK-NEXT:    [[DOTFCA_2_INSERT_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <8 
x i8>] [[DOTFCA_2_INSERT]], 1
+// CHECK-NEXT:    [[DOTFCA_2_INSERT_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <8 
x i8>] [[DOTFCA_2_INSERT]], 2
+// CHECK-NEXT:    [[VTBL2_I:%.*]] = shufflevector <8 x i8> 
[[DOTFCA_2_INSERT_FCA_0_EXTRACT]], <8 x i8> [[DOTFCA_2_INSERT_FCA_1_EXTRACT]], 
<16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 
9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
+// CHECK-NEXT:    [[VTBL25_I:%.*]] = shufflevector <8 x i8> 
[[DOTFCA_2_INSERT_FCA_2_EXTRACT]], <8 x i8> zeroinitializer, <16 x i32> <i32 0, 
i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, 
i32 12, i32 13, i32 14, i32 15>
+// CHECK-NEXT:    [[VTBL26_I:%.*]] = call <8 x i8> 
@llvm.aarch64.neon.tbl2.v8i8(<16 x i8> [[VTBL2_I]], <16 x i8> [[VTBL25_I]], <8 
x i8> [[B]])
+// CHECK-NEXT:    ret <8 x i8> [[VTBL26_I]]
+//
+mfloat8x8_t test_vtbl3_mf8(mfloat8x8x3_t a, uint8x8_t b) {
+  return vtbl3_mf8(a, b);
+}
+
+// CHECK-LABEL: define dso_local <8 x i8> @test_vtbl4_mf8(
+// CHECK-SAME: [4 x <8 x i8>] alignstack(8) [[A_COERCE:%.*]], <8 x i8> noundef 
[[B:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[A_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <8 x i8>] 
[[A_COERCE]], 0
+// CHECK-NEXT:    [[A_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <8 x i8>] 
[[A_COERCE]], 1
+// CHECK-NEXT:    [[A_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <8 x i8>] 
[[A_COERCE]], 2
+// CHECK-NEXT:    [[A_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <8 x i8>] 
[[A_COERCE]], 3
+// CHECK-NEXT:    [[DOTFCA_0_INSERT:%.*]] = insertvalue [4 x <8 x i8>] poison, 
<8 x i8> [[A_COERCE_FCA_0_EXTRACT]], 0
+// CHECK-NEXT:    [[DOTFCA_1_INSERT:%.*]] = insertvalue [4 x <8 x i8>] 
[[DOTFCA_0_INSERT]], <8 x i8> [[A_COERCE_FCA_1_EXTRACT]], 1
+// CHECK-NEXT:    [[DOTFCA_2_INSERT:%.*]] = insertvalue [4 x <8 x i8>] 
[[DOTFCA_1_INSERT]], <8 x i8> [[A_COERCE_FCA_2_EXTRACT]], 2
+// CHECK-NEXT:    [[DOTFCA_3_INSERT:%.*]] = insertvalue [4 x <8 x i8>] 
[[DOTFCA_2_INSERT]], <8 x i8> [[A_COERCE_FCA_3_EXTRACT]], 3
+// CHECK-NEXT:    [[DOTFCA_3_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <8 
x i8>] [[DOTFCA_3_INSERT]], 0
+// CHECK-NEXT:    [[DOTFCA_3_INSERT_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <8 
x i8>] [[DOTFCA_3_INSERT]], 1
+// CHECK-NEXT:    [[DOTFCA_3_INSERT_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <8 
x i8>] [[DOTFCA_3_INSERT]], 2
+// CHECK-NEXT:    [[DOTFCA_3_INSERT_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <8 
x i8>] [[DOTFCA_3_INSERT]], 3
+// CHECK-NEXT:    [[VTBL2_I:%.*]] = shufflevector <8 x i8> 
[[DOTFCA_3_INSERT_FCA_0_EXTRACT]], <8 x i8> [[DOTFCA_3_INSERT_FCA_1_EXTRACT]], 
<16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 
9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
+// CHECK-NEXT:    [[VTBL27_I:%.*]] = shufflevector <8 x i8> 
[[DOTFCA_3_INSERT_FCA_2_EXTRACT]], <8 x i8> [[DOTFCA_3_INSERT_FCA_3_EXTRACT]], 
<16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 
9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
+// CHECK-NEXT:    [[VTBL28_I:%.*]] = call <8 x i8> 
@llvm.aarch64.neon.tbl2.v8i8(<16 x i8> [[VTBL2_I]], <16 x i8> [[VTBL27_I]], <8 
x i8> [[B]])
+// CHECK-NEXT:    ret <8 x i8> [[VTBL28_I]]
+//
+mfloat8x8_t test_vtbl4_mf8(mfloat8x8x4_t a, uint8x8_t b) {
+  return vtbl4_mf8(a, b);
+}
+
+// CHECK-LABEL: define dso_local <8 x i8> @test_vtbx1_mf8(
+// CHECK-SAME: <8 x i8> [[A:%.*]], <8 x i8> [[B:%.*]], <8 x i8> noundef 
[[C:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[VTBL1_I:%.*]] = shufflevector <8 x i8> [[B]], <8 x i8> 
zeroinitializer, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, 
i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
+// CHECK-NEXT:    [[VTBL11_I:%.*]] = call <8 x i8> 
@llvm.aarch64.neon.tbl1.v8i8(<16 x i8> [[VTBL1_I]], <8 x i8> [[C]])
+// CHECK-NEXT:    [[TMP0:%.*]] = icmp uge <8 x i8> [[C]], splat (i8 8)
+// CHECK-NEXT:    [[TMP1:%.*]] = sext <8 x i1> [[TMP0]] to <8 x i8>
+// CHECK-NEXT:    [[TMP2:%.*]] = and <8 x i8> [[TMP1]], [[A]]
+// CHECK-NEXT:    [[TMP3:%.*]] = xor <8 x i8> [[TMP1]], splat (i8 -1)
+// CHECK-NEXT:    [[TMP4:%.*]] = and <8 x i8> [[TMP3]], [[VTBL11_I]]
+// CHECK-NEXT:    [[VTBX_I:%.*]] = or <8 x i8> [[TMP2]], [[TMP4]]
+// CHECK-NEXT:    ret <8 x i8> [[VTBX_I]]
+//
+mfloat8x8_t test_vtbx1_mf8(mfloat8x8_t a, mfloat8x8_t b, uint8x8_t c) {
+  return vtbx1_mf8(a, b, c);
+}
+
+// CHECK-LABEL: define dso_local <8 x i8> @test_vtbx2_mf8(
+// CHECK-SAME: <8 x i8> [[A:%.*]], [2 x <8 x i8>] alignstack(8) 
[[B_COERCE:%.*]], <8 x i8> noundef [[C:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <8 x i8>] 
[[B_COERCE]], 0
+// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <8 x i8>] 
[[B_COERCE]], 1
+// CHECK-NEXT:    [[DOTFCA_0_INSERT:%.*]] = insertvalue [2 x <8 x i8>] poison, 
<8 x i8> [[B_COERCE_FCA_0_EXTRACT]], 0
+// CHECK-NEXT:    [[DOTFCA_1_INSERT:%.*]] = insertvalue [2 x <8 x i8>] 
[[DOTFCA_0_INSERT]], <8 x i8> [[B_COERCE_FCA_1_EXTRACT]], 1
+// CHECK-NEXT:    [[DOTFCA_1_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <8 
x i8>] [[DOTFCA_1_INSERT]], 0
+// CHECK-NEXT:    [[DOTFCA_1_INSERT_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <8 
x i8>] [[DOTFCA_1_INSERT]], 1
+// CHECK-NEXT:    [[VTBX1_I:%.*]] = shufflevector <8 x i8> 
[[DOTFCA_1_INSERT_FCA_0_EXTRACT]], <8 x i8> [[DOTFCA_1_INSERT_FCA_1_EXTRACT]], 
<16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 
9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
+// CHECK-NEXT:    [[VTBX13_I:%.*]] = call <8 x i8> 
@llvm.aarch64.neon.tbx1.v8i8(<8 x i8> [[A]], <16 x i8> [[VTBX1_I]], <8 x i8> 
[[C]])
+// CHECK-NEXT:    ret <8 x i8> [[VTBX13_I]]
+//
+mfloat8x8_t test_vtbx2_mf8(mfloat8x8_t a, mfloat8x8x2_t b, uint8x8_t c) {
+  return vtbx2_mf8(a, b, c);
+}
+
+// CHECK-LABEL: define dso_local <8 x i8> @test_vtbx3_mf8(
+// CHECK-SAME: <8 x i8> [[A:%.*]], [3 x <8 x i8>] alignstack(8) 
[[B_COERCE:%.*]], <8 x i8> noundef [[C:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <8 x i8>] 
[[B_COERCE]], 0
+// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <8 x i8>] 
[[B_COERCE]], 1
+// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <8 x i8>] 
[[B_COERCE]], 2
+// CHECK-NEXT:    [[DOTFCA_0_INSERT:%.*]] = insertvalue [3 x <8 x i8>] poison, 
<8 x i8> [[B_COERCE_FCA_0_EXTRACT]], 0
+// CHECK-NEXT:    [[DOTFCA_1_INSERT:%.*]] = insertvalue [3 x <8 x i8>] 
[[DOTFCA_0_INSERT]], <8 x i8> [[B_COERCE_FCA_1_EXTRACT]], 1
+// CHECK-NEXT:    [[DOTFCA_2_INSERT:%.*]] = insertvalue [3 x <8 x i8>] 
[[DOTFCA_1_INSERT]], <8 x i8> [[B_COERCE_FCA_2_EXTRACT]], 2
+// CHECK-NEXT:    [[DOTFCA_2_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <8 
x i8>] [[DOTFCA_2_INSERT]], 0
+// CHECK-NEXT:    [[DOTFCA_2_INSERT_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <8 
x i8>] [[DOTFCA_2_INSERT]], 1
+// CHECK-NEXT:    [[DOTFCA_2_INSERT_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <8 
x i8>] [[DOTFCA_2_INSERT]], 2
+// CHECK-NEXT:    [[VTBL2_I:%.*]] = shufflevector <8 x i8> 
[[DOTFCA_2_INSERT_FCA_0_EXTRACT]], <8 x i8> [[DOTFCA_2_INSERT_FCA_1_EXTRACT]], 
<16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 
9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
+// CHECK-NEXT:    [[VTBL25_I:%.*]] = shufflevector <8 x i8> 
[[DOTFCA_2_INSERT_FCA_2_EXTRACT]], <8 x i8> zeroinitializer, <16 x i32> <i32 0, 
i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, 
i32 12, i32 13, i32 14, i32 15>
+// CHECK-NEXT:    [[VTBL26_I:%.*]] = call <8 x i8> 
@llvm.aarch64.neon.tbl2.v8i8(<16 x i8> [[VTBL2_I]], <16 x i8> [[VTBL25_I]], <8 
x i8> [[C]])
+// CHECK-NEXT:    [[TMP0:%.*]] = icmp uge <8 x i8> [[C]], splat (i8 24)
+// CHECK-NEXT:    [[TMP1:%.*]] = sext <8 x i1> [[TMP0]] to <8 x i8>
+// CHECK-NEXT:    [[TMP2:%.*]] = and <8 x i8> [[TMP1]], [[A]]
+// CHECK-NEXT:    [[TMP3:%.*]] = xor <8 x i8> [[TMP1]], splat (i8 -1)
+// CHECK-NEXT:    [[TMP4:%.*]] = and <8 x i8> [[TMP3]], [[VTBL26_I]]
+// CHECK-NEXT:    [[VTBX_I:%.*]] = or <8 x i8> [[TMP2]], [[TMP4]]
+// CHECK-NEXT:    ret <8 x i8> [[VTBX_I]]
+//
+mfloat8x8_t test_vtbx3_mf8(mfloat8x8_t a, mfloat8x8x3_t b, uint8x8_t c) {
+  return vtbx3_mf8(a, b, c);
+}
+
+// CHECK-LABEL: define dso_local <8 x i8> @test_vtbx4_mf8(
+// CHECK-SAME: <8 x i8> [[A:%.*]], [4 x <8 x i8>] alignstack(8) 
[[B_COERCE:%.*]], <8 x i8> noundef [[C:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <8 x i8>] 
[[B_COERCE]], 0
+// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <8 x i8>] 
[[B_COERCE]], 1
+// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <8 x i8>] 
[[B_COERCE]], 2
+// CHECK-NEXT:    [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <8 x i8>] 
[[B_COERCE]], 3
+// CHECK-NEXT:    [[DOTFCA_0_INSERT:%.*]] = insertvalue [4 x <8 x i8>] poison, 
<8 x i8> [[B_COERCE_FCA_0_EXTRACT]], 0
+// CHECK-NEXT:    [[DOTFCA_1_INSERT:%.*]] = insertvalue [4 x <8 x i8>] 
[[DOTFCA_0_INSERT]], <8 x i8> [[B_COERCE_FCA_1_EXTRACT]], 1
+// CHECK-NEXT:    [[DOTFCA_2_INSERT:%.*]] = insertvalue [4 x <8 x i8>] 
[[DOTFCA_1_INSERT]], <8 x i8> [[B_COERCE_FCA_2_EXTRACT]], 2
+// CHECK-NEXT:    [[DOTFCA_3_INSERT:%.*]] = insertvalue [4 x <8 x i8>] 
[[DOTFCA_2_INSERT]], <8 x i8> [[B_COERCE_FCA_3_EXTRACT]], 3
+// CHECK-NEXT:    [[DOTFCA_3_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <8 
x i8>] [[DOTFCA_3_INSERT]], 0
+// CHECK-NEXT:    [[DOTFCA_3_INSERT_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <8 
x i8>] [[DOTFCA_3_INSERT]], 1
+// CHECK-NEXT:    [[DOTFCA_3_INSERT_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <8 
x i8>] [[DOTFCA_3_INSERT]], 2
+// CHECK-NEXT:    [[DOTFCA_3_INSERT_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <8 
x i8>] [[DOTFCA_3_INSERT]], 3
+// CHECK-NEXT:    [[VTBX2_I:%.*]] = shufflevector <8 x i8> 
[[DOTFCA_3_INSERT_FCA_0_EXTRACT]], <8 x i8> [[DOTFCA_3_INSERT_FCA_1_EXTRACT]], 
<16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 
9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
+// CHECK-NEXT:    [[VTBX27_I:%.*]] = shufflevector <8 x i8> 
[[DOTFCA_3_INSERT_FCA_2_EXTRACT]], <8 x i8> [[DOTFCA_3_INSERT_FCA_3_EXTRACT]], 
<16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 
9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
+// CHECK-NEXT:    [[VTBX28_I:%.*]] = call <8 x i8> 
@llvm.aarch64.neon.tbx2.v8i8(<8 x i8> [[A]], <16 x i8> [[VTBX2_I]], <16 x i8> 
[[VTBX27_I]], <8 x i8> [[C]])
+// CHECK-NEXT:    ret <8 x i8> [[VTBX28_I]]
+//
+mfloat8x8_t test_vtbx4_mf8(mfloat8x8_t a, mfloat8x8x4_t b, uint8x8_t c) {
+  return vtbx4_mf8(a, b, c);
+}
+
+// CHECK-LABEL: define dso_local <8 x i8> @test_vext_mf8(
+// CHECK-SAME: <8 x i8> [[A:%.*]], <8 x i8> [[B:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[VEXT:%.*]] = shufflevector <8 x i8> [[A]], <8 x i8> [[B]], 
<8 x i32> <i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14>
+// CHECK-NEXT:    ret <8 x i8> [[VEXT]]
+//
+mfloat8x8_t test_vext_mf8(mfloat8x8_t a, mfloat8x8_t b) {
+  return vext_mf8(a, b, 7);
+}
+
+// CHECK-LABEL: define dso_local <16 x i8> @test_vextq_mf8(
+// CHECK-SAME: <16 x i8> [[A:%.*]], <16 x i8> [[B:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[VEXT:%.*]] = shufflevector <16 x i8> [[A]], <16 x i8> 
[[B]], <16 x i32> <i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, 
i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22>
+// CHECK-NEXT:    ret <16 x i8> [[VEXT]]
+//
+mfloat8x16_t test_vextq_mf8(mfloat8x16_t a, mfloat8x16_t b) {
+  return vextq_mf8(a, b, 7);
+}
+
+// CHECK-LABEL: define dso_local <8 x i8> @test_vrev64_mf8(
+// CHECK-SAME: <8 x i8> [[A:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[SHUFFLE_I:%.*]] = shufflevector <8 x i8> [[A]], <8 x i8> 
[[A]], <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>
+// CHECK-NEXT:    ret <8 x i8> [[SHUFFLE_I]]
+//
+mfloat8x8_t test_vrev64_mf8(mfloat8x8_t a) {
+  return vrev64_mf8(a);
+}
+
+// CHECK-LABEL: define dso_local <16 x i8> @test_vrev64q_mf8(
+// CHECK-SAME: <16 x i8> [[A:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[SHUFFLE_I:%.*]] = shufflevector <16 x i8> [[A]], <16 x i8> 
[[A]], <16 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 
15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8>
+// CHECK-NEXT:    ret <16 x i8> [[SHUFFLE_I]]
+//
+mfloat8x16_t test_vrev64q_mf8(mfloat8x16_t a) {
+  return vrev64q_mf8(a);
+}
+
+// CHECK-LABEL: define dso_local <8 x i8> @test_vrev32_mf8(
+// CHECK-SAME: <8 x i8> [[A:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[SHUFFLE_I:%.*]] = shufflevector <8 x i8> [[A]], <8 x i8> 
[[A]], <8 x i32> <i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4>
+// CHECK-NEXT:    ret <8 x i8> [[SHUFFLE_I]]
+//
+mfloat8x8_t test_vrev32_mf8(mfloat8x8_t a) {
+  return vrev32_mf8(a);
+}
+
+// CHECK-LABEL: define dso_local <16 x i8> @test_vrev32q_mf8(
+// CHECK-SAME: <16 x i8> [[A:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[SHUFFLE_I:%.*]] = shufflevector <16 x i8> [[A]], <16 x i8> 
[[A]], <16 x i32> <i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 
11, i32 10, i32 9, i32 8, i32 15, i32 14, i32 13, i32 12>
+// CHECK-NEXT:    ret <16 x i8> [[SHUFFLE_I]]
+//
+mfloat8x16_t test_vrev32q_mf8(mfloat8x16_t a) {
+  return vrev32q_mf8(a);
+}
+
+// CHECK-LABEL: define dso_local <8 x i8> @test_vrev16_mf8(
+// CHECK-SAME: <8 x i8> [[A:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[SHUFFLE_I:%.*]] = shufflevector <8 x i8> [[A]], <8 x i8> 
[[A]], <8 x i32> <i32 1, i32 0, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6>
+// CHECK-NEXT:    ret <8 x i8> [[SHUFFLE_I]]
+//
+mfloat8x8_t test_vrev16_mf8(mfloat8x8_t a) {
+  return vrev16_mf8(a);
+}
+
+// CHECK-LABEL: define dso_local <16 x i8> @test_vrev16q_mf8(
+// CHECK-SAME: <16 x i8> [[A:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[SHUFFLE_I:%.*]] = shufflevector <16 x i8> [[A]], <16 x i8> 
[[A]], <16 x i32> <i32 1, i32 0, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6, i32 
9, i32 8, i32 11, i32 10, i32 13, i32 12, i32 15, i32 14>
+// CHECK-NEXT:    ret <16 x i8> [[SHUFFLE_I]]
+//
+mfloat8x16_t test_vrev16q_mf8(mfloat8x16_t a) {
+  return vrev16q_mf8(a);
+}
+
+// CHECK-LABEL: define dso_local <8 x i8> @test_vbsl_mf8(
+// CHECK-SAME: <8 x i8> noundef [[V1:%.*]], <8 x i8> [[V2:%.*]], <8 x i8> 
[[V3:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[VBSL_I:%.*]] = and <8 x i8> [[V1]], [[V2]]
+// CHECK-NEXT:    [[TMP0:%.*]] = xor <8 x i8> [[V1]], splat (i8 -1)
+// CHECK-NEXT:    [[VBSL1_I:%.*]] = and <8 x i8> [[TMP0]], [[V3]]
+// CHECK-NEXT:    [[VBSL2_I:%.*]] = or <8 x i8> [[VBSL_I]], [[VBSL1_I]]
+// CHECK-NEXT:    ret <8 x i8> [[VBSL2_I]]
+//
+mfloat8x8_t test_vbsl_mf8(uint8x8_t v1, mfloat8x8_t v2, mfloat8x8_t v3) {
+  return vbsl_mf8(v1, v2, v3);
+}
+
+// CHECK-LABEL: define dso_local <16 x i8> @test_vbslq_mf8(
+// CHECK-SAME: <16 x i8> noundef [[V1:%.*]], <16 x i8> [[V2:%.*]], <16 x i8> 
[[V3:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[VBSL_I:%.*]] = and <16 x i8> [[V1]], [[V2]]
+// CHECK-NEXT:    [[TMP0:%.*]] = xor <16 x i8> [[V1]], splat (i8 -1)
+// CHECK-NEXT:    [[VBSL1_I:%.*]] = and <16 x i8> [[TMP0]], [[V3]]
+// CHECK-NEXT:    [[VBSL2_I:%.*]] = or <16 x i8> [[VBSL_I]], [[VBSL1_I]]
+// CHECK-NEXT:    ret <16 x i8> [[VBSL2_I]]
+//
+mfloat8x16_t test_vbslq_mf8(uint8x16_t v1, mfloat8x16_t v2, mfloat8x16_t v3) {
+  return vbslq_mf8(v1, v2, v3);
+}
+
+// CHECK-LABEL: define dso_local %struct.mfloat8x8x2_t @test_vtrn_mf8(
+// CHECK-SAME: <8 x i8> [[A:%.*]], <8 x i8> [[B:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[VTRN_I:%.*]] = shufflevector <8 x i8> [[A]], <8 x i8> 
[[B]], <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
+// CHECK-NEXT:    [[VTRN1_I:%.*]] = shufflevector <8 x i8> [[A]], <8 x i8> 
[[B]], <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
+// CHECK-NEXT:    [[DOTFCA_0_0_INSERT1:%.*]] = insertvalue 
[[STRUCT_MFLOAT8X8X2_T:%.*]] poison, <8 x i8> [[VTRN_I]], 0, 0
+// CHECK-NEXT:    [[DOTFCA_0_1_INSERT2:%.*]] = insertvalue 
[[STRUCT_MFLOAT8X8X2_T]] [[DOTFCA_0_0_INSERT1]], <8 x i8> [[VTRN1_I]], 0, 1
+// CHECK-NEXT:    [[TMP0:%.*]] = extractvalue [[STRUCT_MFLOAT8X8X2_T]] 
[[DOTFCA_0_1_INSERT2]], 0
+// CHECK-NEXT:    [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [2 x <8 x i8>] 
[[TMP0]], 0
+// CHECK-NEXT:    [[DOTFCA_1_EXTRACT:%.*]] = extractvalue [2 x <8 x i8>] 
[[TMP0]], 1
+// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue 
[[STRUCT_MFLOAT8X8X2_T]] poison, <8 x i8> [[DOTFCA_0_EXTRACT]], 0, 0
+// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue 
[[STRUCT_MFLOAT8X8X2_T]] [[DOTFCA_0_0_INSERT]], <8 x i8> [[DOTFCA_1_EXTRACT]], 
0, 1
+// CHECK-NEXT:    ret [[STRUCT_MFLOAT8X8X2_T]] [[DOTFCA_0_1_INSERT]]
+//
+mfloat8x8x2_t test_vtrn_mf8(mfloat8x8_t a, mfloat8x8_t b) {
+  return vtrn_mf8(a, b);
+}
+
+// CHECK-LABEL: define dso_local %struct.mfloat8x16x2_t @test_vtrnq_mf8(
+// CHECK-SAME: <16 x i8> [[A:%.*]], <16 x i8> [[B:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[VTRN_I:%.*]] = shufflevector <16 x i8> [[A]], <16 x i8> 
[[B]], <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, 
i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30>
+// CHECK-NEXT:    [[VTRN1_I:%.*]] = shufflevector <16 x i8> [[A]], <16 x i8> 
[[B]], <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, 
i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31>
+// CHECK-NEXT:    [[DOTFCA_0_0_INSERT1:%.*]] = insertvalue 
[[STRUCT_MFLOAT8X16X2_T:%.*]] poison, <16 x i8> [[VTRN_I]], 0, 0
+// CHECK-NEXT:    [[DOTFCA_0_1_INSERT2:%.*]] = insertvalue 
[[STRUCT_MFLOAT8X16X2_T]] [[DOTFCA_0_0_INSERT1]], <16 x i8> [[VTRN1_I]], 0, 1
+// CHECK-NEXT:    [[TMP0:%.*]] = extractvalue [[STRUCT_MFLOAT8X16X2_T]] 
[[DOTFCA_0_1_INSERT2]], 0
+// CHECK-NEXT:    [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [2 x <16 x i8>] 
[[TMP0]], 0
+// CHECK-NEXT:    [[DOTFCA_1_EXTRACT:%.*]] = extractvalue [2 x <16 x i8>] 
[[TMP0]], 1
+// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue 
[[STRUCT_MFLOAT8X16X2_T]] poison, <16 x i8> [[DOTFCA_0_EXTRACT]], 0, 0
+// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue 
[[STRUCT_MFLOAT8X16X2_T]] [[DOTFCA_0_0_INSERT]], <16 x i8> 
[[DOTFCA_1_EXTRACT]], 0, 1
+// CHECK-NEXT:    ret [[STRUCT_MFLOAT8X16X2_T]] [[DOTFCA_0_1_INSERT]]
+//
+mfloat8x16x2_t test_vtrnq_mf8(mfloat8x16_t a, mfloat8x16_t b) {
+  return vtrnq_mf8(a, b);
+}
+
+// CHECK-LABEL: define dso_local %struct.mfloat8x8x2_t @test_vzip_mf8(
+// CHECK-SAME: <8 x i8> [[A:%.*]], <8 x i8> [[B:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[VZIP_I:%.*]] = shufflevector <8 x i8> [[A]], <8 x i8> 
[[B]], <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
+// CHECK-NEXT:    [[VZIP1_I:%.*]] = shufflevector <8 x i8> [[A]], <8 x i8> 
[[B]], <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
+// CHECK-NEXT:    [[DOTFCA_0_0_INSERT1:%.*]] = insertvalue 
[[STRUCT_MFLOAT8X8X2_T:%.*]] poison, <8 x i8> [[VZIP_I]], 0, 0
+// CHECK-NEXT:    [[DOTFCA_0_1_INSERT2:%.*]] = insertvalue 
[[STRUCT_MFLOAT8X8X2_T]] [[DOTFCA_0_0_INSERT1]], <8 x i8> [[VZIP1_I]], 0, 1
+// CHECK-NEXT:    [[TMP0:%.*]] = extractvalue [[STRUCT_MFLOAT8X8X2_T]] 
[[DOTFCA_0_1_INSERT2]], 0
+// CHECK-NEXT:    [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [2 x <8 x i8>] 
[[TMP0]], 0
+// CHECK-NEXT:    [[DOTFCA_1_EXTRACT:%.*]] = extractvalue [2 x <8 x i8>] 
[[TMP0]], 1
+// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue 
[[STRUCT_MFLOAT8X8X2_T]] poison, <8 x i8> [[DOTFCA_0_EXTRACT]], 0, 0
+// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue 
[[STRUCT_MFLOAT8X8X2_T]] [[DOTFCA_0_0_INSERT]], <8 x i8> [[DOTFCA_1_EXTRACT]], 
0, 1
+// CHECK-NEXT:    ret [[STRUCT_MFLOAT8X8X2_T]] [[DOTFCA_0_1_INSERT]]
+//
+mfloat8x8x2_t test_vzip_mf8(mfloat8x8_t a, mfloat8x8_t b) {
+  return vzip_mf8(a, b);
+}
+
+// CHECK-LABEL: define dso_local %struct.mfloat8x16x2_t @test_vzipq_mf8(
+// CHECK-SAME: <16 x i8> [[A:%.*]], <16 x i8> [[B:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[VZIP_I:%.*]] = shufflevector <16 x i8> [[A]], <16 x i8> 
[[B]], <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, 
i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23>
+// CHECK-NEXT:    [[VZIP1_I:%.*]] = shufflevector <16 x i8> [[A]], <16 x i8> 
[[B]], <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 
27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31>
+// CHECK-NEXT:    [[DOTFCA_0_0_INSERT1:%.*]] = insertvalue 
[[STRUCT_MFLOAT8X16X2_T:%.*]] poison, <16 x i8> [[VZIP_I]], 0, 0
+// CHECK-NEXT:    [[DOTFCA_0_1_INSERT2:%.*]] = insertvalue 
[[STRUCT_MFLOAT8X16X2_T]] [[DOTFCA_0_0_INSERT1]], <16 x i8> [[VZIP1_I]], 0, 1
+// CHECK-NEXT:    [[TMP0:%.*]] = extractvalue [[STRUCT_MFLOAT8X16X2_T]] 
[[DOTFCA_0_1_INSERT2]], 0
+// CHECK-NEXT:    [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [2 x <16 x i8>] 
[[TMP0]], 0
+// CHECK-NEXT:    [[DOTFCA_1_EXTRACT:%.*]] = extractvalue [2 x <16 x i8>] 
[[TMP0]], 1
+// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue 
[[STRUCT_MFLOAT8X16X2_T]] poison, <16 x i8> [[DOTFCA_0_EXTRACT]], 0, 0
+// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue 
[[STRUCT_MFLOAT8X16X2_T]] [[DOTFCA_0_0_INSERT]], <16 x i8> 
[[DOTFCA_1_EXTRACT]], 0, 1
+// CHECK-NEXT:    ret [[STRUCT_MFLOAT8X16X2_T]] [[DOTFCA_0_1_INSERT]]
+//
+mfloat8x16x2_t test_vzipq_mf8(mfloat8x16_t a, mfloat8x16_t b) {
+  return vzipq_mf8(a, b);
+}
+
+// CHECK-LABEL: define dso_local %struct.mfloat8x8x2_t @test_vuzp_mf8(
+// CHECK-SAME: <8 x i8> [[A:%.*]], <8 x i8> [[B:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[VUZP_I:%.*]] = shufflevector <8 x i8> [[A]], <8 x i8> 
[[B]], <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
+// CHECK-NEXT:    [[VUZP1_I:%.*]] = shufflevector <8 x i8> [[A]], <8 x i8> 
[[B]], <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
+// CHECK-NEXT:    [[DOTFCA_0_0_INSERT1:%.*]] = insertvalue 
[[STRUCT_MFLOAT8X8X2_T:%.*]] poison, <8 x i8> [[VUZP_I]], 0, 0
+// CHECK-NEXT:    [[DOTFCA_0_1_INSERT2:%.*]] = insertvalue 
[[STRUCT_MFLOAT8X8X2_T]] [[DOTFCA_0_0_INSERT1]], <8 x i8> [[VUZP1_I]], 0, 1
+// CHECK-NEXT:    [[TMP0:%.*]] = extractvalue [[STRUCT_MFLOAT8X8X2_T]] 
[[DOTFCA_0_1_INSERT2]], 0
+// CHECK-NEXT:    [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [2 x <8 x i8>] 
[[TMP0]], 0
+// CHECK-NEXT:    [[DOTFCA_1_EXTRACT:%.*]] = extractvalue [2 x <8 x i8>] 
[[TMP0]], 1
+// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue 
[[STRUCT_MFLOAT8X8X2_T]] poison, <8 x i8> [[DOTFCA_0_EXTRACT]], 0, 0
+// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue 
[[STRUCT_MFLOAT8X8X2_T]] [[DOTFCA_0_0_INSERT]], <8 x i8> [[DOTFCA_1_EXTRACT]], 
0, 1
+// CHECK-NEXT:    ret [[STRUCT_MFLOAT8X8X2_T]] [[DOTFCA_0_1_INSERT]]
+//
+mfloat8x8x2_t test_vuzp_mf8(mfloat8x8_t a, mfloat8x8_t b) {
+  return vuzp_mf8(a, b);
+}
+
+// CHECK-LABEL: define dso_local %struct.mfloat8x16x2_t @test_vuzpq_mf8(
+// CHECK-SAME: <16 x i8> [[A:%.*]], <16 x i8> [[B:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[VUZP_I:%.*]] = shufflevector <16 x i8> [[A]], <16 x i8> 
[[B]], <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, 
i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
+// CHECK-NEXT:    [[VUZP1_I:%.*]] = shufflevector <16 x i8> [[A]], <16 x i8> 
[[B]], <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, 
i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
+// CHECK-NEXT:    [[DOTFCA_0_0_INSERT1:%.*]] = insertvalue 
[[STRUCT_MFLOAT8X16X2_T:%.*]] poison, <16 x i8> [[VUZP_I]], 0, 0
+// CHECK-NEXT:    [[DOTFCA_0_1_INSERT2:%.*]] = insertvalue 
[[STRUCT_MFLOAT8X16X2_T]] [[DOTFCA_0_0_INSERT1]], <16 x i8> [[VUZP1_I]], 0, 1
+// CHECK-NEXT:    [[TMP0:%.*]] = extractvalue [[STRUCT_MFLOAT8X16X2_T]] 
[[DOTFCA_0_1_INSERT2]], 0
+// CHECK-NEXT:    [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [2 x <16 x i8>] 
[[TMP0]], 0
+// CHECK-NEXT:    [[DOTFCA_1_EXTRACT:%.*]] = extractvalue [2 x <16 x i8>] 
[[TMP0]], 1
+// CHECK-NEXT:    [[DOTFCA_0_0_INSERT:%.*]] = insertvalue 
[[STRUCT_MFLOAT8X16X2_T]] poison, <16 x i8> [[DOTFCA_0_EXTRACT]], 0, 0
+// CHECK-NEXT:    [[DOTFCA_0_1_INSERT:%.*]] = insertvalue 
[[STRUCT_MFLOAT8X16X2_T]] [[DOTFCA_0_0_INSERT]], <16 x i8> 
[[DOTFCA_1_EXTRACT]], 0, 1
+// CHECK-NEXT:    ret [[STRUCT_MFLOAT8X16X2_T]] [[DOTFCA_0_1_INSERT]]
+//
+mfloat8x16x2_t test_vuzpq_mf8(mfloat8x16_t a, mfloat8x16_t b) {
+  return vuzpq_mf8(a, b);
+}
+
+// CHECK-LABEL: define dso_local void @test_vcopy_lane_mf8(
+// CHECK-SAME: <8 x i8> [[ARG_I8X8:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[VGET_LANE:%.*]] = extractelement <8 x i8> [[ARG_I8X8]], 
i32 0
+// CHECK-NEXT:    [[VSET_LANE:%.*]] = insertelement <8 x i8> [[ARG_I8X8]], i8 
[[VGET_LANE]], i32 0
+// CHECK-NEXT:    ret void
+//
+void test_vcopy_lane_mf8(mfloat8x8_t arg_i8x8) {
+       vcopy_lane_mf8(arg_i8x8, 0, arg_i8x8, 0);
+}
+
+// CHECK-LABEL: define dso_local void @test_vcopyq_lane_mf8(
+// CHECK-SAME: <8 x i8> [[ARG_I8X8:%.*]], <16 x i8> [[ARG_I8X16:%.*]]) 
#[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[VGET_LANE:%.*]] = extractelement <8 x i8> [[ARG_I8X8]], 
i32 0
+// CHECK-NEXT:    [[VSET_LANE:%.*]] = insertelement <16 x i8> [[ARG_I8X16]], 
i8 [[VGET_LANE]], i32 0
+// CHECK-NEXT:    ret void
+//
+void test_vcopyq_lane_mf8(mfloat8x8_t arg_i8x8, mfloat8x16_t arg_i8x16) {
+       vcopyq_lane_mf8(arg_i8x16, 0, arg_i8x8, 0);
+}
+
+// CHECK-LABEL: define dso_local void @test_vcopy_laneq_mf8(
+// CHECK-SAME: <8 x i8> [[ARG_I8X8:%.*]], <16 x i8> [[ARG_I8X16:%.*]]) 
#[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[VGET_LANE:%.*]] = extractelement <16 x i8> [[ARG_I8X16]], 
i32 0
+// CHECK-NEXT:    [[VSET_LANE:%.*]] = insertelement <8 x i8> [[ARG_I8X8]], i8 
[[VGET_LANE]], i32 0
+// CHECK-NEXT:    ret void
+//
+void test_vcopy_laneq_mf8(mfloat8x8_t arg_i8x8, mfloat8x16_t arg_i8x16) {
+       vcopy_laneq_mf8(arg_i8x8, 0, arg_i8x16, 0);
+}
+
+// CHECK-LABEL: define dso_local void @test_vcopyq_laneq_mf8(
+// CHECK-SAME: <16 x i8> [[ARG_I8X16:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[VGET_LANE:%.*]] = extractelement <16 x i8> [[ARG_I8X16]], 
i32 0
+// CHECK-NEXT:    [[VSET_LANE:%.*]] = insertelement <16 x i8> [[ARG_I8X16]], 
i8 [[VGET_LANE]], i32 0
+// CHECK-NEXT:    ret void
+//
+void test_vcopyq_laneq_mf8(mfloat8x16_t arg_i8x16) {
+       vcopyq_laneq_mf8(arg_i8x16, 0, arg_i8x16, 0);
+}
+
+// CHECK-LABEL: define dso_local <8 x i8> @test_vdup_lane_mf8(
+// CHECK-SAME: <8 x i8> [[A:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[LANE:%.*]] = shufflevector <8 x i8> [[A]], <8 x i8> [[A]], 
<8 x i32> <i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7>
+// CHECK-NEXT:    ret <8 x i8> [[LANE]]
+//
+mfloat8x8_t test_vdup_lane_mf8(mfloat8x8_t a) {
+  return vdup_lane_mf8(a, 7);
+}
+
+// CHECK-LABEL: define dso_local <16 x i8> @test_vdupq_lane_mf8(
+// CHECK-SAME: <8 x i8> [[A:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[LANE:%.*]] = shufflevector <8 x i8> [[A]], <8 x i8> [[A]], 
<16 x i32> <i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 
7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7>
+// CHECK-NEXT:    ret <16 x i8> [[LANE]]
+//
+mfloat8x16_t test_vdupq_lane_mf8(mfloat8x8_t a) {
+  return vdupq_lane_mf8(a, 7);
+}
+
+// CHECK-LABEL: define dso_local <8 x i8> @test_vdup_laneq_mf8(
+// CHECK-SAME: <16 x i8> [[A:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[LANE:%.*]] = shufflevector <16 x i8> [[A]], <16 x i8> 
[[A]], <8 x i32> <i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7>
+// CHECK-NEXT:    ret <8 x i8> [[LANE]]
+//
+mfloat8x8_t test_vdup_laneq_mf8(mfloat8x16_t a) {
+  return vdup_laneq_mf8(a, 7);
+}
+
+// CHECK-LABEL: define dso_local <16 x i8> @test_vdupq_laneq_mf8(
+// CHECK-SAME: <16 x i8> [[A:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[LANE:%.*]] = shufflevector <16 x i8> [[A]], <16 x i8> 
[[A]], <16 x i32> <i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 
7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7>
+// CHECK-NEXT:    ret <16 x i8> [[LANE]]
+//
+mfloat8x16_t test_vdupq_laneq_mf8(mfloat8x16_t a) {
+  return vdupq_laneq_mf8(a, 7);
+}
+
+// CHECK-LABEL: define dso_local <8 x i8> @test_vtrn1_mf8(
+// CHECK-SAME: <8 x i8> [[A:%.*]], <8 x i8> [[B:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[SHUFFLE_I:%.*]] = shufflevector <8 x i8> [[A]], <8 x i8> 
[[B]], <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
+// CHECK-NEXT:    ret <8 x i8> [[SHUFFLE_I]]
+//
+mfloat8x8_t test_vtrn1_mf8(mfloat8x8_t a, mfloat8x8_t b) {
+  return vtrn1_mf8(a, b);
+}
+
+// CHECK-LABEL: define dso_local <16 x i8> @test_vtrn1q_mf8(
+// CHECK-SAME: <16 x i8> [[A:%.*]], <16 x i8> [[B:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[SHUFFLE_I:%.*]] = shufflevector <16 x i8> [[A]], <16 x i8> 
[[B]], <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, 
i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30>
+// CHECK-NEXT:    ret <16 x i8> [[SHUFFLE_I]]
+//
+mfloat8x16_t test_vtrn1q_mf8(mfloat8x16_t a, mfloat8x16_t b) {
+  return vtrn1q_mf8(a, b);
+}
+
+// CHECK-LABEL: define dso_local <8 x i8> @test_vzip1_mf8(
+// CHECK-SAME: <8 x i8> [[A:%.*]], <8 x i8> [[B:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[SHUFFLE_I:%.*]] = shufflevector <8 x i8> [[A]], <8 x i8> 
[[B]], <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
+// CHECK-NEXT:    ret <8 x i8> [[SHUFFLE_I]]
+//
+mfloat8x8_t test_vzip1_mf8(mfloat8x8_t a, mfloat8x8_t b) {
+  return vzip1_mf8(a, b);
+}
+
+// CHECK-LABEL: define dso_local <16 x i8> @test_vzip1q_mf8(
+// CHECK-SAME: <16 x i8> [[A:%.*]], <16 x i8> [[B:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[SHUFFLE_I:%.*]] = shufflevector <16 x i8> [[A]], <16 x i8> 
[[B]], <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, 
i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23>
+// CHECK-NEXT:    ret <16 x i8> [[SHUFFLE_I]]
+//
+mfloat8x16_t test_vzip1q_mf8(mfloat8x16_t a, mfloat8x16_t b) {
+  return vzip1q_mf8(a, b);
+}
+
+// CHECK-LABEL: define dso_local <8 x i8> @test_vuzp1_mf8(
+// CHECK-SAME: <8 x i8> [[A:%.*]], <8 x i8> [[B:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[SHUFFLE_I:%.*]] = shufflevector <8 x i8> [[A]], <8 x i8> 
[[B]], <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
+// CHECK-NEXT:    ret <8 x i8> [[SHUFFLE_I]]
+//
+mfloat8x8_t test_vuzp1_mf8(mfloat8x8_t a, mfloat8x8_t b) {
+  return vuzp1_mf8(a, b);
+}
+
+// CHECK-LABEL: define dso_local <16 x i8> @test_vuzp1q_mf8(
+// CHECK-SAME: <16 x i8> [[A:%.*]], <16 x i8> [[B:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[SHUFFLE_I:%.*]] = shufflevector <16 x i8> [[A]], <16 x i8> 
[[B]], <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, 
i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
+// CHECK-NEXT:    ret <16 x i8> [[SHUFFLE_I]]
+//
+mfloat8x16_t test_vuzp1q_mf8(mfloat8x16_t a, mfloat8x16_t b) {
+  return vuzp1q_mf8(a, b);
+}
+
+// CHECK-LABEL: define dso_local <8 x i8> @test_vtrn2_mf8(
+// CHECK-SAME: <8 x i8> [[A:%.*]], <8 x i8> [[B:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[SHUFFLE_I:%.*]] = shufflevector <8 x i8> [[A]], <8 x i8> 
[[B]], <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
+// CHECK-NEXT:    ret <8 x i8> [[SHUFFLE_I]]
+//
+mfloat8x8_t test_vtrn2_mf8(mfloat8x8_t a, mfloat8x8_t b) {
+  return vtrn2_mf8(a, b);
+}
+
+// CHECK-LABEL: define dso_local <16 x i8> @test_vtrn2q_mf8(
+// CHECK-SAME: <16 x i8> [[A:%.*]], <16 x i8> [[B:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[SHUFFLE_I:%.*]] = shufflevector <16 x i8> [[A]], <16 x i8> 
[[B]], <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, 
i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31>
+// CHECK-NEXT:    ret <16 x i8> [[SHUFFLE_I]]
+//
+mfloat8x16_t test_vtrn2q_mf8(mfloat8x16_t a, mfloat8x16_t b) {
+  return vtrn2q_mf8(a, b);
+}
+
+// CHECK-LABEL: define dso_local <8 x i8> @test_vzip2_mf8(
+// CHECK-SAME: <8 x i8> [[A:%.*]], <8 x i8> [[B:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[SHUFFLE_I:%.*]] = shufflevector <8 x i8> [[A]], <8 x i8> 
[[B]], <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
+// CHECK-NEXT:    ret <8 x i8> [[SHUFFLE_I]]
+//
+mfloat8x8_t test_vzip2_mf8(mfloat8x8_t a, mfloat8x8_t b) {
+  return vzip2_mf8(a, b);
+}
+
+// CHECK-LABEL: define dso_local <16 x i8> @test_vzip2q_mf8(
+// CHECK-SAME: <16 x i8> [[A:%.*]], <16 x i8> [[B:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[SHUFFLE_I:%.*]] = shufflevector <16 x i8> [[A]], <16 x i8> 
[[B]], <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 
27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31>
+// CHECK-NEXT:    ret <16 x i8> [[SHUFFLE_I]]
+//
+mfloat8x16_t test_vzip2q_mf8(mfloat8x16_t a, mfloat8x16_t b) {
+  return vzip2q_mf8(a, b);
+}
+
+// CHECK-LABEL: define dso_local <8 x i8> @test_vuzp2_mf8(
+// CHECK-SAME: <8 x i8> [[A:%.*]], <8 x i8> [[B:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[SHUFFLE_I:%.*]] = shufflevector <8 x i8> [[A]], <8 x i8> 
[[B]], <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
+// CHECK-NEXT:    ret <8 x i8> [[SHUFFLE_I]]
+//
+mfloat8x8_t test_vuzp2_mf8(mfloat8x8_t a, mfloat8x8_t b) {
+  return vuzp2_mf8(a, b);
+}
+
+// CHECK-LABEL: define dso_local <16 x i8> @test_vuzp2q_mf8(
+// CHECK-SAME: <16 x i8> [[A:%.*]], <16 x i8> [[B:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[SHUFFLE_I:%.*]] = shufflevector <16 x i8> [[A]], <16 x i8> 
[[B]], <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, 
i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
+// CHECK-NEXT:    ret <16 x i8> [[SHUFFLE_I]]
+//
+mfloat8x16_t test_vuzp2q_mf8(mfloat8x16_t a, mfloat8x16_t b) {
+  return vuzp2q_mf8(a, b);
+}
+
+// CHECK-LABEL: define dso_local <8 x i8> @test_vqtbl1_mf8(
+// CHECK-SAME: <16 x i8> [[A:%.*]], <8 x i8> noundef [[B:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[VTBL1_I:%.*]] = call <8 x i8> 
@llvm.aarch64.neon.tbl1.v8i8(<16 x i8> [[A]], <8 x i8> [[B]])
+// CHECK-NEXT:    ret <8 x i8> [[VTBL1_I]]
+//
+mfloat8x8_t test_vqtbl1_mf8(mfloat8x16_t a, uint8x8_t b) {
+  return vqtbl1_mf8(a, b);
+}
+
+// CHECK-LABEL: define dso_local <16 x i8> @test_vqtbl1q_mf8(
+// CHECK-SAME: <16 x i8> [[A:%.*]], <16 x i8> [[B:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[VTBL1_I:%.*]] = call <16 x i8> 
@llvm.aarch64.neon.tbl1.v16i8(<16 x i8> [[A]], <16 x i8> [[B]])
+// CHECK-NEXT:    ret <16 x i8> [[VTBL1_I]]
+//
+mfloat8x16_t test_vqtbl1q_mf8(mfloat8x16_t a, mfloat8x16_t b) {
+  return vqtbl1q_mf8(a, b);
+}
+
+// CHECK-LABEL: define dso_local <8 x i8> @test_vqtbl2_mf8(
+// CHECK-SAME: [2 x <16 x i8>] alignstack(16) [[A_COERCE:%.*]], <8 x i8> 
noundef [[B:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[A_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <16 x 
i8>] [[A_COERCE]], 0
+// CHECK-NEXT:    [[A_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <16 x 
i8>] [[A_COERCE]], 1
+// CHECK-NEXT:    [[DOTFCA_0_INSERT:%.*]] = insertvalue [2 x <16 x i8>] 
poison, <16 x i8> [[A_COERCE_FCA_0_EXTRACT]], 0
+// CHECK-NEXT:    [[DOTFCA_1_INSERT:%.*]] = insertvalue [2 x <16 x i8>] 
[[DOTFCA_0_INSERT]], <16 x i8> [[A_COERCE_FCA_1_EXTRACT]], 1
+// CHECK-NEXT:    [[DOTFCA_1_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [2 x 
<16 x i8>] [[DOTFCA_1_INSERT]], 0
+// CHECK-NEXT:    [[DOTFCA_1_INSERT_FCA_1_EXTRACT:%.*]] = extractvalue [2 x 
<16 x i8>] [[DOTFCA_1_INSERT]], 1
+// CHECK-NEXT:    [[VTBL2_I:%.*]] = call <8 x i8> 
@llvm.aarch64.neon.tbl2.v8i8(<16 x i8> [[DOTFCA_1_INSERT_FCA_0_EXTRACT]], <16 x 
i8> [[DOTFCA_1_INSERT_FCA_1_EXTRACT]], <8 x i8> [[B]])
+// CHECK-NEXT:    ret <8 x i8> [[VTBL2_I]]
+//
+mfloat8x8_t test_vqtbl2_mf8(mfloat8x16x2_t a, uint8x8_t b) {
+  return vqtbl2_mf8(a, b);
+}
+
+// CHECK-LABEL: define dso_local <16 x i8> @test_vqtbl2q_mf8(
+// CHECK-SAME: [2 x <16 x i8>] alignstack(16) [[A_COERCE:%.*]], <16 x i8> 
[[B:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[A_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <16 x 
i8>] [[A_COERCE]], 0
+// CHECK-NEXT:    [[A_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <16 x 
i8>] [[A_COERCE]], 1
+// CHECK-NEXT:    [[DOTFCA_0_INSERT:%.*]] = insertvalue [2 x <16 x i8>] 
poison, <16 x i8> [[A_COERCE_FCA_0_EXTRACT]], 0
+// CHECK-NEXT:    [[DOTFCA_1_INSERT:%.*]] = insertvalue [2 x <16 x i8>] 
[[DOTFCA_0_INSERT]], <16 x i8> [[A_COERCE_FCA_1_EXTRACT]], 1
+// CHECK-NEXT:    [[DOTFCA_1_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [2 x 
<16 x i8>] [[DOTFCA_1_INSERT]], 0
+// CHECK-NEXT:    [[DOTFCA_1_INSERT_FCA_1_EXTRACT:%.*]] = extractvalue [2 x 
<16 x i8>] [[DOTFCA_1_INSERT]], 1
+// CHECK-NEXT:    [[VTBL2_I:%.*]] = call <16 x i8> 
@llvm.aarch64.neon.tbl2.v16i8(<16 x i8> [[DOTFCA_1_INSERT_FCA_0_EXTRACT]], <16 
x i8> [[DOTFCA_1_INSERT_FCA_1_EXTRACT]], <16 x i8> [[B]])
+// CHECK-NEXT:    ret <16 x i8> [[VTBL2_I]]
+//
+mfloat8x16_t test_vqtbl2q_mf8(mfloat8x16x2_t a, mfloat8x16_t b) {
+  return vqtbl2q_mf8(a, b);
+}
+
+// CHECK-LABEL: define dso_local <16 x i8> @test_vqtbl3q_mf8(
+// CHECK-SAME: [3 x <16 x i8>] alignstack(16) [[A_COERCE:%.*]], <16 x i8> 
[[B:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[A_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <16 x 
i8>] [[A_COERCE]], 0
+// CHECK-NEXT:    [[A_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <16 x 
i8>] [[A_COERCE]], 1
+// CHECK-NEXT:    [[A_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <16 x 
i8>] [[A_COERCE]], 2
+// CHECK-NEXT:    [[DOTFCA_0_INSERT:%.*]] = insertvalue [3 x <16 x i8>] 
poison, <16 x i8> [[A_COERCE_FCA_0_EXTRACT]], 0
+// CHECK-NEXT:    [[DOTFCA_1_INSERT:%.*]] = insertvalue [3 x <16 x i8>] 
[[DOTFCA_0_INSERT]], <16 x i8> [[A_COERCE_FCA_1_EXTRACT]], 1
+// CHECK-NEXT:    [[DOTFCA_2_INSERT:%.*]] = insertvalue [3 x <16 x i8>] 
[[DOTFCA_1_INSERT]], <16 x i8> [[A_COERCE_FCA_2_EXTRACT]], 2
+// CHECK-NEXT:    [[DOTFCA_2_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [3 x 
<16 x i8>] [[DOTFCA_2_INSERT]], 0
+// CHECK-NEXT:    [[DOTFCA_2_INSERT_FCA_1_EXTRACT:%.*]] = extractvalue [3 x 
<16 x i8>] [[DOTFCA_2_INSERT]], 1
+// CHECK-NEXT:    [[DOTFCA_2_INSERT_FCA_2_EXTRACT:%.*]] = extractvalue [3 x 
<16 x i8>] [[DOTFCA_2_INSERT]], 2
+// CHECK-NEXT:    [[VTBL3_I:%.*]] = call <16 x i8> 
@llvm.aarch64.neon.tbl3.v16i8(<16 x i8> [[DOTFCA_2_INSERT_FCA_0_EXTRACT]], <16 
x i8> [[DOTFCA_2_INSERT_FCA_1_EXTRACT]], <16 x i8> 
[[DOTFCA_2_INSERT_FCA_2_EXTRACT]], <16 x i8> [[B]])
+// CHECK-NEXT:    ret <16 x i8> [[VTBL3_I]]
+//
+mfloat8x16_t test_vqtbl3q_mf8(mfloat8x16x3_t a, mfloat8x16_t b) {
+  return vqtbl3q_mf8(a, b);
+}
+
+// CHECK-LABEL: define dso_local <8 x i8> @test_vqtbl3_mf8(
+// CHECK-SAME: [3 x <16 x i8>] alignstack(16) [[A_COERCE:%.*]], <8 x i8> 
noundef [[B:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[A_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <16 x 
i8>] [[A_COERCE]], 0
+// CHECK-NEXT:    [[A_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <16 x 
i8>] [[A_COERCE]], 1
+// CHECK-NEXT:    [[A_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <16 x 
i8>] [[A_COERCE]], 2
+// CHECK-NEXT:    [[DOTFCA_0_INSERT:%.*]] = insertvalue [3 x <16 x i8>] 
poison, <16 x i8> [[A_COERCE_FCA_0_EXTRACT]], 0
+// CHECK-NEXT:    [[DOTFCA_1_INSERT:%.*]] = insertvalue [3 x <16 x i8>] 
[[DOTFCA_0_INSERT]], <16 x i8> [[A_COERCE_FCA_1_EXTRACT]], 1
+// CHECK-NEXT:    [[DOTFCA_2_INSERT:%.*]] = insertvalue [3 x <16 x i8>] 
[[DOTFCA_1_INSERT]], <16 x i8> [[A_COERCE_FCA_2_EXTRACT]], 2
+// CHECK-NEXT:    [[DOTFCA_2_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [3 x 
<16 x i8>] [[DOTFCA_2_INSERT]], 0
+// CHECK-NEXT:    [[DOTFCA_2_INSERT_FCA_1_EXTRACT:%.*]] = extractvalue [3 x 
<16 x i8>] [[DOTFCA_2_INSERT]], 1
+// CHECK-NEXT:    [[DOTFCA_2_INSERT_FCA_2_EXTRACT:%.*]] = extractvalue [3 x 
<16 x i8>] [[DOTFCA_2_INSERT]], 2
+// CHECK-NEXT:    [[VTBL3_I:%.*]] = call <8 x i8> 
@llvm.aarch64.neon.tbl3.v8i8(<16 x i8> [[DOTFCA_2_INSERT_FCA_0_EXTRACT]], <16 x 
i8> [[DOTFCA_2_INSERT_FCA_1_EXTRACT]], <16 x i8> 
[[DOTFCA_2_INSERT_FCA_2_EXTRACT]], <8 x i8> [[B]])
+// CHECK-NEXT:    ret <8 x i8> [[VTBL3_I]]
+//
+mfloat8x8_t test_vqtbl3_mf8(mfloat8x16x3_t a, uint8x8_t b) {
+  return vqtbl3_mf8(a, b);
+}
+
+// CHECK-LABEL: define dso_local <8 x i8> @test_vqtbl4_mf8(
+// CHECK-SAME: [4 x <16 x i8>] alignstack(16) [[A_COERCE:%.*]], <8 x i8> 
noundef [[B:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[A_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <16 x 
i8>] [[A_COERCE]], 0
+// CHECK-NEXT:    [[A_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <16 x 
i8>] [[A_COERCE]], 1
+// CHECK-NEXT:    [[A_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <16 x 
i8>] [[A_COERCE]], 2
+// CHECK-NEXT:    [[A_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <16 x 
i8>] [[A_COERCE]], 3
+// CHECK-NEXT:    [[DOTFCA_0_INSERT:%.*]] = insertvalue [4 x <16 x i8>] 
poison, <16 x i8> [[A_COERCE_FCA_0_EXTRACT]], 0
+// CHECK-NEXT:    [[DOTFCA_1_INSERT:%.*]] = insertvalue [4 x <16 x i8>] 
[[DOTFCA_0_INSERT]], <16 x i8> [[A_COERCE_FCA_1_EXTRACT]], 1
+// CHECK-NEXT:    [[DOTFCA_2_INSERT:%.*]] = insertvalue [4 x <16 x i8>] 
[[DOTFCA_1_INSERT]], <16 x i8> [[A_COERCE_FCA_2_EXTRACT]], 2
+// CHECK-NEXT:    [[DOTFCA_3_INSERT:%.*]] = insertvalue [4 x <16 x i8>] 
[[DOTFCA_2_INSERT]], <16 x i8> [[A_COERCE_FCA_3_EXTRACT]], 3
+// CHECK-NEXT:    [[DOTFCA_3_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [4 x 
<16 x i8>] [[DOTFCA_3_INSERT]], 0
+// CHECK-NEXT:    [[DOTFCA_3_INSERT_FCA_1_EXTRACT:%.*]] = extractvalue [4 x 
<16 x i8>] [[DOTFCA_3_INSERT]], 1
+// CHECK-NEXT:    [[DOTFCA_3_INSERT_FCA_2_EXTRACT:%.*]] = extractvalue [4 x 
<16 x i8>] [[DOTFCA_3_INSERT]], 2
+// CHECK-NEXT:    [[DOTFCA_3_INSERT_FCA_3_EXTRACT:%.*]] = extractvalue [4 x 
<16 x i8>] [[DOTFCA_3_INSERT]], 3
+// CHECK-NEXT:    [[VTBL4_I:%.*]] = call <8 x i8> 
@llvm.aarch64.neon.tbl4.v8i8(<16 x i8> [[DOTFCA_3_INSERT_FCA_0_EXTRACT]], <16 x 
i8> [[DOTFCA_3_INSERT_FCA_1_EXTRACT]], <16 x i8> 
[[DOTFCA_3_INSERT_FCA_2_EXTRACT]], <16 x i8> [[DOTFCA_3_INSERT_FCA_3_EXTRACT]], 
<8 x i8> [[B]])
+// CHECK-NEXT:    ret <8 x i8> [[VTBL4_I]]
+//
+mfloat8x8_t test_vqtbl4_mf8(mfloat8x16x4_t a, uint8x8_t b) {
+  return vqtbl4_mf8(a, b);
+}
+
+// CHECK-LABEL: define dso_local <16 x i8> @test_vqtbl4q_mf8(
+// CHECK-SAME: [4 x <16 x i8>] alignstack(16) [[A_COERCE:%.*]], <16 x i8> 
[[B:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[A_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <16 x 
i8>] [[A_COERCE]], 0
+// CHECK-NEXT:    [[A_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <16 x 
i8>] [[A_COERCE]], 1
+// CHECK-NEXT:    [[A_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <16 x 
i8>] [[A_COERCE]], 2
+// CHECK-NEXT:    [[A_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <16 x 
i8>] [[A_COERCE]], 3
+// CHECK-NEXT:    [[DOTFCA_0_INSERT:%.*]] = insertvalue [4 x <16 x i8>] 
poison, <16 x i8> [[A_COERCE_FCA_0_EXTRACT]], 0
+// CHECK-NEXT:    [[DOTFCA_1_INSERT:%.*]] = insertvalue [4 x <16 x i8>] 
[[DOTFCA_0_INSERT]], <16 x i8> [[A_COERCE_FCA_1_EXTRACT]], 1
+// CHECK-NEXT:    [[DOTFCA_2_INSERT:%.*]] = insertvalue [4 x <16 x i8>] 
[[DOTFCA_1_INSERT]], <16 x i8> [[A_COERCE_FCA_2_EXTRACT]], 2
+// CHECK-NEXT:    [[DOTFCA_3_INSERT:%.*]] = insertvalue [4 x <16 x i8>] 
[[DOTFCA_2_INSERT]], <16 x i8> [[A_COERCE_FCA_3_EXTRACT]], 3
+// CHECK-NEXT:    [[DOTFCA_3_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [4 x 
<16 x i8>] [[DOTFCA_3_INSERT]], 0
+// CHECK-NEXT:    [[DOTFCA_3_INSERT_FCA_1_EXTRACT:%.*]] = extractvalue [4 x 
<16 x i8>] [[DOTFCA_3_INSERT]], 1
+// CHECK-NEXT:    [[DOTFCA_3_INSERT_FCA_2_EXTRACT:%.*]] = extractvalue [4 x 
<16 x i8>] [[DOTFCA_3_INSERT]], 2
+// CHECK-NEXT:    [[DOTFCA_3_INSERT_FCA_3_EXTRACT:%.*]] = extractvalue [4 x 
<16 x i8>] [[DOTFCA_3_INSERT]], 3
+// CHECK-NEXT:    [[VTBL4_I:%.*]] = call <16 x i8> 
@llvm.aarch64.neon.tbl4.v16i8(<16 x i8> [[DOTFCA_3_INSERT_FCA_0_EXTRACT]], <16 
x i8> [[DOTFCA_3_INSERT_FCA_1_EXTRACT]], <16 x i8> 
[[DOTFCA_3_INSERT_FCA_2_EXTRACT]], <16 x i8> [[DOTFCA_3_INSERT_FCA_3_EXTRACT]], 
<16 x i8> [[B]])
+// CHECK-NEXT:    ret <16 x i8> [[VTBL4_I]]
+//
+mfloat8x16_t test_vqtbl4q_mf8(mfloat8x16x4_t a, mfloat8x16_t b) {
+  return vqtbl4q_mf8(a, b);
+}
+
+// CHECK-LABEL: define dso_local <8 x i8> @test_vqtbx1_mf8(
+// CHECK-SAME: <8 x i8> [[A:%.*]], <16 x i8> [[B:%.*]], <8 x i8> noundef 
[[C:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[VTBX1_I:%.*]] = call <8 x i8> 
@llvm.aarch64.neon.tbx1.v8i8(<8 x i8> [[A]], <16 x i8> [[B]], <8 x i8> [[C]])
+// CHECK-NEXT:    ret <8 x i8> [[VTBX1_I]]
+//
+mfloat8x8_t test_vqtbx1_mf8(mfloat8x8_t a, mfloat8x16_t b, uint8x8_t c) {
+  return vqtbx1_mf8(a, b, c);
+}
+
+// CHECK-LABEL: define dso_local <16 x i8> @test_vqtbx1q_mf8(
+// CHECK-SAME: <16 x i8> [[A:%.*]], <16 x i8> [[B:%.*]], <16 x i8> noundef 
[[C:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[VTBX1_I:%.*]] = call <16 x i8> 
@llvm.aarch64.neon.tbx1.v16i8(<16 x i8> [[A]], <16 x i8> [[B]], <16 x i8> [[C]])
+// CHECK-NEXT:    ret <16 x i8> [[VTBX1_I]]
+//
+mfloat8x16_t test_vqtbx1q_mf8(mfloat8x16_t a, mfloat8x16_t b, uint8x16_t c) {
+  return vqtbx1q_mf8(a, b, c);
+}
+
+// CHECK-LABEL: define dso_local <8 x i8> @test_vqtbx2_mf8(
+// CHECK-SAME: <8 x i8> [[A:%.*]], [2 x <16 x i8>] alignstack(16) 
[[B_COERCE:%.*]], <8 x i8> noundef [[C:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <16 x 
i8>] [[B_COERCE]], 0
+// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <16 x 
i8>] [[B_COERCE]], 1
+// CHECK-NEXT:    [[DOTFCA_0_INSERT:%.*]] = insertvalue [2 x <16 x i8>] 
poison, <16 x i8> [[B_COERCE_FCA_0_EXTRACT]], 0
+// CHECK-NEXT:    [[DOTFCA_1_INSERT:%.*]] = insertvalue [2 x <16 x i8>] 
[[DOTFCA_0_INSERT]], <16 x i8> [[B_COERCE_FCA_1_EXTRACT]], 1
+// CHECK-NEXT:    [[DOTFCA_1_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [2 x 
<16 x i8>] [[DOTFCA_1_INSERT]], 0
+// CHECK-NEXT:    [[DOTFCA_1_INSERT_FCA_1_EXTRACT:%.*]] = extractvalue [2 x 
<16 x i8>] [[DOTFCA_1_INSERT]], 1
+// CHECK-NEXT:    [[VTBX2_I:%.*]] = call <8 x i8> 
@llvm.aarch64.neon.tbx2.v8i8(<8 x i8> [[A]], <16 x i8> 
[[DOTFCA_1_INSERT_FCA_0_EXTRACT]], <16 x i8> [[DOTFCA_1_INSERT_FCA_1_EXTRACT]], 
<8 x i8> [[C]])
+// CHECK-NEXT:    ret <8 x i8> [[VTBX2_I]]
+//
+mfloat8x8_t test_vqtbx2_mf8(mfloat8x8_t a, mfloat8x16x2_t b, uint8x8_t c) {
+  return vqtbx2_mf8(a, b, c);
+}
+
+// CHECK-LABEL: define dso_local <16 x i8> @test_vqtbx2q_mf8(
+// CHECK-SAME: <16 x i8> [[A:%.*]], [2 x <16 x i8>] alignstack(16) 
[[B_COERCE:%.*]], <16 x i8> [[C:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <16 x 
i8>] [[B_COERCE]], 0
+// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <16 x 
i8>] [[B_COERCE]], 1
+// CHECK-NEXT:    [[DOTFCA_0_INSERT:%.*]] = insertvalue [2 x <16 x i8>] 
poison, <16 x i8> [[B_COERCE_FCA_0_EXTRACT]], 0
+// CHECK-NEXT:    [[DOTFCA_1_INSERT:%.*]] = insertvalue [2 x <16 x i8>] 
[[DOTFCA_0_INSERT]], <16 x i8> [[B_COERCE_FCA_1_EXTRACT]], 1
+// CHECK-NEXT:    [[DOTFCA_1_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [2 x 
<16 x i8>] [[DOTFCA_1_INSERT]], 0
+// CHECK-NEXT:    [[DOTFCA_1_INSERT_FCA_1_EXTRACT:%.*]] = extractvalue [2 x 
<16 x i8>] [[DOTFCA_1_INSERT]], 1
+// CHECK-NEXT:    [[VTBX2_I:%.*]] = call <16 x i8> 
@llvm.aarch64.neon.tbx2.v16i8(<16 x i8> [[A]], <16 x i8> 
[[DOTFCA_1_INSERT_FCA_0_EXTRACT]], <16 x i8> [[DOTFCA_1_INSERT_FCA_1_EXTRACT]], 
<16 x i8> [[C]])
+// CHECK-NEXT:    ret <16 x i8> [[VTBX2_I]]
+//
+mfloat8x16_t test_vqtbx2q_mf8(mfloat8x16_t a, mfloat8x16x2_t b, mfloat8x16_t 
c) {
+  return vqtbx2q_mf8(a, b, c);
+}
+
+// CHECK-LABEL: define dso_local <8 x i8> @test_vqtbx3_mf8(
+// CHECK-SAME: <8 x i8> [[A:%.*]], [3 x <16 x i8>] alignstack(16) 
[[B_COERCE:%.*]], <8 x i8> noundef [[C:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <16 x 
i8>] [[B_COERCE]], 0
+// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <16 x 
i8>] [[B_COERCE]], 1
+// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <16 x 
i8>] [[B_COERCE]], 2
+// CHECK-NEXT:    [[DOTFCA_0_INSERT:%.*]] = insertvalue [3 x <16 x i8>] 
poison, <16 x i8> [[B_COERCE_FCA_0_EXTRACT]], 0
+// CHECK-NEXT:    [[DOTFCA_1_INSERT:%.*]] = insertvalue [3 x <16 x i8>] 
[[DOTFCA_0_INSERT]], <16 x i8> [[B_COERCE_FCA_1_EXTRACT]], 1
+// CHECK-NEXT:    [[DOTFCA_2_INSERT:%.*]] = insertvalue [3 x <16 x i8>] 
[[DOTFCA_1_INSERT]], <16 x i8> [[B_COERCE_FCA_2_EXTRACT]], 2
+// CHECK-NEXT:    [[DOTFCA_2_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [3 x 
<16 x i8>] [[DOTFCA_2_INSERT]], 0
+// CHECK-NEXT:    [[DOTFCA_2_INSERT_FCA_1_EXTRACT:%.*]] = extractvalue [3 x 
<16 x i8>] [[DOTFCA_2_INSERT]], 1
+// CHECK-NEXT:    [[DOTFCA_2_INSERT_FCA_2_EXTRACT:%.*]] = extractvalue [3 x 
<16 x i8>] [[DOTFCA_2_INSERT]], 2
+// CHECK-NEXT:    [[VTBX3_I:%.*]] = call <8 x i8> 
@llvm.aarch64.neon.tbx3.v8i8(<8 x i8> [[A]], <16 x i8> 
[[DOTFCA_2_INSERT_FCA_0_EXTRACT]], <16 x i8> [[DOTFCA_2_INSERT_FCA_1_EXTRACT]], 
<16 x i8> [[DOTFCA_2_INSERT_FCA_2_EXTRACT]], <8 x i8> [[C]])
+// CHECK-NEXT:    ret <8 x i8> [[VTBX3_I]]
+//
+mfloat8x8_t test_vqtbx3_mf8(mfloat8x8_t a, mfloat8x16x3_t b, uint8x8_t c) {
+  return vqtbx3_mf8(a, b, c);
+}
+
+// CHECK-LABEL: define dso_local <16 x i8> @test_vqtbx3q_mf8(
+// CHECK-SAME: <16 x i8> [[A:%.*]], [3 x <16 x i8>] alignstack(16) 
[[B_COERCE:%.*]], <16 x i8> [[C:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <16 x 
i8>] [[B_COERCE]], 0
+// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <16 x 
i8>] [[B_COERCE]], 1
+// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <16 x 
i8>] [[B_COERCE]], 2
+// CHECK-NEXT:    [[DOTFCA_0_INSERT:%.*]] = insertvalue [3 x <16 x i8>] 
poison, <16 x i8> [[B_COERCE_FCA_0_EXTRACT]], 0
+// CHECK-NEXT:    [[DOTFCA_1_INSERT:%.*]] = insertvalue [3 x <16 x i8>] 
[[DOTFCA_0_INSERT]], <16 x i8> [[B_COERCE_FCA_1_EXTRACT]], 1
+// CHECK-NEXT:    [[DOTFCA_2_INSERT:%.*]] = insertvalue [3 x <16 x i8>] 
[[DOTFCA_1_INSERT]], <16 x i8> [[B_COERCE_FCA_2_EXTRACT]], 2
+// CHECK-NEXT:    [[DOTFCA_2_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [3 x 
<16 x i8>] [[DOTFCA_2_INSERT]], 0
+// CHECK-NEXT:    [[DOTFCA_2_INSERT_FCA_1_EXTRACT:%.*]] = extractvalue [3 x 
<16 x i8>] [[DOTFCA_2_INSERT]], 1
+// CHECK-NEXT:    [[DOTFCA_2_INSERT_FCA_2_EXTRACT:%.*]] = extractvalue [3 x 
<16 x i8>] [[DOTFCA_2_INSERT]], 2
+// CHECK-NEXT:    [[VTBX3_I:%.*]] = call <16 x i8> 
@llvm.aarch64.neon.tbx3.v16i8(<16 x i8> [[A]], <16 x i8> 
[[DOTFCA_2_INSERT_FCA_0_EXTRACT]], <16 x i8> [[DOTFCA_2_INSERT_FCA_1_EXTRACT]], 
<16 x i8> [[DOTFCA_2_INSERT_FCA_2_EXTRACT]], <16 x i8> [[C]])
+// CHECK-NEXT:    ret <16 x i8> [[VTBX3_I]]
+//
+mfloat8x16_t test_vqtbx3q_mf8(mfloat8x16_t a, mfloat8x16x3_t b, mfloat8x16_t 
c) {
+  return vqtbx3q_mf8(a, b, c);
+}
+
+// CHECK-LABEL: define dso_local <8 x i8> @test_vqtbx4_mf8(
+// CHECK-SAME: <8 x i8> [[A:%.*]], [4 x <16 x i8>] alignstack(16) 
[[B_COERCE:%.*]], <8 x i8> noundef [[C:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <16 x 
i8>] [[B_COERCE]], 0
+// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <16 x 
i8>] [[B_COERCE]], 1
+// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <16 x 
i8>] [[B_COERCE]], 2
+// CHECK-NEXT:    [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <16 x 
i8>] [[B_COERCE]], 3
+// CHECK-NEXT:    [[DOTFCA_0_INSERT:%.*]] = insertvalue [4 x <16 x i8>] 
poison, <16 x i8> [[B_COERCE_FCA_0_EXTRACT]], 0
+// CHECK-NEXT:    [[DOTFCA_1_INSERT:%.*]] = insertvalue [4 x <16 x i8>] 
[[DOTFCA_0_INSERT]], <16 x i8> [[B_COERCE_FCA_1_EXTRACT]], 1
+// CHECK-NEXT:    [[DOTFCA_2_INSERT:%.*]] = insertvalue [4 x <16 x i8>] 
[[DOTFCA_1_INSERT]], <16 x i8> [[B_COERCE_FCA_2_EXTRACT]], 2
+// CHECK-NEXT:    [[DOTFCA_3_INSERT:%.*]] = insertvalue [4 x <16 x i8>] 
[[DOTFCA_2_INSERT]], <16 x i8> [[B_COERCE_FCA_3_EXTRACT]], 3
+// CHECK-NEXT:    [[DOTFCA_3_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [4 x 
<16 x i8>] [[DOTFCA_3_INSERT]], 0
+// CHECK-NEXT:    [[DOTFCA_3_INSERT_FCA_1_EXTRACT:%.*]] = extractvalue [4 x 
<16 x i8>] [[DOTFCA_3_INSERT]], 1
+// CHECK-NEXT:    [[DOTFCA_3_INSERT_FCA_2_EXTRACT:%.*]] = extractvalue [4 x 
<16 x i8>] [[DOTFCA_3_INSERT]], 2
+// CHECK-NEXT:    [[DOTFCA_3_INSERT_FCA_3_EXTRACT:%.*]] = extractvalue [4 x 
<16 x i8>] [[DOTFCA_3_INSERT]], 3
+// CHECK-NEXT:    [[VTBX4_I:%.*]] = call <8 x i8> 
@llvm.aarch64.neon.tbx4.v8i8(<8 x i8> [[A]], <16 x i8> 
[[DOTFCA_3_INSERT_FCA_0_EXTRACT]], <16 x i8> [[DOTFCA_3_INSERT_FCA_1_EXTRACT]], 
<16 x i8> [[DOTFCA_3_INSERT_FCA_2_EXTRACT]], <16 x i8> 
[[DOTFCA_3_INSERT_FCA_3_EXTRACT]], <8 x i8> [[C]])
+// CHECK-NEXT:    ret <8 x i8> [[VTBX4_I]]
+//
+mfloat8x8_t test_vqtbx4_mf8(mfloat8x8_t a, mfloat8x16x4_t b, uint8x8_t c) {
+  return vqtbx4_mf8(a, b, c);
+}
+
+// CHECK-LABEL: define dso_local <16 x i8> @test_vqtbx4q_mf8(
+// CHECK-SAME: <16 x i8> [[A:%.*]], [4 x <16 x i8>] alignstack(16) 
[[B_COERCE:%.*]], <16 x i8> [[C:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x <16 x 
i8>] [[B_COERCE]], 0
+// CHECK-NEXT:    [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <16 x 
i8>] [[B_COERCE]], 1
+// CHECK-NEXT:    [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <16 x 
i8>] [[B_COERCE]], 2
+// CHECK-NEXT:    [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <16 x 
i8>] [[B_COERCE]], 3
+// CHECK-NEXT:    [[DOTFCA_0_INSERT:%.*]] = insertvalue [4 x <16 x i8>] 
poison, <16 x i8> [[B_COERCE_FCA_0_EXTRACT]], 0
+// CHECK-NEXT:    [[DOTFCA_1_INSERT:%.*]] = insertvalue [4 x <16 x i8>] 
[[DOTFCA_0_INSERT]], <16 x i8> [[B_COERCE_FCA_1_EXTRACT]], 1
+// CHECK-NEXT:    [[DOTFCA_2_INSERT:%.*]] = insertvalue [4 x <16 x i8>] 
[[DOTFCA_1_INSERT]], <16 x i8> [[B_COERCE_FCA_2_EXTRACT]], 2
+// CHECK-NEXT:    [[DOTFCA_3_INSERT:%.*]] = insertvalue [4 x <16 x i8>] 
[[DOTFCA_2_INSERT]], <16 x i8> [[B_COERCE_FCA_3_EXTRACT]], 3
+// CHECK-NEXT:    [[DOTFCA_3_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [4 x 
<16 x i8>] [[DOTFCA_3_INSERT]], 0
+// CHECK-NEXT:    [[DOTFCA_3_INSERT_FCA_1_EXTRACT:%.*]] = extractvalue [4 x 
<16 x i8>] [[DOTFCA_3_INSERT]], 1
+// CHECK-NEXT:    [[DOTFCA_3_INSERT_FCA_2_EXTRACT:%.*]] = extractvalue [4 x 
<16 x i8>] [[DOTFCA_3_INSERT]], 2
+// CHECK-NEXT:    [[DOTFCA_3_INSERT_FCA_3_EXTRACT:%.*]] = extractvalue [4 x 
<16 x i8>] [[DOTFCA_3_INSERT]], 3
+// CHECK-NEXT:    [[VTBX4_I:%.*]] = call <16 x i8> 
@llvm.aarch64.neon.tbx4.v16i8(<16 x i8> [[A]], <16 x i8> 
[[DOTFCA_3_INSERT_FCA_0_EXTRACT]], <16 x i8> [[DOTFCA_3_INSERT_FCA_1_EXTRACT]], 
<16 x i8> [[DOTFCA_3_INSERT_FCA_2_EXTRACT]], <16 x i8> 
[[DOTFCA_3_INSERT_FCA_3_EXTRACT]], <16 x i8> [[C]])
+// CHECK-NEXT:    ret <16 x i8> [[VTBX4_I]]
+//
+mfloat8x16_t test_vqtbx4q_mf8(mfloat8x16_t a, mfloat8x16x4_t b, mfloat8x16_t 
c) {
+  return vqtbx4q_mf8(a, b, c);
+}
+
+// CHECK-LABEL: define dso_local <16 x i8> @test_vluti2_lane_mf8(
+// CHECK-SAME: <8 x i8> [[VN:%.*]], <8 x i8> noundef [[VM:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[VLUTI2_LANE:%.*]] = call <16 x i8> 
@llvm.aarch64.neon.vluti2.lane.v16i8.v8i8(<8 x i8> [[VN]], <8 x i8> [[VM]], i32 
0)
+// CHECK-NEXT:    ret <16 x i8> [[VLUTI2_LANE]]
+//
+mfloat8x16_t test_vluti2_lane_mf8(mfloat8x8_t vn, uint8x8_t vm) {
+  return vluti2_lane_mf8(vn, vm, 0);
+}
+
+// CHECK-LABEL: define dso_local <16 x i8> @test_vluti2q_lane_mf8(
+// CHECK-SAME: <16 x i8> [[VN:%.*]], <8 x i8> noundef [[VM:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[VLUTI2_LANE:%.*]] = call <16 x i8> 
@llvm.aarch64.neon.vluti2.lane.v16i8.v16i8(<16 x i8> [[VN]], <8 x i8> [[VM]], 
i32 1)
+// CHECK-NEXT:    ret <16 x i8> [[VLUTI2_LANE]]
+//
+mfloat8x16_t test_vluti2q_lane_mf8(mfloat8x16_t vn, uint8x8_t vm) {
+  return vluti2q_lane_mf8(vn, vm, 1);
+}
+
+// CHECK-LABEL: define dso_local <16 x i8> @test_vluti2_laneq_mf8(
+// CHECK-SAME: <8 x i8> [[VN:%.*]], <16 x i8> noundef [[VM:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[VLUTI2_LANEQ:%.*]] = call <16 x i8> 
@llvm.aarch64.neon.vluti2.laneq.v16i8.v8i8(<8 x i8> [[VN]], <16 x i8> [[VM]], 
i32 0)
+// CHECK-NEXT:    ret <16 x i8> [[VLUTI2_LANEQ]]
+//
+mfloat8x16_t test_vluti2_laneq_mf8(mfloat8x8_t vn, uint8x16_t vm) {
+  return vluti2_laneq_mf8(vn, vm, 0);
+}
+
+// CHECK-LABEL: define dso_local <16 x i8> @test_vluti2q_laneq_mf8(
+// CHECK-SAME: <16 x i8> [[VN:%.*]], <16 x i8> noundef [[VM:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[VLUTI2_LANEQ:%.*]] = call <16 x i8> 
@llvm.aarch64.neon.vluti2.laneq.v16i8.v16i8(<16 x i8> [[VN]], <16 x i8> [[VM]], 
i32 3)
+// CHECK-NEXT:    ret <16 x i8> [[VLUTI2_LANEQ]]
+//
+mfloat8x16_t test_vluti2q_laneq_mf8(mfloat8x16_t vn, uint8x16_t vm) {
+  return vluti2q_laneq_mf8(vn, vm, 3);
+}
+
+// CHECK-LABEL: define dso_local <16 x i8> @test_vluti4q_lane_mf8(
+// CHECK-SAME: <16 x i8> [[VN:%.*]], <8 x i8> noundef [[VM:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[VLUTI4Q_LANE:%.*]] = call <16 x i8> 
@llvm.aarch64.neon.vluti4q.lane.v16i8(<16 x i8> [[VN]], <8 x i8> [[VM]], i32 0)
+// CHECK-NEXT:    ret <16 x i8> [[VLUTI4Q_LANE]]
+//
+mfloat8x16_t test_vluti4q_lane_mf8(mfloat8x16_t vn, uint8x8_t vm) {
+  return vluti4q_lane_mf8(vn, vm, 0);
+}
+
+// CHECK-LABEL: define dso_local <16 x i8> @test_vluti4q_laneq_mf8(
+// CHECK-SAME: <16 x i8> [[VN:%.*]], <16 x i8> noundef [[VM:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  [[ENTRY:.*:]]
+// CHECK-NEXT:    [[VLUTI4Q_LANEQ:%.*]] = call <16 x i8> 
@llvm.aarch64.neon.vluti4q.laneq.v16i8(<16 x i8> [[VN]], <16 x i8> [[VM]], i32 
1)
+// CHECK-NEXT:    ret <16 x i8> [[VLUTI4Q_LANEQ]]
+//
+mfloat8x16_t test_vluti4q_laneq_mf8(mfloat8x16_t vn, uint8x16_t vm) {
+  return vluti4q_laneq_mf8(vn, vm, 1);
+}

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