================
@@ -548,11 +543,28 @@ SystemZTargetLowering::SystemZTargetLowering(const
TargetMachine &TM,
}
// Handle floating-point types.
+ if (!useSoftFloat()) {
+ // Promote all f16 operations to float, with some exceptions below.
+ for (unsigned Opc = 0; Opc < ISD::BUILTIN_OP_END; ++Opc)
+ setOperationAction(Opc, MVT::f16, Promote);
----------------
JonPsson1 wrote:
- #97975 _"...a conversion back to f16 must occur after each operation,
otherwise the excess precision of float will affect the result..."_: There are
already tests for this, for example @fun6 in fp-half.ll.
- #97981 _"... The issue is that these builtins silence signalling NaNs which
changes the NaN payload, meaning that the roundtrip of half -> float -> half is
not lossless and causes the generated ASM to violate the semantics of LLVM
IR...":_ Not sure what to do about this one.
https://github.com/llvm/llvm-project/pull/109164
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