https://github.com/sjoerdmeijer updated
https://github.com/llvm/llvm-project/pull/133054
>From b1619f7b2835acafb4d76e6a16e678b17ddbe8b3 Mon Sep 17 00:00:00 2001
From: Sjoerd Meijer <smei...@nvidia.com>
Date: Wed, 26 Mar 2025 04:38:48 -0700
Subject: [PATCH] [AArch64] Add FEAT_FPAC to Neoverse V2
This feature is supported in Grace, but wasn't specified in the CPU
definition.
---
clang/test/Driver/aarch64-mcpu-native.c | 1 +
clang/test/Driver/print-enabled-extensions/aarch64-grace.c | 3 ++-
.../test/Driver/print-enabled-extensions/aarch64-neoverse-v2.c | 1 +
llvm/lib/Target/AArch64/AArch64Processors.td | 2 +-
4 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/clang/test/Driver/aarch64-mcpu-native.c
b/clang/test/Driver/aarch64-mcpu-native.c
index 2e7fc2c5adc45..a349a8e9827b8 100644
--- a/clang/test/Driver/aarch64-mcpu-native.c
+++ b/clang/test/Driver/aarch64-mcpu-native.c
@@ -22,6 +22,7 @@
// CHECK-FEAT-NV2: FEAT_FHM
Enable FP16 FML instructions
// CHECK-FEAT-NV2: FEAT_FP
Enable Armv8.0-A Floating Point Extensions
// CHECK-FEAT-NV2: FEAT_FP16
Enable half-precision floating-point data processing
+// CHECK-FEAT-NV2: FEAT_FPAC
Enable Armv8.3-A Pointer Authentication Faulting enhancement
// CHECK-FEAT-NV2: FEAT_FRINTTS
Enable FRInt[32|64][Z|X] instructions that round a floating-point number to an
integer (in FP format) forcing it to fit into a 32- or 64-bit int
// CHECK-FEAT-NV2: FEAT_FlagM
Enable Armv8.4-A Flag Manipulation instructions
// CHECK-FEAT-NV2: FEAT_FlagM2
Enable alternative NZCV format for floating point comparisons
diff --git a/clang/test/Driver/print-enabled-extensions/aarch64-grace.c
b/clang/test/Driver/print-enabled-extensions/aarch64-grace.c
index fde6aee468cdc..739d86f1fae0f 100644
--- a/clang/test/Driver/print-enabled-extensions/aarch64-grace.c
+++ b/clang/test/Driver/print-enabled-extensions/aarch64-grace.c
@@ -21,6 +21,7 @@
// CHECK-NEXT: FEAT_FHM
Enable FP16 FML instructions
// CHECK-NEXT: FEAT_FP
Enable Armv8.0-A Floating Point Extensions
// CHECK-NEXT: FEAT_FP16
Enable half-precision floating-point data processing
+// CHECK-NEXT: FEAT_FPAC
Enable Armv8.3-A Pointer Authentication Faulting enhancement
// CHECK-NEXT: FEAT_FRINTTS
Enable FRInt[32|64][Z|X] instructions that round a floating-point number to an
integer (in FP format) forcing it to fit into a 32- or 64-bit int
// CHECK-NEXT: FEAT_FlagM
Enable Armv8.4-A Flag Manipulation instructions
// CHECK-NEXT: FEAT_FlagM2
Enable alternative NZCV format for floating point comparisons
@@ -59,4 +60,4 @@
// CHECK-NEXT: FEAT_TRBE
Enable Trace Buffer Extension
// CHECK-NEXT: FEAT_TRF
Enable Armv8.4-A Trace extension
// CHECK-NEXT: FEAT_UAO
Enable Armv8.2-A UAO PState
-// CHECK-NEXT: FEAT_VHE
Enable Armv8.1-A Virtual Host extension
\ No newline at end of file
+// CHECK-NEXT: FEAT_VHE
Enable Armv8.1-A Virtual Host extension
diff --git a/clang/test/Driver/print-enabled-extensions/aarch64-neoverse-v2.c
b/clang/test/Driver/print-enabled-extensions/aarch64-neoverse-v2.c
index b11acdd34ee6d..6c2c2e3b0feb6 100644
--- a/clang/test/Driver/print-enabled-extensions/aarch64-neoverse-v2.c
+++ b/clang/test/Driver/print-enabled-extensions/aarch64-neoverse-v2.c
@@ -20,6 +20,7 @@
// CHECK-NEXT: FEAT_FHM
Enable FP16 FML instructions
// CHECK-NEXT: FEAT_FP
Enable Armv8.0-A Floating Point Extensions
// CHECK-NEXT: FEAT_FP16
Enable half-precision floating-point data processing
+// CHECK-NEXT: FEAT_FPAC
Enable Armv8.3-A Pointer Authentication Faulting enhancement
// CHECK-NEXT: FEAT_FRINTTS
Enable FRInt[32|64][Z|X] instructions that round a floating-point number to an
integer (in FP format) forcing it to fit into a 32- or 64-bit int
// CHECK-NEXT: FEAT_FlagM
Enable Armv8.4-A Flag Manipulation instructions
// CHECK-NEXT: FEAT_FlagM2
Enable alternative NZCV format for floating point comparisons
diff --git a/llvm/lib/Target/AArch64/AArch64Processors.td
b/llvm/lib/Target/AArch64/AArch64Processors.td
index e62cbd5be7609..67d3ff685e6f1 100644
--- a/llvm/lib/Target/AArch64/AArch64Processors.td
+++ b/llvm/lib/Target/AArch64/AArch64Processors.td
@@ -1015,7 +1015,7 @@ def ProcessorFeatures {
FeatureCCIDX,
FeatureSVE, FeatureSVE2, FeatureSSBS,
FeatureFullFP16, FeatureDotProd,
FeatureComplxNum, FeatureCRC,
FeatureFPARMv8, FeatureJS, FeatureLSE,
- FeaturePAuth, FeatureRAS, FeatureRCPC,
FeatureRDM];
+ FeaturePAuth, FeatureRAS, FeatureRCPC,
FeatureRDM, FeatureFPAC];
list<SubtargetFeature> NeoverseV3 = [HasV9_2aOps, FeatureETE, FeatureFP16FML,
FeatureFullFP16, FeatureLS64, FeatureMTE,
FeaturePerfMon, FeatureRandGen,
FeatureSPE,
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