[clang] [llvm] [RISCV] Add Qualcomm uC Xqcibi (Branch Immediate) extension (PR #130779)

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@@ -825,6 +825,17 @@ struct RISCVOperand final : public MCParsedAsmOperand {
            VK == RISCVMCExpr::VK_RISCV_None;
   }
 
+  bool isSImm5NonZero() const {
+    if (!isImm())
+      return false;
+    RISCVMCExpr::VariantKind VK = RISCVMCExpr::VK_RISCV_None;
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hchandel wrote:

Thanks. This is handled in #131774.

https://github.com/llvm/llvm-project/pull/130779
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