================ @@ -385,6 +389,20 @@ RISCVMCCodeEmitter::getMachineOpValue(const MCInst &MI, const MCOperand &MO, return 0; } +uint64_t +RISCVMCCodeEmitter::getImmOpValueMinus1(const MCInst &MI, unsigned OpNo, + SmallVectorImpl<MCFixup> &Fixups, + const MCSubtargetInfo &STI) const { + const MCOperand &MO = MI.getOperand(OpNo); + + if (MO.isImm()) { + uint64_t Res = MO.getImm(); + return (Res - 1); + } + + return getImmOpValue(MI, OpNo, Fixups, STI); ---------------- hchandel wrote:
Done. https://github.com/llvm/llvm-project/pull/129504 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits