Author: Brandon Wu Date: 2025-03-03T17:37:55+08:00 New Revision: 1119b7297780e870e8ae05651389913e09ae2036
URL: https://github.com/llvm/llvm-project/commit/1119b7297780e870e8ae05651389913e09ae2036 DIFF: https://github.com/llvm/llvm-project/commit/1119b7297780e870e8ae05651389913e09ae2036.diff LOG: [RISCV][clang] Add address space argument to getNaturalAlignIndirect (#129493) This is introduced in 39ec9de7c23063b87f5c56f4e80c8d0f8b511a4b Added: Modified: clang/lib/CodeGen/Targets/RISCV.cpp Removed: ################################################################################ diff --git a/clang/lib/CodeGen/Targets/RISCV.cpp b/clang/lib/CodeGen/Targets/RISCV.cpp index 109fa1f9ee521..e350a3589dcaf 100644 --- a/clang/lib/CodeGen/Targets/RISCV.cpp +++ b/clang/lib/CodeGen/Targets/RISCV.cpp @@ -578,7 +578,9 @@ ABIArgInfo RISCVABIInfo::coerceVLSVector(QualType Ty, unsigned ABIVLen) const { } else { // Check registers needed <= 8. if ((EltType->getScalarSizeInBits() * NumElts / ABIVLen) > 8) - return getNaturalAlignIndirect(Ty, /*ByVal=*/false); + return getNaturalAlignIndirect( + Ty, /*AddrSpace=*/getDataLayout().getAllocaAddrSpace(), + /*ByVal=*/false); // Generic vector // The number of elements needs to be at least 1. _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
