https://github.com/JonChesterfield created
https://github.com/llvm/llvm-project/pull/128569
Problem identified by Joseph. The openmp device runtime uses
__scoped_atomic_load_n and similar which presently hit
```
error: large atomic operation may incur significant performance
penalty; the access size (4 bytes) exceeds the max lock-free size (0
bytes) [-Werror,-Watomic-alignment]
```
This is because the spirv class doesn't set the corresponding field. The base
does, but only if there's a host toolchain, which there isn't.
>From a703b8540718e48f5d649e0d139a186890161809 Mon Sep 17 00:00:00 2001
From: Jon Chesterfield <jonathanchesterfi...@gmail.com>
Date: Mon, 24 Feb 2025 20:39:35 +0000
Subject: [PATCH] [spirv][amdgpu] Set atomic size in the clang target info
---
clang/lib/Basic/Targets/SPIR.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/clang/lib/Basic/Targets/SPIR.h b/clang/lib/Basic/Targets/SPIR.h
index 61f9ef7e3e361..610efa1fe00d9 100644
--- a/clang/lib/Basic/Targets/SPIR.h
+++ b/clang/lib/Basic/Targets/SPIR.h
@@ -399,6 +399,8 @@ class LLVM_LIBRARY_VISIBILITY SPIRV64AMDGCNTargetInfo final
HasLegalHalfType = true;
HasFloat16 = true;
HalfArgsAndReturns = true;
+
+ MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
}
bool hasBFloat16Type() const override { return true; }
_______________________________________________
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
