Author: echristo Date: Tue Mar 28 18:03:19 2017 New Revision: 298956 URL: http://llvm.org/viewvc/llvm-project?rev=298956&view=rev Log: Default enable the rtm feature only on skylake and later for now because Intel disabled the feature on some haswell and broadwell processors:
http://www.intel.com/content/dam/www/public/us/en/documents/specification-updates/core-m-processor-family-spec-update.pdf the -mrtm option will still work normally. Modified: cfe/trunk/lib/Basic/Targets.cpp cfe/trunk/test/Preprocessor/predefined-arch-macros.c Modified: cfe/trunk/lib/Basic/Targets.cpp URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets.cpp?rev=298956&r1=298955&r2=298956&view=diff ============================================================================== --- cfe/trunk/lib/Basic/Targets.cpp (original) +++ cfe/trunk/lib/Basic/Targets.cpp Tue Mar 28 18:03:19 2017 @@ -3194,6 +3194,7 @@ bool X86TargetInfo::initFeatureMap( setFeatureEnabledImpl(Features, "mpx", true); setFeatureEnabledImpl(Features, "sgx", true); setFeatureEnabledImpl(Features, "clflushopt", true); + setFeatureEnabledImpl(Features, "rtm", true); LLVM_FALLTHROUGH; case CK_Broadwell: setFeatureEnabledImpl(Features, "rdseed", true); @@ -3204,7 +3205,6 @@ bool X86TargetInfo::initFeatureMap( setFeatureEnabledImpl(Features, "lzcnt", true); setFeatureEnabledImpl(Features, "bmi", true); setFeatureEnabledImpl(Features, "bmi2", true); - setFeatureEnabledImpl(Features, "rtm", true); setFeatureEnabledImpl(Features, "fma", true); setFeatureEnabledImpl(Features, "movbe", true); LLVM_FALLTHROUGH; Modified: cfe/trunk/test/Preprocessor/predefined-arch-macros.c URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Preprocessor/predefined-arch-macros.c?rev=298956&r1=298955&r2=298956&view=diff ============================================================================== --- cfe/trunk/test/Preprocessor/predefined-arch-macros.c (original) +++ cfe/trunk/test/Preprocessor/predefined-arch-macros.c Tue Mar 28 18:03:19 2017 @@ -525,7 +525,6 @@ // CHECK_CORE_AVX2_M32: #define __PCLMUL__ 1 // CHECK_CORE_AVX2_M32: #define __POPCNT__ 1 // CHECK_CORE_AVX2_M32: #define __RDRND__ 1 -// CHECK_CORE_AVX2_M32: #define __RTM__ 1 // CHECK_CORE_AVX2_M32: #define __SSE2__ 1 // CHECK_CORE_AVX2_M32: #define __SSE3__ 1 // CHECK_CORE_AVX2_M32: #define __SSE4_1__ 1 @@ -555,7 +554,6 @@ // CHECK_CORE_AVX2_M64: #define __PCLMUL__ 1 // CHECK_CORE_AVX2_M64: #define __POPCNT__ 1 // CHECK_CORE_AVX2_M64: #define __RDRND__ 1 -// CHECK_CORE_AVX2_M64: #define __RTM__ 1 // CHECK_CORE_AVX2_M64: #define __SSE2_MATH__ 1 // CHECK_CORE_AVX2_M64: #define __SSE2__ 1 // CHECK_CORE_AVX2_M64: #define __SSE3__ 1 @@ -591,7 +589,6 @@ // CHECK_BROADWELL_M32: #define __POPCNT__ 1 // CHECK_BROADWELL_M32: #define __RDRND__ 1 // CHECK_BROADWELL_M32: #define __RDSEED__ 1 -// CHECK_BROADWELL_M32: #define __RTM__ 1 // CHECK_BROADWELL_M32: #define __SSE2__ 1 // CHECK_BROADWELL_M32: #define __SSE3__ 1 // CHECK_BROADWELL_M32: #define __SSE4_1__ 1 @@ -623,7 +620,6 @@ // CHECK_BROADWELL_M64: #define __POPCNT__ 1 // CHECK_BROADWELL_M64: #define __RDRND__ 1 // CHECK_BROADWELL_M64: #define __RDSEED__ 1 -// CHECK_BROADWELL_M64: #define __RTM__ 1 // CHECK_BROADWELL_M64: #define __SSE2_MATH__ 1 // CHECK_BROADWELL_M64: #define __SSE2__ 1 // CHECK_BROADWELL_M64: #define __SSE3__ 1 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
