================ @@ -19445,6 +19445,70 @@ Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned BuiltinID, return nullptr; switch (BuiltinID) { + case Builtin::BI__builtin_hlsl_adduint64: { + Value *OpA = EmitScalarExpr(E->getArg(0)); + Value *OpB = EmitScalarExpr(E->getArg(1)); + assert(E->getArg(0)->getType()->hasIntegerRepresentation() && + E->getArg(1)->getType()->hasIntegerRepresentation() && + "AddUint64 operands must have an integer representation"); + assert(((E->getArg(0)->getType()->castAs<VectorType>()->getNumElements() == + 2 && + E->getArg(1)->getType()->castAs<VectorType>()->getNumElements() == + 2) || + (E->getArg(0)->getType()->castAs<VectorType>()->getNumElements() == + 4 && + E->getArg(1)->getType()->castAs<VectorType>()->getNumElements() == + 4)) && + "input vectors must have 2 or 4 elements each"); + + uint64_t NumElements = + E->getArg(0)->getType()->castAs<VectorType>()->getNumElements(); ---------------- bogner wrote:
I think these asserts can be simplified and also that as-is they don't actually capture the correct requirements. If one of the vectors has 2 elements and the other has 4 these won't fire. Something like this would be better: ```c++ QualType Arg0Ty = E->getArg(0)->getType(); uint64_t NumElements = Arg0Ty->castAs<VectorType>()->getNumElements(); assert(Arg0Ty == E->getArg(0)->getType() && "AddUint64 operand types must match"); assert(Arg0Ty->hasIntegerRepresentation() && "AddUint64 operands must have an integer representation"); assert((NumElements == 2 || NumElements == 4) && "AddUint64 operands must have 2 or 4 elements"); ``` https://github.com/llvm/llvm-project/pull/127137 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits