================ @@ -146,8 +146,13 @@ let Attributes = [Const, NoThrow, RequiredVectorWidth<256>], Features = "avx" in // current formulation is based on what was easiest to recognize from the // pre-TableGen version. -let Features = "mmx", Attributes = [NoThrow, Const] in { - def _mm_prefetch : X86NoPrefixBuiltin<"void(char const *, int)">; +let Features = "mmx", Header = "immintrin.h", Attributes = [NoThrow, Const] in { + def _mm_prefetch : X86LibBuiltin<"void(void const *, int)">; +} + +let Features = "mmx", Header = "intrin.h", Attributes = [NoThrow, Const] in { + def _m_prefetch : X86LibBuiltin<"void(void *)">; + def _m_prefetchw : X86LibBuiltin<"void(void volatile const *)">; ---------------- rnk wrote:
Yes, it should! I looked at the Intel intrinsic documentation, and it said these intrinsics were part of the deprecated 3dnow ISA extension, and I wasn't sure what to. However, I took the time to check the Intel ISA manual and I updated this feature set and the _mm_prefetch feature check to "sse", since that seems to be the correct feature. PTAL, since I've expanded scope a bit. https://github.com/llvm/llvm-project/pull/115099 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits