================ @@ -4992,7 +4992,6 @@ def mrvv_vector_bits_EQ : Joined<["-"], "mrvv-vector-bits=">, Group<m_Group>, !eq(GlobalDocumentation.Program, "Flang") : "", true: " The value will be reflected in __riscv_v_fixed_vlen preprocessor define"), " (RISC-V only)")>; - ---------------- kito-cheng wrote:
drop this https://github.com/llvm/llvm-project/pull/100346 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits