https://github.com/Lukacma updated
https://github.com/llvm/llvm-project/pull/122280
>From e3bc40234f8bd4c70d8822aadc6f42b6f738afba Mon Sep 17 00:00:00 2001
From: Marian Lukac <marian.lu...@arm.com>
Date: Thu, 9 Jan 2025 14:40:45 +0000
Subject: [PATCH] [AArch64] Change feature dependencies of fp8 features
---
.../fp8-intrinsics/acle_sve2_fp8_fdot.c | 12 ++++----
.../sme2-intrinsics/acle_sme2_fp8_fdot.c | 10 +++----
.../sme2-intrinsics/acle_sme2_fp8_fvdot.c | 10 +++----
.../acle_sme2_fp8_imm.c | 2 +-
llvm/lib/Target/AArch64/AArch64Features.td | 10 +++----
llvm/test/CodeGen/AArch64/fp8-sve-fdot.ll | 4 +--
.../TargetParser/TargetParserTest.cpp | 29 +++++++++++++++++--
7 files changed, 51 insertions(+), 26 deletions(-)
diff --git a/clang/test/CodeGen/AArch64/fp8-intrinsics/acle_sve2_fp8_fdot.c
b/clang/test/CodeGen/AArch64/fp8-intrinsics/acle_sve2_fp8_fdot.c
index 950a19115811ec..2f3994df037848 100644
--- a/clang/test/CodeGen/AArch64/fp8-intrinsics/acle_sve2_fp8_fdot.c
+++ b/clang/test/CodeGen/AArch64/fp8-intrinsics/acle_sve2_fp8_fdot.c
@@ -1,12 +1,12 @@
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
UTC_ARGS: --version 5
-// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve
-target-feature +sve2 -target-feature +fp8 -target-feature +fp8dot2
-target-feature +fp8dot4 -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s |
opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s
-// RUN: %clang_cc1 -x c++ -triple aarch64-none-linux-gnu -target-feature +sme
-target-feature +fp8 -target-feature +ssve-fp8dot2 -target-feature
+ssve-fp8dot4 -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -p
mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CHECK-CXX
+// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve
-target-feature +sve2 -target-feature +fp8dot2 -target-feature +fp8dot4
-disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -p
mem2reg,instcombine,tailcallelim | FileCheck %s
+// RUN: %clang_cc1 -x c++ -triple aarch64-none-linux-gnu -target-feature +sme
-target-feature +ssve-fp8dot2 -target-feature +ssve-fp8dot4 -disable-O0-optnone
-Werror -Wall -emit-llvm -o - %s | opt -S -p mem2reg,instcombine,tailcallelim |
FileCheck %s -check-prefix=CHECK-CXX
-// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple
aarch64-none-linux-gnu -target-feature +sve -target-feature +sve2
-target-feature +fp8 -target-feature +fp8dot2 -target-feature +fp8dot4
-disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -p
mem2reg,instcombine,tailcallelim | FileCheck %s
-// RUN: %clang_cc1 -x c++ -DSVE_OVERLOADED_FORMS -triple
aarch64-none-linux-gnu -target-feature +sme -target-feature +fp8
-target-feature +ssve-fp8dot2 -target-feature +ssve-fp8dot4 -disable-O0-optnone
-Werror -Wall -emit-llvm -o - %s | opt -S -p mem2reg,instcombine,tailcallelim |
FileCheck %s -check-prefix=CHECK-CXX
+// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple
aarch64-none-linux-gnu -target-feature +sve -target-feature +sve2
-target-feature +fp8dot2 -target-feature +fp8dot4 -disable-O0-optnone -Werror
-Wall -emit-llvm -o - %s | opt -S -p mem2reg,instcombine,tailcallelim |
FileCheck %s
+// RUN: %clang_cc1 -x c++ -DSVE_OVERLOADED_FORMS -triple
aarch64-none-linux-gnu -target-feature +sme -target-feature +ssve-fp8dot2
-target-feature +ssve-fp8dot4 -disable-O0-optnone -Werror -Wall -emit-llvm -o -
%s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s
-check-prefix=CHECK-CXX
-// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve
-target-feature +sve2 -target-feature +fp8 -target-feature +fp8dot2
-target-feature +fp8dot4 -S -disable-O0-optnone -Werror -Wall -o /dev/null %s
-// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme
-target-feature +sme2 -target-feature +fp8 -target-feature +ssve-fp8dot2
-target-feature +ssve-fp8dot4 -S -disable-O0-optnone -Werror -Wall -o /dev/null
%s
+// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve
-target-feature +sve2 -target-feature +fp8dot2 -target-feature +fp8dot4 -S
-disable-O0-optnone -Werror -Wall -o /dev/null %s
+// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme
-target-feature +ssve-fp8dot2 -target-feature +ssve-fp8dot4 -S
-disable-O0-optnone -Werror -Wall -o /dev/null %s
// REQUIRES: aarch64-registered-target
diff --git a/clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_fp8_fdot.c
b/clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_fp8_fdot.c
index a151d162e01085..2da4ab541869ed 100644
--- a/clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_fp8_fdot.c
+++ b/clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_fp8_fdot.c
@@ -1,11 +1,11 @@
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
UTC_ARGS: --version 5
// REQUIRES: aarch64-registered-target
-// RUN: %clang_cc1 -triple aarch64 -target-feature +sme -target-feature +sme2
-target-feature +sme-f8f16 -target-feature +sme-f8f32 -disable-O0-optnone
-Werror -Wall -emit-llvm -o - %s | opt -S -passes
mem2reg,instcombine,tailcallelim | FileCheck %s
-// RUN: %clang_cc1 -triple aarch64 -target-feature +sme -target-feature +sme2
-target-feature +sme-f8f16 -target-feature +sme-f8f32 -disable-O0-optnone
-Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes
mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
-// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sme
-target-feature +sme2 -target-feature +sme-f8f16 -target-feature +sme-f8f32
-disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -passes
mem2reg,instcombine,tailcallelim | FileCheck %s
-// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sme
-target-feature +sme2 -target-feature +sme-f8f16 -target-feature +sme-f8f32
-disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes
mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
-// RUN: %clang_cc1 -triple aarch64 -target-feature +sme -target-feature +sme2
-target-feature +sme-f8f16 -target-feature +sme-f8f32 -target-feature -S
-disable-O0-optnone -Werror -Wall -o /dev/null %s
+// RUN: %clang_cc1 -triple aarch64 -target-feature +sme -target-feature
+sme-f8f16 -target-feature +sme-f8f32 -disable-O0-optnone -Werror -Wall
-emit-llvm -o - %s | opt -S -passes mem2reg,instcombine,tailcallelim |
FileCheck %s
+// RUN: %clang_cc1 -triple aarch64 -target-feature +sme -target-feature
+sme-f8f16 -target-feature +sme-f8f32 -disable-O0-optnone -Werror -Wall
-emit-llvm -o - -x c++ %s | opt -S -passes mem2reg,instcombine,tailcallelim |
FileCheck %s -check-prefix=CPP-CHECK
+// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sme
-target-feature +sme-f8f16 -target-feature +sme-f8f32 -disable-O0-optnone
-Werror -Wall -emit-llvm -o - %s | opt -S -passes
mem2reg,instcombine,tailcallelim | FileCheck %s
+// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sme
-target-feature +sme-f8f16 -target-feature +sme-f8f32 -disable-O0-optnone
-Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes
mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
+// RUN: %clang_cc1 -triple aarch64 -target-feature +sme -target-feature
+sme-f8f16 -target-feature +sme-f8f32 -target-feature -S -disable-O0-optnone
-Werror -Wall -o /dev/null %s
#include <arm_sme.h>
diff --git a/clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_fp8_fvdot.c
b/clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_fp8_fvdot.c
index fc95cf541172aa..8353b3aebc9fc8 100644
--- a/clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_fp8_fvdot.c
+++ b/clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_fp8_fvdot.c
@@ -1,10 +1,10 @@
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
UTC_ARGS: --version 4
-// RUN: %clang_cc1 -triple aarch64 -target-feature +sme -target-feature +sme2
-target-feature +sme-f8f16 -target-feature +sme-f8f32 -disable-O0-optnone
-Werror -Wall -emit-llvm -o - %s | opt -S -passes
mem2reg,instcombine,tailcallelim | FileCheck %s
-// RUN: %clang_cc1 -triple aarch64 -target-feature +sme -target-feature +sme2
-target-feature +sme-f8f16 -target-feature +sme-f8f32 -disable-O0-optnone
-Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes
mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
-// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sme
-target-feature +sme2 -target-feature +sme-f8f16 -target-feature +sme-f8f32
-disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -passes
mem2reg,instcombine,tailcallelim | FileCheck %s
-// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sme
-target-feature +sme2 -target-feature +sme-f8f16 -target-feature +sme-f8f32
-disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes
mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
-// RUN: %clang_cc1 -triple aarch64 -target-feature +sme -target-feature +sme2
-target-feature +sme-f8f16 -target-feature +sme-f8f32 -target-feature -S
-disable-O0-optnone -Werror -Wall -o /dev/null %s
+// RUN: %clang_cc1 -triple aarch64 -target-feature +sme -target-feature
+sme-f8f16 -target-feature +sme-f8f32 -disable-O0-optnone -Werror -Wall
-emit-llvm -o - %s | opt -S -passes mem2reg,instcombine,tailcallelim |
FileCheck %s
+// RUN: %clang_cc1 -triple aarch64 -target-feature +sme -target-feature
+sme-f8f16 -target-feature +sme-f8f32 -disable-O0-optnone -Werror -Wall
-emit-llvm -o - -x c++ %s | opt -S -passes mem2reg,instcombine,tailcallelim |
FileCheck %s -check-prefix=CPP-CHECK
+// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sme
-target-feature +sme-f8f16 -target-feature +sme-f8f32 -disable-O0-optnone
-Werror -Wall -emit-llvm -o - %s | opt -S -passes
mem2reg,instcombine,tailcallelim | FileCheck %s
+// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sme
-target-feature +sme-f8f16 -target-feature +sme-f8f32 -disable-O0-optnone
-Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes
mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
+// RUN: %clang_cc1 -triple aarch64 -target-feature +sme -target-feature
+sme-f8f16 -target-feature +sme-f8f32 -target-feature -S -disable-O0-optnone
-Werror -Wall -o /dev/null %s
// REQUIRES: aarch64-registered-target
diff --git a/clang/test/Sema/aarch64-fp8-intrinsics/acle_sme2_fp8_imm.c
b/clang/test/Sema/aarch64-fp8-intrinsics/acle_sme2_fp8_imm.c
index bea0b29bcc70a8..fd5374d928ea9e 100644
--- a/clang/test/Sema/aarch64-fp8-intrinsics/acle_sme2_fp8_imm.c
+++ b/clang/test/Sema/aarch64-fp8-intrinsics/acle_sme2_fp8_imm.c
@@ -1,4 +1,4 @@
-// RUN: %clang_cc1 -triple aarch64 -target-feature +sme -target-feature +sme2
-target-feature +sme-f8f16 -target-feature +sme-f8f32 -fsyntax-only -verify %s
+// RUN: %clang_cc1 -triple aarch64 -target-feature +sme -target-feature
+sme-f8f16 -target-feature +sme-f8f32 -fsyntax-only -verify %s
// REQUIRES: aarch64-registered-target
diff --git a/llvm/lib/Target/AArch64/AArch64Features.td
b/llvm/lib/Target/AArch64/AArch64Features.td
index 41eb9a73bd013d..5a233e2d870b36 100644
--- a/llvm/lib/Target/AArch64/AArch64Features.td
+++ b/llvm/lib/Target/AArch64/AArch64Features.td
@@ -486,16 +486,16 @@ def FeatureSSVE_FP8FMA :
ExtensionWithMArch<"ssve-fp8fma", "SSVE_FP8FMA", "FEAT_
"Enable SVE2 FP8 multiply-add instructions", [FeatureSME2, FeatureFP8]>;
def FeatureFP8DOT4: ExtensionWithMArch<"fp8dot4", "FP8DOT4", "FEAT_FP8DOT4",
- "Enable FP8 4-way dot instructions", [FeatureFP8FMA]>;
+ "Enable FP8 4-way dot instructions", [FeatureNEON, FeatureFP8]>;
def FeatureFP8DOT2: ExtensionWithMArch<"fp8dot2", "FP8DOT2", "FEAT_FP8DOT2",
- "Enable FP8 2-way dot instructions", [FeatureFP8DOT4]>;
+ "Enable FP8 2-way dot instructions", [FeatureNEON, FeatureFP8]>;
def FeatureSSVE_FP8DOT4 : ExtensionWithMArch<"ssve-fp8dot4", "SSVE_FP8DOT4",
"FEAT_SSVE_FP8DOT4",
- "Enable SVE2 FP8 4-way dot product instructions", [FeatureSSVE_FP8FMA]>;
+ "Enable SVE2 FP8 4-way dot product instructions", [FeatureSME2, FeatureFP8]>;
def FeatureSSVE_FP8DOT2 : ExtensionWithMArch<"ssve-fp8dot2", "SSVE_FP8DOT2",
"FEAT_SSVE_FP8DOT2",
- "Enable SVE2 FP8 2-way dot product instructions", [FeatureSSVE_FP8DOT4]>;
+ "Enable SVE2 FP8 2-way dot product instructions", [FeatureSME2, FeatureFP8]>;
def FeatureSME_LUTv2 : ExtensionWithMArch<"sme-lutv2", "SME_LUTv2",
"FEAT_SME_LUTv2",
"Enable Scalable Matrix Extension (SME) LUTv2 instructions", [FeatureSME2]>;
@@ -504,7 +504,7 @@ def FeatureSMEF8F32 : ExtensionWithMArch<"sme-f8f32",
"SMEF8F32", "FEAT_SME_F8F3
"Enable Scalable Matrix Extension (SME) F8F32 instructions", [FeatureSME2,
FeatureFP8]>;
def FeatureSMEF8F16 : ExtensionWithMArch<"sme-f8f16", "SMEF8F16",
"FEAT_SME_F8F16",
- "Enable Scalable Matrix Extension (SME) F8F16 instructions",
[FeatureSMEF8F32]>;
+ "Enable Scalable Matrix Extension (SME) F8F16 instructions", [FeatureSME2,
FeatureFP8]>;
def FeatureCPA : ExtensionWithMArch<"cpa", "CPA", "FEAT_CPA",
"Enable Armv9.5-A Checked Pointer Arithmetic">;
diff --git a/llvm/test/CodeGen/AArch64/fp8-sve-fdot.ll
b/llvm/test/CodeGen/AArch64/fp8-sve-fdot.ll
index 0cead19a74bfd5..478404dcd50aab 100644
--- a/llvm/test/CodeGen/AArch64/fp8-sve-fdot.ll
+++ b/llvm/test/CodeGen/AArch64/fp8-sve-fdot.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
UTC_ARGS: --version 5
-; RUN: llc -mattr=+sve2,+fp8,+fp8dot2,+fp8dot4 < %s | FileCheck %s
-; RUN: llc -mattr=+sme,+fp8,+ssve-fp8dot2,+ssve-fp8dot4 --force-streaming < %s
| FileCheck %s
+; RUN: llc -mattr=+sve2,+fp8dot2,+fp8dot4 < %s | FileCheck %s
+; RUN: llc -mattr=+sme,+ssve-fp8dot2,+ssve-fp8dot4 --force-streaming < %s |
FileCheck %s
target triple = "aarch64-linux"
diff --git a/llvm/unittests/TargetParser/TargetParserTest.cpp
b/llvm/unittests/TargetParser/TargetParserTest.cpp
index 1f69190e4bec53..c03d3e8575d81c 100644
--- a/llvm/unittests/TargetParser/TargetParserTest.cpp
+++ b/llvm/unittests/TargetParser/TargetParserTest.cpp
@@ -1803,7 +1803,7 @@ AArch64ExtensionDependenciesBaseArchTestParams
{AArch64::ARMV9_6A, {"nofp", "fprcvt"}, {"fp-armv8", "fprcvt"}, {}},
{AArch64::ARMV9_6A, {"fprcvt", "nofp"}, {}, {"fp-armv8", "fprcvt"}},
- // simd -> {aes, sha2, sha3, sm4, f8f16mm, f8f32mm}
+ // simd -> {aes, sha2, sha3, sm4, f8f16mm, f8f32mm, fp8dot4, fp8dot2}
{AArch64::ARMV8A, {"nosimd", "aes"}, {"neon", "aes"}, {}},
{AArch64::ARMV8A, {"aes", "nosimd"}, {}, {"neon", "aes"}},
{AArch64::ARMV8A, {"nosimd", "sha2"}, {"neon", "sha2"}, {}},
@@ -1816,6 +1816,10 @@ AArch64ExtensionDependenciesBaseArchTestParams
{AArch64::ARMV9_6A, {"f8f16mm", "nosimd"}, {}, {"neon", "f8f16mm"}},
{AArch64::ARMV9_6A, {"nosimd", "f8f32mm"}, {"neon", "f8f32mm"}, {}},
{AArch64::ARMV9_6A, {"f8f32mm", "nosimd"}, {}, {"neon", "f8f32mm"}},
+ {AArch64::ARMV9_6A, {"nosimd", "fp8dot4"}, {"neon", "fp8dot4"}, {}},
+ {AArch64::ARMV9_6A, {"fp8dot4", "nosimd"}, {}, {"neon", "fp8dot4"}},
+ {AArch64::ARMV9_6A, {"nosimd", "fp8dot2"}, {"neon", "fp8dot2"}, {}},
+ {AArch64::ARMV9_6A, {"fp8dot2", "nosimd"}, {}, {"neon", "fp8dot2"}},
// simd -> {rdm, dotprod, fcma}
{AArch64::ARMV8A, {"nosimd", "rdm"}, {"neon", "rdm"}, {}},
@@ -1940,7 +1944,8 @@ AArch64ExtensionDependenciesBaseArchTestParams
{AArch64::ARMV9_6A, {"nosme2p1", "sme2p2"}, {"sme2p2", "sme2p1"}, {}},
{AArch64::ARMV9_6A, {"sme2p2", "nosme2p1"}, {}, {"sme2p1", "sme2p2"}},
- // fp8 -> {sme-f8f16, sme-f8f32, f8f16mm, f8f32mm}
+ // fp8 -> {sme-f8f16, sme-f8f32, f8f16mm, f8f32mm, fp8dot4, fp8dot2,
+ // ssve-fp8dot4, ssve-fp8dot2}
{AArch64::ARMV8A, {"nofp8", "sme-f8f16"}, {"fp8", "sme-f8f16"}, {}},
{AArch64::ARMV8A, {"sme-f8f16", "nofp8"}, {}, {"fp8", "sme-f8f16"}},
{AArch64::ARMV8A, {"nofp8", "sme-f8f32"}, {"fp8", "sme-f8f32"}, {}},
@@ -1949,6 +1954,26 @@ AArch64ExtensionDependenciesBaseArchTestParams
{AArch64::ARMV9_6A, {"f8f16mm", "nofp8"}, {}, {"fp8", "f8f16mm"}},
{AArch64::ARMV9_6A, {"nofp8", "f8f32mm"}, {"fp8", "f8f32mm"}, {}},
{AArch64::ARMV9_6A, {"f8f32mm", "nofp8"}, {}, {"fp8", "f8f32mm"}},
+ {AArch64::ARMV9_6A, {"nofp8", "fp8dot4"}, {"fp8", "fp8dot4"}, {}},
+ {AArch64::ARMV9_6A, {"fp8dot4", "nofp8"}, {}, {"fp8", "fp8dot4"}},
+ {AArch64::ARMV9_6A, {"nofp8", "fp8dot2"}, {"fp8", "fp8dot2"}, {}},
+ {AArch64::ARMV9_6A, {"fp8dot2", "nofp8"}, {}, {"fp8", "fp8dot2"}},
+ {AArch64::ARMV9_6A,
+ {"nofp8", "ssve-fp8dot4"},
+ {"fp8", "ssve-fp8dot4"},
+ {}},
+ {AArch64::ARMV9_6A,
+ {"ssve-fp8dot4", "nofp8"},
+ {},
+ {"fp8", "ssve-fp8dot4"}},
+ {AArch64::ARMV9_6A,
+ {"nofp8", "ssve-fp8dot2"},
+ {"fp8", "ssve-fp8dot2"},
+ {}},
+ {AArch64::ARMV9_6A,
+ {"ssve-fp8dot2", "nofp8"},
+ {},
+ {"fp8", "ssve-fp8dot2"}},
// lse -> lse128
{AArch64::ARMV8A, {"nolse", "lse128"}, {"lse", "lse128"}, {}},
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